| 1 | /* |
| 2 | * Atheros AR71xx SoC device definitions |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published |
| 9 | * by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #ifndef __AR71XX_DEVICES_H |
| 13 | #define __AR71XX_DEVICES_H |
| 14 | |
| 15 | #include <asm/mach-ar71xx/platform.h> |
| 16 | |
| 17 | struct platform_device; |
| 18 | |
| 19 | void ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata, |
| 20 | struct spi_board_info const *info, |
| 21 | unsigned n) __init; |
| 22 | |
| 23 | extern unsigned char ar71xx_mac_base[] __initdata; |
| 24 | void ar71xx_parse_mac_addr(char *mac_str) __init; |
| 25 | void ar71xx_init_mac(unsigned char *dst, const unsigned char *src, |
| 26 | unsigned offset) __init; |
| 27 | |
| 28 | struct ar71xx_eth_pll_data { |
| 29 | u32 pll_10; |
| 30 | u32 pll_100; |
| 31 | u32 pll_1000; |
| 32 | }; |
| 33 | |
| 34 | extern struct ar71xx_eth_pll_data ar71xx_eth0_pll_data; |
| 35 | extern struct ar71xx_eth_pll_data ar71xx_eth1_pll_data; |
| 36 | |
| 37 | extern struct ag71xx_platform_data ar71xx_eth0_data; |
| 38 | extern struct ag71xx_platform_data ar71xx_eth1_data; |
| 39 | extern struct platform_device ar71xx_eth0_device; |
| 40 | extern struct platform_device ar71xx_eth1_device; |
| 41 | void ar71xx_add_device_eth(unsigned int id) __init; |
| 42 | |
| 43 | extern struct platform_device ar71xx_mdio_device; |
| 44 | void ar71xx_add_device_mdio(u32 phy_mask) __init; |
| 45 | |
| 46 | void ar71xx_add_device_uart(void) __init; |
| 47 | |
| 48 | void ar71xx_add_device_wdt(void) __init; |
| 49 | |
| 50 | #endif /* __AR71XX_DEVICES_H */ |
| 51 | |
