| 1 | /* |
| 2 | * MikroTik RouterBOARD 4xx series support |
| 3 | * |
| 4 | * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published |
| 9 | * by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/mmc/host.h> |
| 15 | #include <linux/spi/spi.h> |
| 16 | #include <linux/spi/flash.h> |
| 17 | #include <linux/spi/mmc_spi.h> |
| 18 | #include <linux/mtd/mtd.h> |
| 19 | #include <linux/mtd/partitions.h> |
| 20 | |
| 21 | #include <asm/mach-ar71xx/ar71xx.h> |
| 22 | #include <asm/mach-ar71xx/pci.h> |
| 23 | #include <asm/mach-ar71xx/rb4xx_cpld.h> |
| 24 | |
| 25 | #include "machtype.h" |
| 26 | #include "devices.h" |
| 27 | #include "dev-gpio-buttons.h" |
| 28 | #include "dev-leds-gpio.h" |
| 29 | #include "dev-usb.h" |
| 30 | |
| 31 | #define RB4XX_GPIO_USER_LED 4 |
| 32 | #define RB4XX_GPIO_RESET_SWITCH 7 |
| 33 | |
| 34 | #define RB4XX_GPIO_CPLD_BASE 32 |
| 35 | #define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) |
| 36 | #define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) |
| 37 | #define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) |
| 38 | #define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) |
| 39 | #define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) |
| 40 | |
| 41 | #define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ |
| 42 | #define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) |
| 43 | |
| 44 | static struct gpio_led rb4xx_leds_gpio[] __initdata = { |
| 45 | { |
| 46 | .name = "rb4xx:yellow:user", |
| 47 | .gpio = RB4XX_GPIO_USER_LED, |
| 48 | .active_low = 0, |
| 49 | }, { |
| 50 | .name = "rb4xx:green:led1", |
| 51 | .gpio = RB4XX_GPIO_CPLD_LED1, |
| 52 | .active_low = 1, |
| 53 | }, { |
| 54 | .name = "rb4xx:green:led2", |
| 55 | .gpio = RB4XX_GPIO_CPLD_LED2, |
| 56 | .active_low = 1, |
| 57 | }, { |
| 58 | .name = "rb4xx:green:led3", |
| 59 | .gpio = RB4XX_GPIO_CPLD_LED3, |
| 60 | .active_low = 1, |
| 61 | }, { |
| 62 | .name = "rb4xx:green:led4", |
| 63 | .gpio = RB4XX_GPIO_CPLD_LED4, |
| 64 | .active_low = 1, |
| 65 | }, { |
| 66 | .name = "rb4xx:green:led5", |
| 67 | .gpio = RB4XX_GPIO_CPLD_LED5, |
| 68 | .active_low = 0, |
| 69 | }, |
| 70 | }; |
| 71 | |
| 72 | static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { |
| 73 | { |
| 74 | .desc = "reset_switch", |
| 75 | .type = EV_KEY, |
| 76 | .code = KEY_RESTART, |
| 77 | .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, |
| 78 | .gpio = RB4XX_GPIO_RESET_SWITCH, |
| 79 | .active_low = 1, |
| 80 | } |
| 81 | }; |
| 82 | |
| 83 | static struct platform_device rb4xx_nand_device = { |
| 84 | .name = "rb4xx-nand", |
| 85 | .id = -1, |
| 86 | }; |
| 87 | |
| 88 | static struct ar71xx_pci_irq rb4xx_pci_irqs[] __initdata = { |
| 89 | { |
| 90 | .slot = 0, |
| 91 | .pin = 1, |
| 92 | .irq = AR71XX_PCI_IRQ_DEV2, |
| 93 | }, { |
| 94 | .slot = 1, |
| 95 | .pin = 1, |
| 96 | .irq = AR71XX_PCI_IRQ_DEV0, |
| 97 | }, { |
| 98 | .slot = 1, |
| 99 | .pin = 2, |
| 100 | .irq = AR71XX_PCI_IRQ_DEV1, |
| 101 | }, { |
| 102 | .slot = 2, |
| 103 | .pin = 1, |
| 104 | .irq = AR71XX_PCI_IRQ_DEV1, |
| 105 | }, { |
| 106 | .slot = 3, |
| 107 | .pin = 1, |
| 108 | .irq = AR71XX_PCI_IRQ_DEV2, |
| 109 | } |
| 110 | }; |
| 111 | |
| 112 | #ifdef CONFIG_MTD_PARTITIONS |
| 113 | static struct mtd_partition rb4xx_partitions[] = { |
| 114 | { |
| 115 | .name = "routerboot", |
| 116 | .offset = 0, |
| 117 | .size = 0x0b000, |
| 118 | .mask_flags = MTD_WRITEABLE, |
| 119 | }, { |
| 120 | .name = "hard_config", |
| 121 | .offset = 0x0b000, |
| 122 | .size = 0x01000, |
| 123 | .mask_flags = MTD_WRITEABLE, |
| 124 | }, { |
| 125 | .name = "bios", |
| 126 | .offset = 0x0d000, |
| 127 | .size = 0x02000, |
| 128 | .mask_flags = MTD_WRITEABLE, |
| 129 | }, { |
| 130 | .name = "soft_config", |
| 131 | .offset = 0x0f000, |
| 132 | .size = 0x01000, |
| 133 | } |
| 134 | }; |
| 135 | #define rb4xx_num_partitions ARRAY_SIZE(rb4xx_partitions) |
| 136 | #else /* CONFIG_MTD_PARTITIONS */ |
| 137 | #define rb4xx_partitions NULL |
| 138 | #define rb4xx_num_partitions 0 |
| 139 | #endif /* CONFIG_MTD_PARTITIONS */ |
| 140 | |
| 141 | static struct flash_platform_data rb4xx_flash_data = { |
| 142 | .type = "pm25lv512", |
| 143 | .parts = rb4xx_partitions, |
| 144 | .nr_parts = rb4xx_num_partitions, |
| 145 | }; |
| 146 | |
| 147 | static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { |
| 148 | .gpio_base = RB4XX_GPIO_CPLD_BASE, |
| 149 | }; |
| 150 | |
| 151 | static struct mmc_spi_platform_data rb4xx_mmc_data = { |
| 152 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
| 153 | }; |
| 154 | |
| 155 | static struct spi_board_info rb4xx_spi_info[] = { |
| 156 | { |
| 157 | .bus_num = 0, |
| 158 | .chip_select = 0, |
| 159 | .max_speed_hz = 25000000, |
| 160 | .modalias = "m25p80", |
| 161 | .platform_data = &rb4xx_flash_data, |
| 162 | }, { |
| 163 | .bus_num = 0, |
| 164 | .chip_select = 1, |
| 165 | .max_speed_hz = 25000000, |
| 166 | .modalias = "spi-rb4xx-cpld", |
| 167 | .platform_data = &rb4xx_cpld_data, |
| 168 | } |
| 169 | }; |
| 170 | |
| 171 | static struct spi_board_info rb4xx_microsd_info[] = { |
| 172 | { |
| 173 | .bus_num = 0, |
| 174 | .chip_select = 2, |
| 175 | .max_speed_hz = 25000000, |
| 176 | .modalias = "mmc_spi", |
| 177 | .platform_data = &rb4xx_mmc_data, |
| 178 | } |
| 179 | }; |
| 180 | |
| 181 | |
| 182 | static struct resource rb4xx_spi_resources[] = { |
| 183 | { |
| 184 | .start = AR71XX_SPI_BASE, |
| 185 | .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, |
| 186 | .flags = IORESOURCE_MEM, |
| 187 | }, |
| 188 | }; |
| 189 | |
| 190 | static struct platform_device rb4xx_spi_device = { |
| 191 | .name = "rb4xx-spi", |
| 192 | .id = -1, |
| 193 | .resource = rb4xx_spi_resources, |
| 194 | .num_resources = ARRAY_SIZE(rb4xx_spi_resources), |
| 195 | }; |
| 196 | |
| 197 | static void __init rb4xx_generic_setup(void) |
| 198 | { |
| 199 | ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | |
| 200 | AR71XX_GPIO_FUNC_SPI_CS2_EN); |
| 201 | |
| 202 | ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), |
| 203 | rb4xx_leds_gpio); |
| 204 | |
| 205 | ar71xx_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, |
| 206 | ARRAY_SIZE(rb4xx_gpio_keys), |
| 207 | rb4xx_gpio_keys); |
| 208 | |
| 209 | spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); |
| 210 | platform_device_register(&rb4xx_spi_device); |
| 211 | platform_device_register(&rb4xx_nand_device); |
| 212 | } |
| 213 | |
| 214 | static void __init rb411_setup(void) |
| 215 | { |
| 216 | rb4xx_generic_setup(); |
| 217 | spi_register_board_info(rb4xx_microsd_info, |
| 218 | ARRAY_SIZE(rb4xx_microsd_info)); |
| 219 | |
| 220 | ar71xx_add_device_mdio(0xfffffffc); |
| 221 | |
| 222 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
| 223 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
| 224 | ar71xx_eth0_data.phy_mask = 0x00000003; |
| 225 | |
| 226 | ar71xx_add_device_eth(0); |
| 227 | |
| 228 | ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); |
| 229 | } |
| 230 | |
| 231 | MIPS_MACHINE(AR71XX_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", |
| 232 | rb411_setup); |
| 233 | |
| 234 | static void __init rb411u_setup(void) |
| 235 | { |
| 236 | rb411_setup(); |
| 237 | ar71xx_add_device_usb(); |
| 238 | } |
| 239 | |
| 240 | MIPS_MACHINE(AR71XX_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", |
| 241 | rb411u_setup); |
| 242 | |
| 243 | #define RB433_LAN_PHYMASK BIT(0) |
| 244 | #define RB433_WAN_PHYMASK BIT(4) |
| 245 | #define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) |
| 246 | |
| 247 | static void __init rb433_setup(void) |
| 248 | { |
| 249 | rb4xx_generic_setup(); |
| 250 | spi_register_board_info(rb4xx_microsd_info, |
| 251 | ARRAY_SIZE(rb4xx_microsd_info)); |
| 252 | |
| 253 | ar71xx_add_device_mdio(~RB433_MDIO_PHYMASK); |
| 254 | |
| 255 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); |
| 256 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
| 257 | ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK; |
| 258 | |
| 259 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); |
| 260 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
| 261 | ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK; |
| 262 | |
| 263 | ar71xx_add_device_eth(1); |
| 264 | ar71xx_add_device_eth(0); |
| 265 | |
| 266 | ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); |
| 267 | } |
| 268 | |
| 269 | MIPS_MACHINE(AR71XX_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", |
| 270 | rb433_setup); |
| 271 | |
| 272 | static void __init rb433u_setup(void) |
| 273 | { |
| 274 | rb433_setup(); |
| 275 | ar71xx_add_device_usb(); |
| 276 | } |
| 277 | |
| 278 | MIPS_MACHINE(AR71XX_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", |
| 279 | rb433u_setup); |
| 280 | |
| 281 | #define RB450_LAN_PHYMASK BIT(0) |
| 282 | #define RB450_WAN_PHYMASK BIT(4) |
| 283 | #define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) |
| 284 | |
| 285 | static void __init rb450_generic_setup(int gige) |
| 286 | { |
| 287 | rb4xx_generic_setup(); |
| 288 | ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK); |
| 289 | |
| 290 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); |
| 291 | ar71xx_eth0_data.phy_if_mode = (gige) ? |
| 292 | PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; |
| 293 | ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK; |
| 294 | |
| 295 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); |
| 296 | ar71xx_eth1_data.phy_if_mode = (gige) ? |
| 297 | PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; |
| 298 | ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK; |
| 299 | |
| 300 | ar71xx_add_device_eth(1); |
| 301 | ar71xx_add_device_eth(0); |
| 302 | } |
| 303 | |
| 304 | static void __init rb450_setup(void) |
| 305 | { |
| 306 | rb450_generic_setup(0); |
| 307 | } |
| 308 | |
| 309 | MIPS_MACHINE(AR71XX_MACH_RB_450, "450", "MikroTik RouterBOARD 450", |
| 310 | rb450_setup); |
| 311 | |
| 312 | static void __init rb450g_setup(void) |
| 313 | { |
| 314 | rb450_generic_setup(1); |
| 315 | spi_register_board_info(rb4xx_microsd_info, |
| 316 | ARRAY_SIZE(rb4xx_microsd_info)); |
| 317 | } |
| 318 | |
| 319 | MIPS_MACHINE(AR71XX_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", |
| 320 | rb450g_setup); |
| 321 | |
| 322 | static void __init rb493_setup(void) |
| 323 | { |
| 324 | rb4xx_generic_setup(); |
| 325 | |
| 326 | ar71xx_add_device_mdio(0x3fffff00); |
| 327 | |
| 328 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
| 329 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
| 330 | ar71xx_eth0_data.speed = SPEED_100; |
| 331 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
| 332 | |
| 333 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
| 334 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
| 335 | ar71xx_eth1_data.phy_mask = 0x00000001; |
| 336 | |
| 337 | ar71xx_add_device_eth(0); |
| 338 | ar71xx_add_device_eth(1); |
| 339 | |
| 340 | ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); |
| 341 | } |
| 342 | |
| 343 | MIPS_MACHINE(AR71XX_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", |
| 344 | rb493_setup); |
| 345 | |