| 1 | --- a/drivers/watchdog/Kconfig |
| 2 | +++ b/drivers/watchdog/Kconfig |
| 3 | @@ -188,7 +188,7 @@ config SA1100_WATCHDOG |
| 4 | |
| 5 | config MPCORE_WATCHDOG |
| 6 | tristate "MPcore watchdog" |
| 7 | - depends on HAVE_ARM_TWD |
| 8 | + depends on ARCH_CNS3XXX |
| 9 | help |
| 10 | Watchdog timer embedded into the MPcore system. |
| 11 | |
| 12 | --- a/drivers/watchdog/mpcore_wdt.c |
| 13 | +++ b/drivers/watchdog/mpcore_wdt.c |
| 14 | @@ -32,11 +32,14 @@ |
| 15 | #include <linux/uaccess.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/io.h> |
| 18 | +#include <linux/jiffies.h> |
| 19 | +#include <linux/delay.h> |
| 20 | |
| 21 | #include <asm/smp_twd.h> |
| 22 | |
| 23 | struct mpcore_wdt { |
| 24 | unsigned long timer_alive; |
| 25 | + unsigned long timer_rate; |
| 26 | struct device *dev; |
| 27 | void __iomem *base; |
| 28 | int irq; |
| 29 | @@ -98,14 +101,12 @@ static void mpcore_wdt_keepalive(struct |
| 30 | unsigned long count; |
| 31 | |
| 32 | spin_lock(&wdt_lock); |
| 33 | - /* Assume prescale is set to 256 */ |
| 34 | - count = __raw_readl(wdt->base + TWD_WDOG_COUNTER); |
| 35 | - count = (0xFFFFFFFFU - count) * (HZ / 5); |
| 36 | - count = (count / 256) * mpcore_margin; |
| 37 | + count = (wdt->timer_rate / 256) * mpcore_margin; |
| 38 | |
| 39 | /* Reload the counter */ |
| 40 | writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD); |
| 41 | wdt->perturb = wdt->perturb ? 0 : 1; |
| 42 | + |
| 43 | spin_unlock(&wdt_lock); |
| 44 | } |
| 45 | |
| 46 | @@ -329,6 +330,8 @@ static int __devinit mpcore_wdt_probe(st |
| 47 | struct mpcore_wdt *wdt; |
| 48 | struct resource *res; |
| 49 | int ret; |
| 50 | + unsigned long count; |
| 51 | + u64 waitjiffies; |
| 52 | |
| 53 | /* We only accept one device, and it must have an id of -1 */ |
| 54 | if (dev->id != -1) |
| 55 | @@ -375,6 +378,22 @@ static int __devinit mpcore_wdt_probe(st |
| 56 | goto err_irq; |
| 57 | } |
| 58 | |
| 59 | + waitjiffies = get_jiffies_64() + 1; |
| 60 | + while (get_jiffies_64() < waitjiffies) |
| 61 | + udelay(10); |
| 62 | + |
| 63 | + waitjiffies += 5; |
| 64 | + |
| 65 | + __raw_writel(0x00000001, wdt->base + TWD_WDOG_CONTROL); |
| 66 | + __raw_writel(0xFFFFFFFFU, wdt->base + TWD_WDOG_LOAD); |
| 67 | + |
| 68 | + while (get_jiffies_64() < waitjiffies) |
| 69 | + udelay(10); |
| 70 | + |
| 71 | + count = __raw_readl(wdt->base + TWD_WDOG_COUNTER); |
| 72 | + |
| 73 | + wdt->timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); |
| 74 | + |
| 75 | mpcore_wdt_stop(wdt); |
| 76 | platform_set_drvdata(dev, wdt); |
| 77 | mpcore_wdt_dev = dev; |
| 78 | |
