| 1 | /* |
| 2 | * Compex's MyLoader specific definitions |
| 3 | * |
| 4 | * Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #ifndef _MYLOADER_H_ |
| 13 | #define _MYLOADER_H_ |
| 14 | |
| 15 | /* Myloader specific magic numbers */ |
| 16 | #define MYLO_MAGIC_SYS_PARAMS 0x20021107 |
| 17 | #define MYLO_MAGIC_PARTITIONS 0x20021103 |
| 18 | #define MYLO_MAGIC_BOARD_PARAMS 0x20021103 |
| 19 | |
| 20 | /* Vendor ID's (seems to be same as the PCI vendor ID's) */ |
| 21 | #define VENID_COMPEX 0x11F6 |
| 22 | |
| 23 | /* Devices based on the ADM5120 */ |
| 24 | #define DEVID_COMPEX_NP27G 0x0078 |
| 25 | #define DEVID_COMPEX_NP28G 0x044C |
| 26 | #define DEVID_COMPEX_NP28GHS 0x044E |
| 27 | #define DEVID_COMPEX_WP54Gv1C 0x0514 |
| 28 | #define DEVID_COMPEX_WP54G 0x0515 |
| 29 | #define DEVID_COMPEX_WP54AG 0x0546 |
| 30 | #define DEVID_COMPEX_WPP54AG 0x0550 |
| 31 | #define DEVID_COMPEX_WPP54G 0x0555 |
| 32 | |
| 33 | /* Devices based on the Atheros AR2317 */ |
| 34 | #define DEVID_COMPEX_NP25G 0x05E6 |
| 35 | #define DEVID_COMPEX_WPE53G 0x05DC |
| 36 | |
| 37 | /* Devices based on the Atheros AR71xx */ |
| 38 | #define DEVID_COMPEX_WP543 0x0640 |
| 39 | |
| 40 | /* Devices based on the IXP422 */ |
| 41 | #define DEVID_COMPEX_WP18 0x047E |
| 42 | #define DEVID_COMPEX_NP18A 0x0489 |
| 43 | |
| 44 | /* Other devices */ |
| 45 | #define DEVID_COMPEX_NP26G8M 0x03E8 |
| 46 | #define DEVID_COMPEX_NP26G16M 0x03E9 |
| 47 | |
| 48 | struct mylo_partition { |
| 49 | uint16_t flags; /* partition flags */ |
| 50 | uint16_t type; /* type of the partition */ |
| 51 | uint32_t addr; /* relative address of the partition from the |
| 52 | flash start */ |
| 53 | uint32_t size; /* size of the partition in bytes */ |
| 54 | uint32_t param; /* if this is the active partition, the |
| 55 | MyLoader load code to this address */ |
| 56 | }; |
| 57 | |
| 58 | #define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, |
| 59 | * MyLoader loads firmware from here */ |
| 60 | #define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ |
| 61 | #define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ |
| 62 | #define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM |
| 63 | * before decompression */ |
| 64 | #define PARTITION_FLAG_LZMA 0x0100 /* partition data compressed by LZMA */ |
| 65 | #define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ |
| 66 | |
| 67 | #define PARTITION_TYPE_FREE 0 |
| 68 | #define PARTITION_TYPE_USED 1 |
| 69 | |
| 70 | #define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the |
| 71 | partition table */ |
| 72 | |
| 73 | struct mylo_partition_table { |
| 74 | uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ |
| 75 | uint32_t res0; /* unknown/unused */ |
| 76 | uint32_t res1; /* unknown/unused */ |
| 77 | uint32_t res2; /* unknown/unused */ |
| 78 | struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; |
| 79 | }; |
| 80 | |
| 81 | struct mylo_partition_header { |
| 82 | uint32_t len; /* length of the partition data */ |
| 83 | uint32_t crc; /* CRC value of the partition data */ |
| 84 | }; |
| 85 | |
| 86 | struct mylo_system_params { |
| 87 | uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ |
| 88 | uint32_t res0; |
| 89 | uint32_t res1; |
| 90 | uint32_t mylo_ver; |
| 91 | uint16_t vid; /* Vendor ID */ |
| 92 | uint16_t did; /* Device ID */ |
| 93 | uint16_t svid; /* Sub Vendor ID */ |
| 94 | uint16_t sdid; /* Sub Device ID */ |
| 95 | uint32_t rev; /* device revision */ |
| 96 | uint32_t fwhi; |
| 97 | uint32_t fwlo; |
| 98 | uint32_t tftp_addr; |
| 99 | uint32_t prog_start; |
| 100 | uint32_t flash_size; /* size of boot FLASH in bytes */ |
| 101 | uint32_t dram_size; /* size of onboard RAM in bytes */ |
| 102 | }; |
| 103 | |
| 104 | struct mylo_eth_addr { |
| 105 | uint8_t mac[6]; |
| 106 | uint8_t csum[2]; |
| 107 | }; |
| 108 | |
| 109 | #define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address |
| 110 | in the board parameters */ |
| 111 | |
| 112 | struct mylo_board_params { |
| 113 | uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ |
| 114 | uint32_t res0; |
| 115 | uint32_t res1; |
| 116 | uint32_t res2; |
| 117 | struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; |
| 118 | }; |
| 119 | |
| 120 | #endif /* _MYLOADER_H_*/ |
| 121 | |
