| 1 | --- a/drivers/mtd/nand/nand_base.c |
| 2 | +++ b/drivers/mtd/nand/nand_base.c |
| 3 | @@ -1164,7 +1164,7 @@ static int nand_read_page_swecc(struct m |
| 4 | * @bufpoi: buffer to store read data |
| 5 | */ |
| 6 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, |
| 7 | - uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) |
| 8 | + uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page) |
| 9 | { |
| 10 | int start_step, end_step, num_steps; |
| 11 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 12 | @@ -1342,6 +1342,75 @@ static int nand_read_page_hwecc_oob_firs |
| 13 | return 0; |
| 14 | } |
| 15 | |
| 16 | + /** |
| 17 | + * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function |
| 18 | + * @mtd: mtd info structure |
| 19 | + * @chip: nand chip info structure |
| 20 | + * @data_offs: offset of requested data within the page |
| 21 | + * @readlen: data length |
| 22 | + * @bufpoi: buffer to store read data |
| 23 | + * @page: page number to read |
| 24 | + * |
| 25 | + * Hardware ECC for large page chips, require OOB to be read first. |
| 26 | + * For this ECC mode, the write_page method is re-used from ECC_HW. |
| 27 | + * These methods read/write ECC from the OOB area, unlike the |
| 28 | + * ECC_HW_SYNDROME support with multiple ECC steps, follows the |
| 29 | + * "infix ECC" scheme and reads/writes ECC from the data area, by |
| 30 | + * overwriting the NAND manufacturer bad block markings. |
| 31 | + */ |
| 32 | +static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip, |
| 33 | + uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page) |
| 34 | +{ |
| 35 | + int start_step, end_step, num_steps; |
| 36 | + uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 37 | + uint8_t *p; |
| 38 | + int data_col_addr; |
| 39 | + int eccsize = chip->ecc.size; |
| 40 | + int eccbytes = chip->ecc.bytes; |
| 41 | + uint8_t *ecc_code = chip->buffers->ecccode; |
| 42 | + uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 43 | + int i; |
| 44 | + |
| 45 | + /* Column address wihin the page aligned to ECC size */ |
| 46 | + start_step = data_offs / chip->ecc.size; |
| 47 | + end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 48 | + num_steps = end_step - start_step + 1; |
| 49 | + |
| 50 | + data_col_addr = start_step * chip->ecc.size; |
| 51 | + |
| 52 | + /* Read the OOB area first */ |
| 53 | + if (mtd->writesize > 512) { |
| 54 | + chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); |
| 55 | + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 56 | + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 57 | + } else { |
| 58 | + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 59 | + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 60 | + chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page); |
| 61 | + } |
| 62 | + |
| 63 | + for (i = 0; i < chip->ecc.total; i++) |
| 64 | + ecc_code[i] = chip->oob_poi[eccpos[i]]; |
| 65 | + |
| 66 | + p = bufpoi + data_col_addr; |
| 67 | + |
| 68 | + for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) { |
| 69 | + int stat; |
| 70 | + |
| 71 | + chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 72 | + chip->read_buf(mtd, p, eccsize); |
| 73 | + chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 74 | + |
| 75 | + stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); |
| 76 | + if (stat < 0) |
| 77 | + mtd->ecc_stats.failed++; |
| 78 | + else |
| 79 | + mtd->ecc_stats.corrected += stat; |
| 80 | + } |
| 81 | + |
| 82 | + return 0; |
| 83 | +} |
| 84 | + |
| 85 | /** |
| 86 | * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read |
| 87 | * @mtd: mtd info structure |
| 88 | @@ -1502,7 +1571,7 @@ static int nand_do_read_ops(struct mtd_i |
| 89 | bufpoi, page); |
| 90 | else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) |
| 91 | ret = chip->ecc.read_subpage(mtd, chip, |
| 92 | - col, bytes, bufpoi); |
| 93 | + col, bytes, bufpoi, page); |
| 94 | else |
| 95 | ret = chip->ecc.read_page(mtd, chip, bufpoi, |
| 96 | page); |
| 97 | @@ -3288,8 +3357,11 @@ int nand_scan_tail(struct mtd_info *mtd) |
| 98 | "Hardware ECC not possible\n"); |
| 99 | BUG(); |
| 100 | } |
| 101 | - if (!chip->ecc.read_page) |
| 102 | + if (!chip->ecc.read_page) { |
| 103 | chip->ecc.read_page = nand_read_page_hwecc_oob_first; |
| 104 | + if (!chip->ecc.read_subpage) |
| 105 | + chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first; |
| 106 | + } |
| 107 | |
| 108 | case NAND_ECC_HW: |
| 109 | /* Use standard hwecc read page function ? */ |
| 110 | --- a/include/linux/mtd/nand.h |
| 111 | +++ b/include/linux/mtd/nand.h |
| 112 | @@ -210,9 +210,9 @@ typedef enum { |
| 113 | #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) |
| 114 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) |
| 115 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) |
| 116 | -/* Large page NAND with SOFT_ECC should support subpage reads */ |
| 117 | -#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \ |
| 118 | - && (chip->page_shift > 9)) |
| 119 | +/* Large page NAND with read_subpage should support subpage reads */ |
| 120 | +#define NAND_SUBPAGE_READ(chip) (((chip)->ecc.read_subpage) \ |
| 121 | + && ((chip)->page_shift > 9)) |
| 122 | |
| 123 | /* Mask to zero out the chip options, which come from the id table */ |
| 124 | #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) |
| 125 | @@ -374,7 +374,7 @@ struct nand_ecc_ctrl { |
| 126 | int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 127 | uint8_t *buf, int page); |
| 128 | int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, |
| 129 | - uint32_t offs, uint32_t len, uint8_t *buf); |
| 130 | + uint32_t offs, uint32_t len, uint8_t *buf, int page); |
| 131 | void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 132 | const uint8_t *buf); |
| 133 | int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page, |
| 134 | |
