| 1 | >From d0557763b0713a4c006bd2405eede3924569cafd Mon Sep 17 00:00:00 2001 |
| 2 | From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> |
| 3 | Date: Mon, 5 Jul 2010 11:28:49 +0100 |
| 4 | Subject: [PATCH 2/2] Fix PR44392 |
| 5 | |
| 6 | --- |
| 7 | gcc/config/arm/arm.md | 43 +++++++++++++++++++------------------------ |
| 8 | 1 files changed, 19 insertions(+), 24 deletions(-) |
| 9 | |
| 10 | diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md |
| 11 | index 2096ec6..f0348f3 100644 |
| 12 | --- a/gcc/config/arm/arm.md |
| 13 | +++ b/gcc/config/arm/arm.md |
| 14 | @@ -11318,34 +11318,29 @@ |
| 15 | (define_expand "bswapsi2" |
| 16 | [(set (match_operand:SI 0 "s_register_operand" "=r") |
| 17 | (bswap:SI (match_operand:SI 1 "s_register_operand" "r")))] |
| 18 | -"TARGET_EITHER" |
| 19 | +"TARGET_EITHER && (arm_arch6 || !optimize_size)" |
| 20 | " |
| 21 | - if (!arm_arch6) |
| 22 | - { |
| 23 | - if (!optimize_size) |
| 24 | - { |
| 25 | - rtx op2 = gen_reg_rtx (SImode); |
| 26 | - rtx op3 = gen_reg_rtx (SImode); |
| 27 | + if (!arm_arch6) |
| 28 | + { |
| 29 | + rtx op2 = gen_reg_rtx (SImode); |
| 30 | + rtx op3 = gen_reg_rtx (SImode); |
| 31 | |
| 32 | - if (TARGET_THUMB) |
| 33 | - { |
| 34 | - rtx op4 = gen_reg_rtx (SImode); |
| 35 | - rtx op5 = gen_reg_rtx (SImode); |
| 36 | + if (TARGET_THUMB) |
| 37 | + { |
| 38 | + rtx op4 = gen_reg_rtx (SImode); |
| 39 | + rtx op5 = gen_reg_rtx (SImode); |
| 40 | |
| 41 | - emit_insn (gen_thumb_legacy_rev (operands[0], operands[1], |
| 42 | - op2, op3, op4, op5)); |
| 43 | - } |
| 44 | - else |
| 45 | - { |
| 46 | - emit_insn (gen_arm_legacy_rev (operands[0], operands[1], |
| 47 | - op2, op3)); |
| 48 | - } |
| 49 | + emit_insn (gen_thumb_legacy_rev (operands[0], operands[1], |
| 50 | + op2, op3, op4, op5)); |
| 51 | + } |
| 52 | + else |
| 53 | + { |
| 54 | + emit_insn (gen_arm_legacy_rev (operands[0], operands[1], |
| 55 | + op2, op3)); |
| 56 | + } |
| 57 | |
| 58 | - DONE; |
| 59 | - } |
| 60 | - else |
| 61 | - FAIL; |
| 62 | - } |
| 63 | + DONE; |
| 64 | + } |
| 65 | " |
| 66 | ) |
| 67 | |
| 68 | -- |
| 69 | 1.6.2 |
| 70 | |
| 71 | |
