Root/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c

1/*
2 * AR71xx SoC routines
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
17
18#include <asm/mach-ar71xx/ar71xx.h>
19
20static DEFINE_MUTEX(ar71xx_flash_mutex);
21static DEFINE_SPINLOCK(ar71xx_device_lock);
22
23void __iomem *ar71xx_ddr_base;
24EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
25
26void __iomem *ar71xx_pll_base;
27EXPORT_SYMBOL_GPL(ar71xx_pll_base);
28
29void __iomem *ar71xx_reset_base;
30EXPORT_SYMBOL_GPL(ar71xx_reset_base);
31
32void __iomem *ar71xx_gpio_base;
33EXPORT_SYMBOL_GPL(ar71xx_gpio_base);
34
35void __iomem *ar71xx_usb_ctrl_base;
36EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
37
38void ar71xx_device_stop(u32 mask)
39{
40    unsigned long flags;
41    u32 mask_inv;
42    u32 t;
43
44    switch (ar71xx_soc) {
45    case AR71XX_SOC_AR7130:
46    case AR71XX_SOC_AR7141:
47    case AR71XX_SOC_AR7161:
48        spin_lock_irqsave(&ar71xx_device_lock, flags);
49        t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
50        ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
51        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
52        break;
53
54    case AR71XX_SOC_AR7240:
55    case AR71XX_SOC_AR7241:
56    case AR71XX_SOC_AR7242:
57        mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
58        spin_lock_irqsave(&ar71xx_device_lock, flags);
59        t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
60        t |= mask;
61        t &= ~mask_inv;
62        ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
63        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
64        break;
65
66    case AR71XX_SOC_AR9130:
67    case AR71XX_SOC_AR9132:
68        spin_lock_irqsave(&ar71xx_device_lock, flags);
69        t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
70        ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
71        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
72        break;
73
74    case AR71XX_SOC_AR9330:
75    case AR71XX_SOC_AR9331:
76        spin_lock_irqsave(&ar71xx_device_lock, flags);
77        t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
78        ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t | mask);
79        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
80        break;
81
82    case AR71XX_SOC_AR9341:
83    case AR71XX_SOC_AR9342:
84    case AR71XX_SOC_AR9344:
85        spin_lock_irqsave(&ar71xx_device_lock, flags);
86        t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
87        ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t | mask);
88        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
89        break;
90
91    default:
92        BUG();
93    }
94}
95EXPORT_SYMBOL_GPL(ar71xx_device_stop);
96
97void ar71xx_device_start(u32 mask)
98{
99    unsigned long flags;
100    u32 mask_inv;
101    u32 t;
102
103    switch (ar71xx_soc) {
104    case AR71XX_SOC_AR7130:
105    case AR71XX_SOC_AR7141:
106    case AR71XX_SOC_AR7161:
107        spin_lock_irqsave(&ar71xx_device_lock, flags);
108        t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
109        ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
110        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
111        break;
112
113    case AR71XX_SOC_AR7240:
114    case AR71XX_SOC_AR7241:
115    case AR71XX_SOC_AR7242:
116        mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
117        spin_lock_irqsave(&ar71xx_device_lock, flags);
118        t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
119        t &= ~mask;
120        t |= mask_inv;
121        ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
122        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
123        break;
124
125    case AR71XX_SOC_AR9130:
126    case AR71XX_SOC_AR9132:
127        spin_lock_irqsave(&ar71xx_device_lock, flags);
128        t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
129        ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
130        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
131        break;
132
133    case AR71XX_SOC_AR9330:
134    case AR71XX_SOC_AR9331:
135        spin_lock_irqsave(&ar71xx_device_lock, flags);
136        t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
137        ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t & ~mask);
138        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
139        break;
140
141    case AR71XX_SOC_AR9341:
142    case AR71XX_SOC_AR9342:
143    case AR71XX_SOC_AR9344:
144        spin_lock_irqsave(&ar71xx_device_lock, flags);
145        t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
146        ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t & ~mask);
147        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
148        break;
149
150    default:
151        BUG();
152    }
153}
154EXPORT_SYMBOL_GPL(ar71xx_device_start);
155
156void ar71xx_device_reset_rmw(u32 clear, u32 set)
157{
158    unsigned long flags;
159    unsigned int reg;
160    u32 t;
161
162    switch (ar71xx_soc) {
163    case AR71XX_SOC_AR7130:
164    case AR71XX_SOC_AR7141:
165    case AR71XX_SOC_AR7161:
166        reg = AR71XX_RESET_REG_RESET_MODULE;
167        break;
168
169    case AR71XX_SOC_AR7240:
170    case AR71XX_SOC_AR7241:
171    case AR71XX_SOC_AR7242:
172        reg = AR724X_RESET_REG_RESET_MODULE;
173        break;
174
175    case AR71XX_SOC_AR9130:
176    case AR71XX_SOC_AR9132:
177        reg = AR91XX_RESET_REG_RESET_MODULE;
178        break;
179
180    case AR71XX_SOC_AR9330:
181    case AR71XX_SOC_AR9331:
182        reg = AR933X_RESET_REG_RESET_MODULE;
183        break;
184
185    case AR71XX_SOC_AR9341:
186    case AR71XX_SOC_AR9342:
187    case AR71XX_SOC_AR9344:
188        reg = AR934X_RESET_REG_RESET_MODULE;
189        break;
190
191    default:
192        BUG();
193    }
194
195    spin_lock_irqsave(&ar71xx_device_lock, flags);
196    t = ar71xx_reset_rr(reg);
197    t &= ~clear;
198    t |= set;
199    ar71xx_reset_wr(reg, t);
200    spin_unlock_irqrestore(&ar71xx_device_lock, flags);
201}
202EXPORT_SYMBOL_GPL(ar71xx_device_reset_rmw);
203
204int ar71xx_device_stopped(u32 mask)
205{
206    unsigned long flags;
207    u32 t;
208
209    switch (ar71xx_soc) {
210    case AR71XX_SOC_AR7130:
211    case AR71XX_SOC_AR7141:
212    case AR71XX_SOC_AR7161:
213        spin_lock_irqsave(&ar71xx_device_lock, flags);
214        t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
215        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
216        break;
217
218    case AR71XX_SOC_AR7240:
219    case AR71XX_SOC_AR7241:
220    case AR71XX_SOC_AR7242:
221        spin_lock_irqsave(&ar71xx_device_lock, flags);
222        t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
223        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
224        break;
225
226    case AR71XX_SOC_AR9130:
227    case AR71XX_SOC_AR9132:
228        spin_lock_irqsave(&ar71xx_device_lock, flags);
229        t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
230        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
231        break;
232
233    case AR71XX_SOC_AR9330:
234    case AR71XX_SOC_AR9331:
235        spin_lock_irqsave(&ar71xx_device_lock, flags);
236        t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
237        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
238        break;
239
240    case AR71XX_SOC_AR9341:
241    case AR71XX_SOC_AR9342:
242    case AR71XX_SOC_AR9344:
243        spin_lock_irqsave(&ar71xx_device_lock, flags);
244        t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
245        spin_unlock_irqrestore(&ar71xx_device_lock, flags);
246        break;
247
248    default:
249        BUG();
250    }
251
252    return ((t & mask) == mask);
253}
254EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
255
256void ar71xx_ddr_flush(u32 reg)
257{
258    ar71xx_ddr_wr(reg, 1);
259    while ((ar71xx_ddr_rr(reg) & 0x1))
260        ;
261
262    ar71xx_ddr_wr(reg, 1);
263    while ((ar71xx_ddr_rr(reg) & 0x1))
264        ;
265}
266EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
267
268void ar71xx_flash_acquire(void)
269{
270    mutex_lock(&ar71xx_flash_mutex);
271}
272EXPORT_SYMBOL_GPL(ar71xx_flash_acquire);
273
274void ar71xx_flash_release(void)
275{
276    mutex_unlock(&ar71xx_flash_mutex);
277}
278EXPORT_SYMBOL_GPL(ar71xx_flash_release);
279

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