Root/target/linux/brcm47xx/patches-3.0/0005-bcma-add-mips-driver.patch

1From 3be3bbe24a1d49283864a1e1ea1d88a2e1700b50 Mon Sep 17 00:00:00 2001
2From: Hauke Mehrtens <hauke@hauke-m.de>
3Date: Mon, 6 Jun 2011 00:07:32 +0200
4Subject: [PATCH 05/26] bcma: add mips driver
5
6This adds a mips driver to bcma. This is only found on embedded
7devices. For now the driver just initializes the irqs used on this
8system.
9
10Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
11---
12 drivers/bcma/Kconfig | 9 +
13 drivers/bcma/Makefile | 1 +
14 drivers/bcma/driver_mips.c | 243 +++++++++++++++++++++++++++
15 drivers/bcma/main.c | 15 ++
16 include/linux/bcma/bcma.h | 3 +
17 include/linux/bcma/bcma_driver_chipcommon.h | 13 ++
18 include/linux/bcma/bcma_driver_mips.h | 49 ++++++
19 7 files changed, 333 insertions(+), 0 deletions(-)
20 create mode 100644 drivers/bcma/driver_mips.c
21 create mode 100644 include/linux/bcma/bcma_driver_mips.h
22
23--- a/drivers/bcma/Kconfig
24+++ b/drivers/bcma/Kconfig
25@@ -36,7 +36,16 @@ config BCMA_DRIVER_PCI_HOSTMODE
26 
27 config BCMA_HOST_SOC
28     bool
29+ depends on BCMA_DRIVER_MIPS
30+
31+config BCMA_DRIVER_MIPS
32+ bool "BCMA Broadcom MIPS core driver"
33     depends on BCMA && MIPS
34+ help
35+ Driver for the Broadcom MIPS core attached to Broadcom specific
36+ Advanced Microcontroller Bus.
37+
38+ If unsure, say N
39 
40 config BCMA_DEBUG
41     bool "BCMA debugging"
42--- a/drivers/bcma/Makefile
43+++ b/drivers/bcma/Makefile
44@@ -2,6 +2,7 @@ bcma-y += main.o scan.o core.o sprom
45 bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
46 bcma-y += driver_pci.o
47 bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
48+bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
49 bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
50 bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
51 obj-$(CONFIG_BCMA) += bcma.o
52--- /dev/null
53+++ b/drivers/bcma/driver_mips.c
54@@ -0,0 +1,243 @@
55+/*
56+ * Broadcom specific AMBA
57+ * Broadcom MIPS32 74K core driver
58+ *
59+ * Copyright 2009, Broadcom Corporation
60+ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
61+ * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
62+ * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
63+ *
64+ * Licensed under the GNU/GPL. See COPYING for details.
65+ */
66+
67+#include "bcma_private.h"
68+
69+#include <linux/bcma/bcma.h>
70+
71+#include <linux/serial.h>
72+#include <linux/serial_core.h>
73+#include <linux/serial_reg.h>
74+#include <linux/time.h>
75+
76+/* The 47162a0 hangs when reading MIPS DMP registers registers */
77+static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
78+{
79+ return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 &&
80+ dev->id.id == BCMA_CORE_MIPS_74K;
81+}
82+
83+/* The 5357b0 hangs when reading USB20H DMP registers */
84+static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
85+{
86+ return (dev->bus->chipinfo.id == 0x5357 ||
87+ dev->bus->chipinfo.id == 0x4749) &&
88+ dev->bus->chipinfo.pkg == 11 &&
89+ dev->id.id == BCMA_CORE_USB20_HOST;
90+}
91+
92+static inline u32 mips_read32(struct bcma_drv_mips *mcore,
93+ u16 offset)
94+{
95+ return bcma_read32(mcore->core, offset);
96+}
97+
98+static inline void mips_write32(struct bcma_drv_mips *mcore,
99+ u16 offset,
100+ u32 value)
101+{
102+ bcma_write32(mcore->core, offset, value);
103+}
104+
105+static const u32 ipsflag_irq_mask[] = {
106+ 0,
107+ BCMA_MIPS_IPSFLAG_IRQ1,
108+ BCMA_MIPS_IPSFLAG_IRQ2,
109+ BCMA_MIPS_IPSFLAG_IRQ3,
110+ BCMA_MIPS_IPSFLAG_IRQ4,
111+};
112+
113+static const u32 ipsflag_irq_shift[] = {
114+ 0,
115+ BCMA_MIPS_IPSFLAG_IRQ1_SHIFT,
116+ BCMA_MIPS_IPSFLAG_IRQ2_SHIFT,
117+ BCMA_MIPS_IPSFLAG_IRQ3_SHIFT,
118+ BCMA_MIPS_IPSFLAG_IRQ4_SHIFT,
119+};
120+
121+static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
122+{
123+ u32 flag;
124+
125+ if (bcma_core_mips_bcm47162a0_quirk(dev))
126+ return dev->core_index;
127+ if (bcma_core_mips_bcm5357b0_quirk(dev))
128+ return dev->core_index;
129+ flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
130+
131+ return flag & 0x1F;
132+}
133+
134+/* Get the MIPS IRQ assignment for a specified device.
135+ * If unassigned, 0 is returned.
136+ */
137+unsigned int bcma_core_mips_irq(struct bcma_device *dev)
138+{
139+ struct bcma_device *mdev = dev->bus->drv_mips.core;
140+ u32 irqflag;
141+ unsigned int irq;
142+
143+ irqflag = bcma_core_mips_irqflag(dev);
144+
145+ for (irq = 1; irq <= 4; irq++)
146+ if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
147+ (1 << irqflag))
148+ return irq;
149+
150+ return 0;
151+}
152+EXPORT_SYMBOL(bcma_core_mips_irq);
153+
154+static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
155+{
156+ unsigned int oldirq = bcma_core_mips_irq(dev);
157+ struct bcma_bus *bus = dev->bus;
158+ struct bcma_device *mdev = bus->drv_mips.core;
159+ u32 irqflag;
160+
161+ irqflag = bcma_core_mips_irqflag(dev);
162+ BUG_ON(oldirq == 6);
163+
164+ dev->irq = irq + 2;
165+
166+ /* clear the old irq */
167+ if (oldirq == 0)
168+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
169+ bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
170+ ~(1 << irqflag));
171+ else
172+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 0);
173+
174+ /* assign the new one */
175+ if (irq == 0) {
176+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
177+ bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
178+ (1 << irqflag));
179+ } else {
180+ u32 oldirqflag = bcma_read32(mdev,
181+ BCMA_MIPS_MIPS74K_INTMASK(irq));
182+ if (oldirqflag) {
183+ struct bcma_device *core;
184+
185+ /* backplane irq line is in use, find out who uses
186+ * it and set user to irq 0
187+ */
188+ list_for_each_entry_reverse(core, &bus->cores, list) {
189+ if ((1 << bcma_core_mips_irqflag(core)) ==
190+ oldirqflag) {
191+ bcma_core_mips_set_irq(core, 0);
192+ break;
193+ }
194+ }
195+ }
196+ bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
197+ 1 << irqflag);
198+ }
199+
200+ pr_info("set_irq: core 0x%04x, irq %d => %d\n",
201+ dev->id.id, oldirq + 2, irq + 2);
202+}
203+
204+static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
205+{
206+ int i;
207+ static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
208+ printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
209+ for (i = 0; i <= 6; i++)
210+ printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
211+ printk("\n");
212+}
213+
214+static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
215+{
216+ struct bcma_device *core;
217+
218+ list_for_each_entry_reverse(core, &bus->cores, list) {
219+ bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
220+ }
221+}
222+
223+static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
224+{
225+ struct bcma_bus *bus = mcore->core->bus;
226+
227+ switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) {
228+ case BCMA_CC_FLASHT_STSER:
229+ case BCMA_CC_FLASHT_ATSER:
230+ pr_err("Serial flash not supported.\n");
231+ break;
232+ case BCMA_CC_FLASHT_PARA:
233+ pr_info("found parallel flash.\n");
234+ bus->drv_cc.pflash.window = 0x1c000000;
235+ bus->drv_cc.pflash.window_size = 0x02000000;
236+
237+ if ((bcma_read32(bus->drv_cc.core, BCMA_CC_FLASH_CFG) &
238+ BCMA_CC_FLASH_CFG_DS) == 0)
239+ bus->drv_cc.pflash.buswidth = 1;
240+ else
241+ bus->drv_cc.pflash.buswidth = 2;
242+ break;
243+ default:
244+ pr_err("flash not supported.\n");
245+ }
246+}
247+
248+void bcma_core_mips_init(struct bcma_drv_mips *mcore)
249+{
250+ struct bcma_bus *bus;
251+ struct bcma_device *core;
252+ bus = mcore->core->bus;
253+
254+ pr_info("Initializing MIPS core...\n");
255+
256+ if (!mcore->setup_done)
257+ mcore->assigned_irqs = 1;
258+
259+ /* Assign IRQs to all cores on the bus */
260+ list_for_each_entry_reverse(core, &bus->cores, list) {
261+ int mips_irq;
262+ if (core->irq)
263+ continue;
264+
265+ mips_irq = bcma_core_mips_irq(core);
266+ if (mips_irq > 4)
267+ core->irq = 0;
268+ else
269+ core->irq = mips_irq + 2;
270+ if (core->irq > 5)
271+ continue;
272+ switch (core->id.id) {
273+ case BCMA_CORE_PCI:
274+ case BCMA_CORE_PCIE:
275+ case BCMA_CORE_ETHERNET:
276+ case BCMA_CORE_ETHERNET_GBIT:
277+ case BCMA_CORE_MAC_GBIT:
278+ case BCMA_CORE_80211:
279+ case BCMA_CORE_USB20_HOST:
280+ /* These devices get their own IRQ line if available,
281+ * the rest goes on IRQ0
282+ */
283+ if (mcore->assigned_irqs <= 4)
284+ bcma_core_mips_set_irq(core,
285+ mcore->assigned_irqs++);
286+ break;
287+ }
288+ }
289+ pr_info("IRQ reconfiguration done\n");
290+ bcma_core_mips_dump_irq(bus);
291+
292+ if (mcore->setup_done)
293+ return;
294+
295+ bcma_core_mips_flash_detect(mcore);
296+ mcore->setup_done = true;
297+}
298--- a/drivers/bcma/main.c
299+++ b/drivers/bcma/main.c
300@@ -84,6 +84,7 @@ static int bcma_register_cores(struct bc
301         case BCMA_CORE_CHIPCOMMON:
302         case BCMA_CORE_PCI:
303         case BCMA_CORE_PCIE:
304+ case BCMA_CORE_MIPS_74K:
305             continue;
306         }
307 
308@@ -147,6 +148,13 @@ int bcma_bus_register(struct bcma_bus *b
309         bcma_core_chipcommon_init(&bus->drv_cc);
310     }
311 
312+ /* Init MIPS core */
313+ core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
314+ if (core) {
315+ bus->drv_mips.core = core;
316+ bcma_core_mips_init(&bus->drv_mips);
317+ }
318+
319     /* Init PCIE core */
320     core = bcma_find_core(bus, BCMA_CORE_PCIE);
321     if (core) {
322@@ -217,6 +225,13 @@ int __init bcma_bus_early_register(struc
323         bcma_core_chipcommon_init(&bus->drv_cc);
324     }
325 
326+ /* Init MIPS core */
327+ core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
328+ if (core) {
329+ bus->drv_mips.core = core;
330+ bcma_core_mips_init(&bus->drv_mips);
331+ }
332+
333     pr_info("Early bus registered\n");
334 
335     return 0;
336--- a/include/linux/bcma/bcma.h
337+++ b/include/linux/bcma/bcma.h
338@@ -6,6 +6,7 @@
339 
340 #include <linux/bcma/bcma_driver_chipcommon.h>
341 #include <linux/bcma/bcma_driver_pci.h>
342+#include <linux/bcma/bcma_driver_mips.h>
343 #include <linux/ssb/ssb.h> /* SPROM sharing */
344 
345 #include "bcma_regs.h"
346@@ -130,6 +131,7 @@ struct bcma_device {
347 
348     struct device dev;
349     struct device *dma_dev;
350+
351     unsigned int irq;
352     bool dev_registered;
353 
354@@ -197,6 +199,7 @@ struct bcma_bus {
355 
356     struct bcma_drv_cc drv_cc;
357     struct bcma_drv_pci drv_pci;
358+ struct bcma_drv_mips drv_mips;
359 
360     /* We decided to share SPROM struct with SSB as long as we do not need
361      * any hacks for BCMA. This simplifies drivers code. */
362--- a/include/linux/bcma/bcma_driver_chipcommon.h
363+++ b/include/linux/bcma/bcma_driver_chipcommon.h
364@@ -24,6 +24,7 @@
365 #define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */
366 #define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */
367 #define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */
368+#define BCMA_CC_FLASHT_NFLASH 0x00000200
369 #define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */
370 #define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */
371 #define BCMA_PLLTYPE_NONE 0x00000000
372@@ -178,6 +179,7 @@
373 #define BCMA_CC_PROG_CFG 0x0120
374 #define BCMA_CC_PROG_WAITCNT 0x0124
375 #define BCMA_CC_FLASH_CFG 0x0128
376+#define BCMA_CC_FLASH_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */
377 #define BCMA_CC_FLASH_WAITCNT 0x012C
378 /* 0x1E0 is defined as shared BCMA_CLKCTLST */
379 #define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
380@@ -247,6 +249,14 @@ struct bcma_chipcommon_pmu {
381     u32 crystalfreq; /* The active crystal frequency (in kHz) */
382 };
383 
384+#ifdef CONFIG_BCMA_DRIVER_MIPS
385+struct bcma_pflash {
386+ u8 buswidth;
387+ u32 window;
388+ u32 window_size;
389+};
390+#endif /* CONFIG_BCMA_DRIVER_MIPS */
391+
392 struct bcma_drv_cc {
393     struct bcma_device *core;
394     u32 status;
395@@ -256,6 +266,9 @@ struct bcma_drv_cc {
396     /* Fast Powerup Delay constant */
397     u16 fast_pwrup_delay;
398     struct bcma_chipcommon_pmu pmu;
399+#ifdef CONFIG_BCMA_DRIVER_MIPS
400+ struct bcma_pflash pflash;
401+#endif /* CONFIG_BCMA_DRIVER_MIPS */
402 };
403 
404 /* Register access */
405--- /dev/null
406+++ b/include/linux/bcma/bcma_driver_mips.h
407@@ -0,0 +1,49 @@
408+#ifndef LINUX_BCMA_DRIVER_MIPS_H_
409+#define LINUX_BCMA_DRIVER_MIPS_H_
410+
411+#define BCMA_MIPS_IPSFLAG 0x0F08
412+/* which sbflags get routed to mips interrupt 1 */
413+#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
414+#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
415+/* which sbflags get routed to mips interrupt 2 */
416+#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
417+#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8
418+/* which sbflags get routed to mips interrupt 3 */
419+#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
420+#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16
421+/* which sbflags get routed to mips interrupt 4 */
422+#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
423+#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24
424+
425+/* MIPS 74K core registers */
426+#define BCMA_MIPS_MIPS74K_CORECTL 0x0000
427+#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
428+#define BCMA_MIPS_MIPS74K_BIST 0x000C
429+#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
430+#define BCMA_MIPS_MIPS74K_INTMASK(int) \
431+ ((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0)
432+#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C
433+#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040
434+#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044
435+#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
436+#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
437+
438+#define BCMA_MIPS_OOBSELOUTA30 0x100
439+
440+struct bcma_device;
441+
442+struct bcma_drv_mips {
443+ struct bcma_device *core;
444+ u8 setup_done:1;
445+ unsigned int assigned_irqs;
446+};
447+
448+#ifdef CONFIG_BCMA_DRIVER_MIPS
449+extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
450+#else
451+static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
452+#endif
453+
454+extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
455+
456+#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
457

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