Root/target/linux/brcm47xx/patches-3.0/0006-bcma-add-serial-console-support.patch

1From 4d58b9a14669e5ea0026f0d27257041aecfcbed3 Mon Sep 17 00:00:00 2001
2From: Hauke Mehrtens <hauke@hauke-m.de>
3Date: Mon, 6 Jun 2011 00:07:33 +0200
4Subject: [PATCH 06/26] bcma: add serial console support
5
6This adds support for serial console to bcma, when operating on an SoC.
7
8Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
9---
10 drivers/bcma/bcma_private.h | 8 ++++
11 drivers/bcma/driver_chipcommon.c | 48 +++++++++++++++++++++++++++
12 drivers/bcma/driver_chipcommon_pmu.c | 26 ++++++++++++++
13 drivers/bcma/driver_mips.c | 1 +
14 include/linux/bcma/bcma_driver_chipcommon.h | 14 ++++++++
15 5 files changed, 97 insertions(+), 0 deletions(-)
16
17--- a/drivers/bcma/bcma_private.h
18+++ b/drivers/bcma/bcma_private.h
19@@ -29,6 +29,14 @@ void bcma_init_bus(struct bcma_bus *bus)
20 /* sprom.c */
21 int bcma_sprom_get(struct bcma_bus *bus);
22 
23+/* driver_chipcommon.c */
24+#ifdef CONFIG_BCMA_DRIVER_MIPS
25+void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
26+#endif /* CONFIG_BCMA_DRIVER_MIPS */
27+
28+/* driver_chipcommon_pmu.c */
29+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc);
30+
31 #ifdef CONFIG_BCMA_HOST_PCI
32 /* host_pci.c */
33 extern int __init bcma_host_pci_init(void);
34--- a/drivers/bcma/driver_chipcommon.c
35+++ b/drivers/bcma/driver_chipcommon.c
36@@ -106,3 +106,51 @@ u32 bcma_chipco_gpio_polarity(struct bcm
37 {
38     return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
39 }
40+
41+#ifdef CONFIG_BCMA_DRIVER_MIPS
42+void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
43+{
44+ unsigned int irq;
45+ u32 baud_base;
46+ u32 i;
47+ unsigned int ccrev = cc->core->id.rev;
48+ struct bcma_serial_port *ports = cc->serial_ports;
49+
50+ if (ccrev >= 11 && ccrev != 15) {
51+ /* Fixed ALP clock */
52+ baud_base = bcma_pmu_alp_clock(cc);
53+ if (ccrev >= 21) {
54+ /* Turn off UART clock before switching clocksource. */
55+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
56+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
57+ & ~BCMA_CC_CORECTL_UARTCLKEN);
58+ }
59+ /* Set the override bit so we don't divide it */
60+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
61+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
62+ | BCMA_CC_CORECTL_UARTCLK0);
63+ if (ccrev >= 21) {
64+ /* Re-enable the UART clock. */
65+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
66+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
67+ | BCMA_CC_CORECTL_UARTCLKEN);
68+ }
69+ } else {
70+ pr_err("serial not supported on this device ccrev: 0x%x\n",
71+ ccrev);
72+ return;
73+ }
74+
75+ irq = bcma_core_mips_irq(cc->core);
76+
77+ /* Determine the registers of the UARTs */
78+ cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
79+ for (i = 0; i < cc->nr_serial_ports; i++) {
80+ ports[i].regs = cc->core->io_addr + BCMA_CC_UART0_DATA +
81+ (i * 256);
82+ ports[i].irq = irq;
83+ ports[i].baud_base = baud_base;
84+ ports[i].reg_shift = 0;
85+ }
86+}
87+#endif /* CONFIG_BCMA_DRIVER_MIPS */
88--- a/drivers/bcma/driver_chipcommon_pmu.c
89+++ b/drivers/bcma/driver_chipcommon_pmu.c
90@@ -136,3 +136,29 @@ void bcma_pmu_init(struct bcma_drv_cc *c
91     bcma_pmu_swreg_init(cc);
92     bcma_pmu_workarounds(cc);
93 }
94+
95+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc)
96+{
97+ struct bcma_bus *bus = cc->core->bus;
98+
99+ switch (bus->chipinfo.id) {
100+ case 0x4716:
101+ case 0x4748:
102+ case 47162:
103+ case 0x4313:
104+ case 0x5357:
105+ case 0x4749:
106+ case 53572:
107+ /* always 20Mhz */
108+ return 20000 * 1000;
109+ case 0x5356:
110+ case 0x5300:
111+ /* always 25Mhz */
112+ return 25000 * 1000;
113+ default:
114+ pr_warn("No ALP clock specified for %04X device, "
115+ "pmu rev. %d, using default %d Hz\n",
116+ bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
117+ }
118+ return BCMA_CC_PMU_ALP_CLOCK;
119+}
120--- a/drivers/bcma/driver_mips.c
121+++ b/drivers/bcma/driver_mips.c
122@@ -238,6 +238,7 @@ void bcma_core_mips_init(struct bcma_drv
123     if (mcore->setup_done)
124         return;
125 
126+ bcma_chipco_serial_init(&bus->drv_cc);
127     bcma_core_mips_flash_detect(mcore);
128     mcore->setup_done = true;
129 }
130--- a/include/linux/bcma/bcma_driver_chipcommon.h
131+++ b/include/linux/bcma/bcma_driver_chipcommon.h
132@@ -241,6 +241,9 @@
133 #define BCMA_CC_SPROM 0x0800 /* SPROM beginning */
134 #define BCMA_CC_SPROM_PCIE6 0x0830 /* SPROM beginning on PCIe rev >= 6 */
135 
136+/* ALP clock on pre-PMU chips */
137+#define BCMA_CC_PMU_ALP_CLOCK 20000000
138+
139 /* Data for the PMU, if available.
140  * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
141  */
142@@ -255,6 +258,14 @@ struct bcma_pflash {
143     u32 window;
144     u32 window_size;
145 };
146+
147+struct bcma_serial_port {
148+ void *regs;
149+ unsigned long clockspeed;
150+ unsigned int irq;
151+ unsigned int baud_base;
152+ unsigned int reg_shift;
153+};
154 #endif /* CONFIG_BCMA_DRIVER_MIPS */
155 
156 struct bcma_drv_cc {
157@@ -268,6 +279,9 @@ struct bcma_drv_cc {
158     struct bcma_chipcommon_pmu pmu;
159 #ifdef CONFIG_BCMA_DRIVER_MIPS
160     struct bcma_pflash pflash;
161+
162+ int nr_serial_ports;
163+ struct bcma_serial_port serial_ports[4];
164 #endif /* CONFIG_BCMA_DRIVER_MIPS */
165 };
166 
167

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