| 1 | --- a/drivers/ssb/driver_chipcommon_pmu.c |
| 2 | +++ b/drivers/ssb/driver_chipcommon_pmu.c |
| 3 | @@ -417,9 +417,9 @@ static void ssb_pmu_resources_init(struc |
| 4 | u32 min_msk = 0, max_msk = 0; |
| 5 | unsigned int i; |
| 6 | const struct pmu_res_updown_tab_entry *updown_tab = NULL; |
| 7 | - unsigned int updown_tab_size; |
| 8 | + unsigned int updown_tab_size = 0; |
| 9 | const struct pmu_res_depend_tab_entry *depend_tab = NULL; |
| 10 | - unsigned int depend_tab_size; |
| 11 | + unsigned int depend_tab_size = 0; |
| 12 | |
| 13 | switch (bus->chip_id) { |
| 14 | case 0x4312: |
| 15 | --- a/drivers/ssb/driver_gige.c |
| 16 | +++ b/drivers/ssb/driver_gige.c |
| 17 | @@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige |
| 18 | gige_write32(dev, SSB_GIGE_PCICFG + offset, value); |
| 19 | } |
| 20 | |
| 21 | -static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, |
| 22 | - int reg, int size, u32 *val) |
| 23 | +static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus, |
| 24 | + unsigned int devfn, int reg, |
| 25 | + int size, u32 *val) |
| 26 | { |
| 27 | struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); |
| 28 | unsigned long flags; |
| 29 | @@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru |
| 30 | return PCIBIOS_SUCCESSFUL; |
| 31 | } |
| 32 | |
| 33 | -static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, |
| 34 | - int reg, int size, u32 val) |
| 35 | +static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus, |
| 36 | + unsigned int devfn, int reg, |
| 37 | + int size, u32 val) |
| 38 | { |
| 39 | struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); |
| 40 | unsigned long flags; |
| 41 | @@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str |
| 42 | return PCIBIOS_SUCCESSFUL; |
| 43 | } |
| 44 | |
| 45 | -static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id) |
| 46 | +static int __devinit ssb_gige_probe(struct ssb_device *sdev, |
| 47 | + const struct ssb_device_id *id) |
| 48 | { |
| 49 | struct ssb_gige *dev; |
| 50 | u32 base, tmslow, tmshigh; |
| 51 | --- a/drivers/ssb/driver_pcicore.c |
| 52 | +++ b/drivers/ssb/driver_pcicore.c |
| 53 | @@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st |
| 54 | return ssb_mips_irq(extpci_core->dev) + 2; |
| 55 | } |
| 56 | |
| 57 | -static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) |
| 58 | +static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) |
| 59 | { |
| 60 | u32 val; |
| 61 | |
| 62 | @@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st |
| 63 | register_pci_controller(&ssb_pcicore_controller); |
| 64 | } |
| 65 | |
| 66 | -static int pcicore_is_in_hostmode(struct ssb_pcicore *pc) |
| 67 | +static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc) |
| 68 | { |
| 69 | struct ssb_bus *bus = pc->dev->bus; |
| 70 | u16 chipid_top; |
| 71 | @@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct |
| 72 | * Workarounds. |
| 73 | **************************************************/ |
| 74 | |
| 75 | -static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) |
| 76 | +static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) |
| 77 | { |
| 78 | u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0)); |
| 79 | if (((tmp & 0xF000) >> 12) != pc->dev->core_index) { |
| 80 | @@ -514,7 +514,7 @@ static void ssb_pcicore_pcie_setup_worka |
| 81 | * Generic and Clientmode operation code. |
| 82 | **************************************************/ |
| 83 | |
| 84 | -static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) |
| 85 | +static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) |
| 86 | { |
| 87 | ssb_pcicore_fix_sprom_core_index(pc); |
| 88 | |
| 89 | @@ -529,7 +529,7 @@ static void ssb_pcicore_init_clientmode( |
| 90 | } |
| 91 | } |
| 92 | |
| 93 | -void ssb_pcicore_init(struct ssb_pcicore *pc) |
| 94 | +void __devinit ssb_pcicore_init(struct ssb_pcicore *pc) |
| 95 | { |
| 96 | struct ssb_device *dev = pc->dev; |
| 97 | |
| 98 | --- a/drivers/ssb/main.c |
| 99 | +++ b/drivers/ssb/main.c |
| 100 | @@ -557,7 +557,7 @@ error: |
| 101 | } |
| 102 | |
| 103 | /* Needs ssb_buses_lock() */ |
| 104 | -static int ssb_attach_queued_buses(void) |
| 105 | +static int __devinit ssb_attach_queued_buses(void) |
| 106 | { |
| 107 | struct ssb_bus *bus, *n; |
| 108 | int err = 0; |
| 109 | @@ -768,9 +768,9 @@ out: |
| 110 | return err; |
| 111 | } |
| 112 | |
| 113 | -static int ssb_bus_register(struct ssb_bus *bus, |
| 114 | - ssb_invariants_func_t get_invariants, |
| 115 | - unsigned long baseaddr) |
| 116 | +static int __devinit ssb_bus_register(struct ssb_bus *bus, |
| 117 | + ssb_invariants_func_t get_invariants, |
| 118 | + unsigned long baseaddr) |
| 119 | { |
| 120 | int err; |
| 121 | |
| 122 | @@ -851,8 +851,8 @@ err_disable_xtal: |
| 123 | } |
| 124 | |
| 125 | #ifdef CONFIG_SSB_PCIHOST |
| 126 | -int ssb_bus_pcibus_register(struct ssb_bus *bus, |
| 127 | - struct pci_dev *host_pci) |
| 128 | +int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus, |
| 129 | + struct pci_dev *host_pci) |
| 130 | { |
| 131 | int err; |
| 132 | |
| 133 | @@ -875,9 +875,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); |
| 134 | #endif /* CONFIG_SSB_PCIHOST */ |
| 135 | |
| 136 | #ifdef CONFIG_SSB_PCMCIAHOST |
| 137 | -int ssb_bus_pcmciabus_register(struct ssb_bus *bus, |
| 138 | - struct pcmcia_device *pcmcia_dev, |
| 139 | - unsigned long baseaddr) |
| 140 | +int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus, |
| 141 | + struct pcmcia_device *pcmcia_dev, |
| 142 | + unsigned long baseaddr) |
| 143 | { |
| 144 | int err; |
| 145 | |
| 146 | @@ -897,8 +897,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register |
| 147 | #endif /* CONFIG_SSB_PCMCIAHOST */ |
| 148 | |
| 149 | #ifdef CONFIG_SSB_SDIOHOST |
| 150 | -int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func, |
| 151 | - unsigned int quirks) |
| 152 | +int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus, |
| 153 | + struct sdio_func *func, |
| 154 | + unsigned int quirks) |
| 155 | { |
| 156 | int err; |
| 157 | |
| 158 | @@ -918,9 +919,9 @@ int ssb_bus_sdiobus_register(struct ssb_ |
| 159 | EXPORT_SYMBOL(ssb_bus_sdiobus_register); |
| 160 | #endif /* CONFIG_SSB_PCMCIAHOST */ |
| 161 | |
| 162 | -int ssb_bus_ssbbus_register(struct ssb_bus *bus, |
| 163 | - unsigned long baseaddr, |
| 164 | - ssb_invariants_func_t get_invariants) |
| 165 | +int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus, |
| 166 | + unsigned long baseaddr, |
| 167 | + ssb_invariants_func_t get_invariants) |
| 168 | { |
| 169 | int err; |
| 170 | |
| 171 | @@ -1001,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 |
| 172 | switch (plltype) { |
| 173 | case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ |
| 174 | if (m & SSB_CHIPCO_CLK_T6_MMASK) |
| 175 | - return SSB_CHIPCO_CLK_T6_M0; |
| 176 | - return SSB_CHIPCO_CLK_T6_M1; |
| 177 | + return SSB_CHIPCO_CLK_T6_M1; |
| 178 | + return SSB_CHIPCO_CLK_T6_M0; |
| 179 | case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ |
| 180 | case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ |
| 181 | case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ |
| 182 | @@ -1265,7 +1266,10 @@ u32 ssb_dma_translation(struct ssb_devic |
| 183 | case SSB_BUSTYPE_SSB: |
| 184 | return 0; |
| 185 | case SSB_BUSTYPE_PCI: |
| 186 | - return SSB_PCI_DMA; |
| 187 | + if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) |
| 188 | + return SSB_PCIE_DMA_H32; |
| 189 | + else |
| 190 | + return SSB_PCI_DMA; |
| 191 | default: |
| 192 | __ssb_dma_not_implemented(dev); |
| 193 | } |
| 194 | --- a/drivers/ssb/pci.c |
| 195 | +++ b/drivers/ssb/pci.c |
| 196 | @@ -734,12 +734,9 @@ out_free: |
| 197 | static void ssb_pci_get_boardinfo(struct ssb_bus *bus, |
| 198 | struct ssb_boardinfo *bi) |
| 199 | { |
| 200 | - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID, |
| 201 | - &bi->vendor); |
| 202 | - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID, |
| 203 | - &bi->type); |
| 204 | - pci_read_config_word(bus->host_pci, PCI_REVISION_ID, |
| 205 | - &bi->rev); |
| 206 | + bi->vendor = bus->host_pci->subsystem_vendor; |
| 207 | + bi->type = bus->host_pci->subsystem_device; |
| 208 | + bi->rev = bus->host_pci->revision; |
| 209 | } |
| 210 | |
| 211 | int ssb_pci_get_invariants(struct ssb_bus *bus, |
| 212 | --- a/drivers/ssb/pcihost_wrapper.c |
| 213 | +++ b/drivers/ssb/pcihost_wrapper.c |
| 214 | @@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci |
| 215 | # define ssb_pcihost_resume NULL |
| 216 | #endif /* CONFIG_PM */ |
| 217 | |
| 218 | -static int ssb_pcihost_probe(struct pci_dev *dev, |
| 219 | - const struct pci_device_id *id) |
| 220 | +static int __devinit ssb_pcihost_probe(struct pci_dev *dev, |
| 221 | + const struct pci_device_id *id) |
| 222 | { |
| 223 | struct ssb_bus *ssb; |
| 224 | int err = -ENOMEM; |
| 225 | @@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc |
| 226 | pci_set_drvdata(dev, NULL); |
| 227 | } |
| 228 | |
| 229 | -int ssb_pcihost_register(struct pci_driver *driver) |
| 230 | +int __devinit ssb_pcihost_register(struct pci_driver *driver) |
| 231 | { |
| 232 | driver->probe = ssb_pcihost_probe; |
| 233 | driver->remove = ssb_pcihost_remove; |
| 234 | --- a/drivers/ssb/scan.c |
| 235 | +++ b/drivers/ssb/scan.c |
| 236 | @@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus, |
| 237 | } else { |
| 238 | if (bus->bustype == SSB_BUSTYPE_PCI) { |
| 239 | bus->chip_id = pcidev_to_chipid(bus->host_pci); |
| 240 | - pci_read_config_byte(bus->host_pci, PCI_REVISION_ID, |
| 241 | - &bus->chip_rev); |
| 242 | + bus->chip_rev = bus->host_pci->revision; |
| 243 | bus->chip_package = 0; |
| 244 | } else { |
| 245 | bus->chip_id = 0x4710; |
| 246 | --- a/include/linux/ssb/ssb.h |
| 247 | +++ b/include/linux/ssb/ssb.h |
| 248 | @@ -27,6 +27,8 @@ struct ssb_sprom { |
| 249 | u8 et1mdcport; /* MDIO for enet1 */ |
| 250 | u8 board_rev; /* Board revision number from SPROM. */ |
| 251 | u8 country_code; /* Country Code */ |
| 252 | + u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */ |
| 253 | + u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ |
| 254 | u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ |
| 255 | u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ |
| 256 | u16 pa0b0; |
| 257 | @@ -99,7 +101,7 @@ struct ssb_sprom { |
| 258 | struct ssb_boardinfo { |
| 259 | u16 vendor; |
| 260 | u16 type; |
| 261 | - u16 rev; |
| 262 | + u8 rev; |
| 263 | }; |
| 264 | |
| 265 | |
| 266 | |
