| 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Michael Kurz <michi.kurz@googlemail.com>. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef _AR71XX_GPIO_H |
| 25 | #define _AR71XX_GPIO_H |
| 26 | |
| 27 | #include <common.h> |
| 28 | #include <asm/ar71xx.h> |
| 29 | |
| 30 | static inline void ar71xx_setpin(uint8_t pin, uint8_t state) |
| 31 | { |
| 32 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
| 33 | |
| 34 | if (state != 0) { |
| 35 | reg |= (1 << pin); |
| 36 | } else { |
| 37 | reg &= ~(1 << pin); |
| 38 | } |
| 39 | |
| 40 | writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
| 41 | readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); |
| 42 | } |
| 43 | |
| 44 | static inline uint32_t ar71xx_getpin(uint8_t pin) |
| 45 | { |
| 46 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_IN)); |
| 47 | return (((reg & (1 << pin)) != 0) ? 1 : 0); |
| 48 | } |
| 49 | |
| 50 | static inline void ar71xx_setpindir(uint8_t pin, uint8_t direction) |
| 51 | { |
| 52 | uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
| 53 | |
| 54 | if (direction != 0) { |
| 55 | reg |= (1 << pin); |
| 56 | } else { |
| 57 | reg &= ~(1 << pin); |
| 58 | } |
| 59 | |
| 60 | writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
| 61 | readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); |
| 62 | } |
| 63 | |
| 64 | |
| 65 | #endif /* AR71XX_GPIO_H */ |
| 66 | |
