| 1 | /* |
| 2 | * ALFA Network AP96 board support |
| 3 | * |
| 4 | * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/bitops.h> |
| 13 | #include <linux/gpio.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/mmc/host.h> |
| 16 | #include <linux/spi/spi.h> |
| 17 | #include <linux/spi/mmc_spi.h> |
| 18 | |
| 19 | #include <asm/mach-ath79/ath79.h> |
| 20 | #include <asm/mach-ath79/ar71xx_regs.h> |
| 21 | |
| 22 | #include "common.h" |
| 23 | #include "dev-eth.h" |
| 24 | #include "dev-gpio-buttons.h" |
| 25 | #include "dev-spi.h" |
| 26 | #include "dev-usb.h" |
| 27 | #include "machtypes.h" |
| 28 | #include "pci.h" |
| 29 | |
| 30 | #define ALFA_AP96_GPIO_PCIE_RESET 2 |
| 31 | #define ALFA_AP96_GPIO_SIM_DETECT 3 |
| 32 | #define ALFA_AP96_GPIO_MICROSD_CD 4 |
| 33 | #define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 |
| 34 | |
| 35 | #define ALFA_AP96_GPIO_BUTTON_RESET 11 |
| 36 | |
| 37 | #define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ |
| 38 | #define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) |
| 39 | |
| 40 | static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { |
| 41 | { |
| 42 | .desc = "Reset button", |
| 43 | .type = EV_KEY, |
| 44 | .code = KEY_RESTART, |
| 45 | .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, |
| 46 | .gpio = ALFA_AP96_GPIO_BUTTON_RESET, |
| 47 | .active_low = 1, |
| 48 | } |
| 49 | }; |
| 50 | |
| 51 | static int alfa_ap96_mmc_get_cd(struct device *dev) |
| 52 | { |
| 53 | return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD); |
| 54 | } |
| 55 | |
| 56 | static struct mmc_spi_platform_data alfa_ap96_mmc_data = { |
| 57 | .get_cd = alfa_ap96_mmc_get_cd, |
| 58 | .caps = MMC_CAP_NEEDS_POLL, |
| 59 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
| 60 | }; |
| 61 | |
| 62 | static struct ath79_spi_controller_data ap96_spi0_cdata = { |
| 63 | .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, |
| 64 | .cs_line = 0, |
| 65 | }; |
| 66 | |
| 67 | static struct ath79_spi_controller_data ap96_spi1_cdata = { |
| 68 | .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, |
| 69 | .cs_line = 1, |
| 70 | }; |
| 71 | |
| 72 | static struct ath79_spi_controller_data ap96_spi2_cdata = { |
| 73 | .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, |
| 74 | .cs_line = 2, |
| 75 | }; |
| 76 | |
| 77 | static struct spi_board_info alfa_ap96_spi_info[] = { |
| 78 | { |
| 79 | .bus_num = 0, |
| 80 | .chip_select = 0, |
| 81 | .max_speed_hz = 25000000, |
| 82 | .modalias = "m25p80", |
| 83 | .controller_data = &ap96_spi0_cdata |
| 84 | }, { |
| 85 | .bus_num = 0, |
| 86 | .chip_select = 1, |
| 87 | .max_speed_hz = 25000000, |
| 88 | .modalias = "mmc_spi", |
| 89 | .platform_data = &alfa_ap96_mmc_data, |
| 90 | .controller_data = &ap96_spi1_cdata |
| 91 | }, { |
| 92 | .bus_num = 0, |
| 93 | .chip_select = 2, |
| 94 | .max_speed_hz = 6250000, |
| 95 | .modalias = "rtc-pcf2123", |
| 96 | .controller_data = &ap96_spi2_cdata |
| 97 | }, |
| 98 | }; |
| 99 | |
| 100 | static struct ath79_spi_platform_data alfa_ap96_spi_data = { |
| 101 | .bus_num = 0, |
| 102 | .num_chipselect = 3, |
| 103 | }; |
| 104 | |
| 105 | static void __init alfa_ap96_gpio_setup(void) |
| 106 | { |
| 107 | ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | |
| 108 | AR71XX_GPIO_FUNC_SPI_CS2_EN); |
| 109 | |
| 110 | gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); |
| 111 | gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); |
| 112 | gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); |
| 113 | gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); |
| 114 | gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); |
| 115 | gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); |
| 116 | } |
| 117 | |
| 118 | #define ALFA_AP96_WAN_PHYMASK BIT(4) |
| 119 | #define ALFA_AP96_LAN_PHYMASK BIT(5) |
| 120 | #define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) |
| 121 | |
| 122 | static void __init alfa_ap96_init(void) |
| 123 | { |
| 124 | alfa_ap96_gpio_setup(); |
| 125 | |
| 126 | ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); |
| 127 | |
| 128 | ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); |
| 129 | ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
| 130 | ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; |
| 131 | ath79_eth1_pll_data.pll_1000 = 0x110000; |
| 132 | |
| 133 | ath79_register_eth(0); |
| 134 | |
| 135 | ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); |
| 136 | ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
| 137 | ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; |
| 138 | ath79_eth1_pll_data.pll_1000 = 0x110000; |
| 139 | |
| 140 | ath79_register_eth(1); |
| 141 | |
| 142 | ath79_register_pci(); |
| 143 | ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, |
| 144 | ARRAY_SIZE(alfa_ap96_spi_info)); |
| 145 | |
| 146 | ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, |
| 147 | ARRAY_SIZE(alfa_ap96_gpio_keys), |
| 148 | alfa_ap96_gpio_keys); |
| 149 | ath79_register_usb(); |
| 150 | } |
| 151 | |
| 152 | MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", |
| 153 | alfa_ap96_init); |
| 154 | |
