| 1 | /* |
| 2 | * ALFA Network N2/N5 board support |
| 3 | * |
| 4 | * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/mtd/mtd.h> |
| 12 | #include <linux/mtd/partitions.h> |
| 13 | |
| 14 | #include <asm/mach-ath79/ar71xx_regs.h> |
| 15 | #include <asm/mach-ath79/ath79.h> |
| 16 | |
| 17 | #include "common.h" |
| 18 | #include "dev-eth.h" |
| 19 | #include "dev-ap9x-pci.h" |
| 20 | #include "dev-gpio-buttons.h" |
| 21 | #include "dev-leds-gpio.h" |
| 22 | #include "dev-m25p80.h" |
| 23 | #include "machtypes.h" |
| 24 | |
| 25 | #define ALFA_NX_GPIO_LED_2 17 |
| 26 | #define ALFA_NX_GPIO_LED_3 16 |
| 27 | #define ALFA_NX_GPIO_LED_5 12 |
| 28 | #define ALFA_NX_GPIO_LED_6 8 |
| 29 | #define ALFA_NX_GPIO_LED_7 6 |
| 30 | #define ALFA_NX_GPIO_LED_8 7 |
| 31 | |
| 32 | #define ALFA_NX_GPIO_BTN_RESET 11 |
| 33 | |
| 34 | #define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ |
| 35 | #define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) |
| 36 | |
| 37 | #define ALFA_NX_MAC0_OFFSET 0 |
| 38 | #define ALFA_NX_MAC1_OFFSET 6 |
| 39 | #define ALFA_NX_CALDATA_OFFSET 0x1000 |
| 40 | |
| 41 | static struct mtd_partition alfa_nx_partitions[] = { |
| 42 | { |
| 43 | .name = "u-boot", |
| 44 | .offset = 0, |
| 45 | .size = 0x040000, |
| 46 | .mask_flags = MTD_WRITEABLE, |
| 47 | }, { |
| 48 | .name = "u-boot-env", |
| 49 | .offset = 0x040000, |
| 50 | .size = 0x010000, |
| 51 | .mask_flags = MTD_WRITEABLE, |
| 52 | }, { |
| 53 | .name = "rootfs", |
| 54 | .offset = 0x050000, |
| 55 | .size = 0x600000, |
| 56 | }, { |
| 57 | .name = "kernel", |
| 58 | .offset = 0x650000, |
| 59 | .size = 0x190000, |
| 60 | }, { |
| 61 | .name = "nvram", |
| 62 | .offset = 0x7e0000, |
| 63 | .size = 0x010000, |
| 64 | .mask_flags = MTD_WRITEABLE, |
| 65 | }, { |
| 66 | .name = "art", |
| 67 | .offset = 0x7f0000, |
| 68 | .size = 0x010000, |
| 69 | .mask_flags = MTD_WRITEABLE, |
| 70 | }, { |
| 71 | .name = "firmware", |
| 72 | .offset = 0x050000, |
| 73 | .size = 0x780000, |
| 74 | } |
| 75 | }; |
| 76 | |
| 77 | static struct flash_platform_data alfa_nx_flash_data = { |
| 78 | .parts = alfa_nx_partitions, |
| 79 | .nr_parts = ARRAY_SIZE(alfa_nx_partitions), |
| 80 | }; |
| 81 | |
| 82 | static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { |
| 83 | { |
| 84 | .desc = "Reset button", |
| 85 | .type = EV_KEY, |
| 86 | .code = KEY_RESTART, |
| 87 | .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, |
| 88 | .gpio = ALFA_NX_GPIO_BTN_RESET, |
| 89 | .active_low = 1, |
| 90 | } |
| 91 | }; |
| 92 | |
| 93 | static struct gpio_led alfa_nx_leds_gpio[] __initdata = { |
| 94 | { |
| 95 | .name = "alfa:green:led_2", |
| 96 | .gpio = ALFA_NX_GPIO_LED_2, |
| 97 | .active_low = 1, |
| 98 | }, { |
| 99 | .name = "alfa:green:led_3", |
| 100 | .gpio = ALFA_NX_GPIO_LED_3, |
| 101 | .active_low = 1, |
| 102 | }, { |
| 103 | .name = "alfa:red:led_5", |
| 104 | .gpio = ALFA_NX_GPIO_LED_5, |
| 105 | .active_low = 1, |
| 106 | }, { |
| 107 | .name = "alfa:amber:led_6", |
| 108 | .gpio = ALFA_NX_GPIO_LED_6, |
| 109 | .active_low = 1, |
| 110 | }, { |
| 111 | .name = "alfa:green:led_7", |
| 112 | .gpio = ALFA_NX_GPIO_LED_7, |
| 113 | .active_low = 1, |
| 114 | }, { |
| 115 | .name = "alfa:green:led_8", |
| 116 | .gpio = ALFA_NX_GPIO_LED_8, |
| 117 | .active_low = 1, |
| 118 | } |
| 119 | }; |
| 120 | |
| 121 | static void __init alfa_nx_setup(void) |
| 122 | { |
| 123 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
| 124 | |
| 125 | ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, |
| 126 | AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | |
| 127 | AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | |
| 128 | AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | |
| 129 | AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | |
| 130 | AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); |
| 131 | |
| 132 | ath79_register_m25p80(&alfa_nx_flash_data); |
| 133 | |
| 134 | ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), |
| 135 | alfa_nx_leds_gpio); |
| 136 | |
| 137 | ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, |
| 138 | ARRAY_SIZE(alfa_nx_gpio_keys), |
| 139 | alfa_nx_gpio_keys); |
| 140 | |
| 141 | ath79_register_mdio(0, 0x0); |
| 142 | |
| 143 | ath79_init_mac(ath79_eth0_data.mac_addr, |
| 144 | art + ALFA_NX_MAC0_OFFSET, 0); |
| 145 | ath79_init_mac(ath79_eth1_data.mac_addr, |
| 146 | art + ALFA_NX_MAC1_OFFSET, 0); |
| 147 | |
| 148 | /* WAN port */ |
| 149 | ath79_register_eth(0); |
| 150 | /* LAN port */ |
| 151 | ath79_register_eth(1); |
| 152 | |
| 153 | ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); |
| 154 | } |
| 155 | |
| 156 | MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", |
| 157 | alfa_nx_setup); |
| 158 | |
