Root/target/linux/brcm47xx/patches-3.2/920-cache-wround.patch

1--- a/arch/mips/include/asm/r4kcache.h
2+++ b/arch/mips/include/asm/r4kcache.h
3@@ -20,10 +20,28 @@
4 #ifdef CONFIG_BCM47XX
5 #include <asm/paccess.h>
6 #include <linux/ssb/ssb.h>
7-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
8+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
9+
10+static inline unsigned long bcm4710_dummy_rreg(void)
11+{
12+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
13+}
14+
15+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
16+
17+static inline unsigned long bcm4710_fill_tlb(void *addr)
18+{
19+ return *(unsigned long *)addr;
20+}
21+
22+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
23+
24+static inline void bcm4710_protected_fill_tlb(void *addr)
25+{
26+ unsigned long x;
27+ get_dbe(x, (unsigned long *)addr);;
28+}
29 
30-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
31-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
32 #else
33 #define BCM4710_DUMMY_RREG()
34 
35--- a/arch/mips/mm/tlbex.c
36+++ b/arch/mips/mm/tlbex.c
37@@ -914,6 +914,9 @@ build_get_pgde32(u32 **p, unsigned int t
38 #endif
39     uasm_i_addu(p, ptr, tmp, ptr);
40 #else
41+#ifdef CONFIG_BCM47XX
42+ uasm_i_nop(p);
43+#endif
44     UASM_i_LA_mostly(p, ptr, pgdc);
45 #endif
46     uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
47@@ -1264,12 +1267,12 @@ static void __cpuinit build_r4000_tlb_re
48             /* No need for uasm_i_nop */
49         }
50 
51-#ifdef CONFIG_BCM47XX
52- uasm_i_nop(&p);
53-#endif
54 #ifdef CONFIG_64BIT
55         build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
56 #else
57+# ifdef CONFIG_BCM47XX
58+ uasm_i_nop(&p);
59+# endif
60         build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
61 #endif
62 
63@@ -1281,6 +1284,9 @@ static void __cpuinit build_r4000_tlb_re
64         build_update_entries(&p, K0, K1);
65         build_tlb_write_entry(&p, &l, &r, tlb_random);
66         uasm_l_leave(&l, p);
67+#ifdef CONFIG_BCM47XX
68+ uasm_i_nop(&p);
69+#endif
70         uasm_i_eret(&p); /* return from trap */
71     }
72 #ifdef CONFIG_HUGETLB_PAGE
73@@ -1797,12 +1803,12 @@ build_r4000_tlbchange_handler_head(u32 *
74 {
75     struct work_registers wr = build_get_work_registers(p);
76 
77-#ifdef CONFIG_BCM47XX
78- uasm_i_nop(p);
79-#endif
80 #ifdef CONFIG_64BIT
81     build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
82 #else
83+# ifdef CONFIG_BCM47XX
84+ uasm_i_nop(p);
85+# endif
86     build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
87 #endif
88 
89@@ -1841,6 +1847,9 @@ build_r4000_tlbchange_handler_tail(u32 *
90     build_tlb_write_entry(p, l, r, tlb_indexed);
91     uasm_l_leave(l, *p);
92     build_restore_work_registers(p);
93+#ifdef CONFIG_BCM47XX
94+ uasm_i_nop(p);
95+#endif
96     uasm_i_eret(p); /* return from trap */
97 
98 #ifdef CONFIG_64BIT
99--- a/arch/mips/kernel/genex.S
100+++ b/arch/mips/kernel/genex.S
101@@ -22,6 +22,19 @@
102 #include <asm/page.h>
103 #include <asm/thread_info.h>
104 
105+#ifdef CONFIG_BCM47XX
106+# ifdef eret
107+# undef eret
108+# endif
109+# define eret \
110+ .set push; \
111+ .set noreorder; \
112+ nop; \
113+ nop; \
114+ eret; \
115+ .set pop;
116+#endif
117+
118 #define PANIC_PIC(msg) \
119         .set push; \
120         .set reorder; \
121@@ -54,7 +67,6 @@ NESTED(except_vec3_generic, 0, sp)
122     .set noat
123 #ifdef CONFIG_BCM47XX
124     nop
125- nop
126 #endif
127 #if R5432_CP0_INTERRUPT_WAR
128     mfc0 k0, CP0_INDEX
129@@ -79,6 +91,9 @@ NESTED(except_vec3_r4000, 0, sp)
130     .set push
131     .set mips3
132     .set noat
133+#ifdef CONFIG_BCM47XX
134+ nop
135+#endif
136     mfc0 k1, CP0_CAUSE
137     li k0, 31<<2
138     andi k1, k1, 0x7c
139

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