| 1 | From 2dfa2b3e50c5ac49052233d15fa427a9b9136df8 Mon Sep 17 00:00:00 2001 |
| 2 | From: John Crispin <blogic@openwrt.org> |
| 3 | Date: Thu, 27 Oct 2011 20:06:05 +0200 |
| 4 | Subject: [PATCH 10/22] MIPS: lantiq: fixes STP based gpios |
| 5 | |
| 6 | The STP engine has 3 groups of 8 pins. Only the first was activated by default. |
| 7 | |
| 8 | Signed-off-by: Matti Laakso <malaakso@elisanet.fi> |
| 9 | Signed-off-by: John Crispin <blogic@openwrt.org> |
| 10 | --- |
| 11 | arch/mips/lantiq/xway/gpio_stp.c | 7 +++++-- |
| 12 | 1 files changed, 5 insertions(+), 2 deletions(-) |
| 13 | |
| 14 | --- a/arch/mips/lantiq/xway/gpio_stp.c |
| 15 | +++ b/arch/mips/lantiq/xway/gpio_stp.c |
| 16 | @@ -35,6 +35,8 @@ |
| 17 | #define LTQ_STP_ADSL_SRC (3 << 24) |
| 18 | |
| 19 | #define LTQ_STP_GROUP0 (1 << 0) |
| 20 | +#define LTQ_STP_GROUP1 (1 << 1) |
| 21 | +#define LTQ_STP_GROUP2 (1 << 2) |
| 22 | |
| 23 | #define LTQ_STP_RISING 0 |
| 24 | #define LTQ_STP_FALLING (1 << 26) |
| 25 | @@ -93,8 +95,9 @@ static int ltq_stp_hw_init(void) |
| 26 | /* rising or falling edge */ |
| 27 | ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0); |
| 28 | |
| 29 | - /* per default stp 15-0 are set */ |
| 30 | - ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1); |
| 31 | + /* enable all three led groups */ |
| 32 | + ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2, |
| 33 | + LTQ_STP_CON1); |
| 34 | |
| 35 | /* stp are update periodically by the FPI bus */ |
| 36 | ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); |
| 37 | |
