| 1 | /* |
| 2 | * Ralink RT305x SoC specific definitions |
| 3 | * |
| 4 | * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * Parts of this file are based on Ralink's 2.6.21 BSP |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License version 2 as published |
| 10 | * by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #ifndef _RT305X_H_ |
| 14 | #define _RT305X_H_ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/io.h> |
| 18 | |
| 19 | void rt305x_detect_sys_type(void); |
| 20 | |
| 21 | #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024) |
| 22 | #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024) |
| 23 | |
| 24 | #define RT305X_CPU_IRQ_BASE 0 |
| 25 | #define RT305X_INTC_IRQ_BASE 8 |
| 26 | #define RT305X_INTC_IRQ_COUNT 32 |
| 27 | #define RT305X_GPIO_IRQ_BASE 40 |
| 28 | |
| 29 | #define RT305X_CPU_IRQ_INTC (RT305X_CPU_IRQ_BASE + 2) |
| 30 | #define RT305X_CPU_IRQ_FE (RT305X_CPU_IRQ_BASE + 5) |
| 31 | #define RT305X_CPU_IRQ_WNIC (RT305X_CPU_IRQ_BASE + 6) |
| 32 | #define RT305X_CPU_IRQ_COUNTER (RT305X_CPU_IRQ_BASE + 7) |
| 33 | |
| 34 | #define RT305X_INTC_IRQ_SYSCTL (RT305X_INTC_IRQ_BASE + 0) |
| 35 | #define RT305X_INTC_IRQ_TIMER0 (RT305X_INTC_IRQ_BASE + 1) |
| 36 | #define RT305X_INTC_IRQ_TIMER1 (RT305X_INTC_IRQ_BASE + 2) |
| 37 | #define RT305X_INTC_IRQ_IA (RT305X_INTC_IRQ_BASE + 3) |
| 38 | #define RT305X_INTC_IRQ_PCM (RT305X_INTC_IRQ_BASE + 4) |
| 39 | #define RT305X_INTC_IRQ_UART0 (RT305X_INTC_IRQ_BASE + 5) |
| 40 | #define RT305X_INTC_IRQ_PIO (RT305X_INTC_IRQ_BASE + 6) |
| 41 | #define RT305X_INTC_IRQ_DMA (RT305X_INTC_IRQ_BASE + 7) |
| 42 | #define RT305X_INTC_IRQ_NAND (RT305X_INTC_IRQ_BASE + 8) |
| 43 | #define RT305X_INTC_IRQ_PERFC (RT305X_INTC_IRQ_BASE + 9) |
| 44 | #define RT305X_INTC_IRQ_I2S (RT305X_INTC_IRQ_BASE + 10) |
| 45 | #define RT305X_INTC_IRQ_UART1 (RT305X_INTC_IRQ_BASE + 12) |
| 46 | #define RT305X_INTC_IRQ_ESW (RT305X_INTC_IRQ_BASE + 17) |
| 47 | #define RT305X_INTC_IRQ_OTG (RT305X_INTC_IRQ_BASE + 18) |
| 48 | |
| 49 | extern void __iomem *rt305x_sysc_base; |
| 50 | extern void __iomem *rt305x_memc_base; |
| 51 | |
| 52 | static inline void rt305x_sysc_wr(u32 val, unsigned reg) |
| 53 | { |
| 54 | __raw_writel(val, rt305x_sysc_base + reg); |
| 55 | } |
| 56 | |
| 57 | static inline u32 rt305x_sysc_rr(unsigned reg) |
| 58 | { |
| 59 | return __raw_readl(rt305x_sysc_base + reg); |
| 60 | } |
| 61 | |
| 62 | static inline void rt305x_memc_wr(u32 val, unsigned reg) |
| 63 | { |
| 64 | __raw_writel(val, rt305x_memc_base + reg); |
| 65 | } |
| 66 | |
| 67 | static inline u32 rt305x_memc_rr(unsigned reg) |
| 68 | { |
| 69 | return __raw_readl(rt305x_memc_base + reg); |
| 70 | } |
| 71 | |
| 72 | #define RT305X_GPIO_I2C_SD 1 |
| 73 | #define RT305X_GPIO_I2C_SCLK 2 |
| 74 | #define RT305X_GPIO_SPI_EN 3 |
| 75 | #define RT305X_GPIO_SPI_CLK 4 |
| 76 | #define RT305X_GPIO_SPI_DOUT 5 |
| 77 | #define RT305X_GPIO_SPI_DIN 6 |
| 78 | /* GPIO 7-14 is shared between UART0, PCM and I2S interfaces */ |
| 79 | #define RT305X_GPIO_7 7 |
| 80 | #define RT305X_GPIO_8 8 |
| 81 | #define RT305X_GPIO_9 9 |
| 82 | #define RT305X_GPIO_10 10 |
| 83 | #define RT305X_GPIO_11 11 |
| 84 | #define RT305X_GPIO_12 12 |
| 85 | #define RT305X_GPIO_13 13 |
| 86 | #define RT305X_GPIO_14 14 |
| 87 | #define RT305X_GPIO_UART1_TXD 15 |
| 88 | #define RT305X_GPIO_UART1_RXD 16 |
| 89 | #define RT305X_GPIO_JTAG_TDO 17 |
| 90 | #define RT305X_GPIO_JTAG_TDI 18 |
| 91 | #define RT305X_GPIO_JTAG_TMS 19 |
| 92 | #define RT305X_GPIO_JTAG_TCLK 20 |
| 93 | #define RT305X_GPIO_JTAG_TRST_N 21 |
| 94 | #define RT305X_GPIO_MDIO_MDC 22 |
| 95 | #define RT305X_GPIO_MDIO_MDIO 23 |
| 96 | #define RT305X_GPIO_SDRAM_MD16 24 |
| 97 | #define RT305X_GPIO_SDRAM_MD17 25 |
| 98 | #define RT305X_GPIO_SDRAM_MD18 26 |
| 99 | #define RT305X_GPIO_SDRAM_MD19 27 |
| 100 | #define RT305X_GPIO_SDRAM_MD20 28 |
| 101 | #define RT305X_GPIO_SDRAM_MD21 29 |
| 102 | #define RT305X_GPIO_SDRAM_MD22 30 |
| 103 | #define RT305X_GPIO_SDRAM_MD23 31 |
| 104 | #define RT305X_GPIO_SDRAM_MD24 32 |
| 105 | #define RT305X_GPIO_SDRAM_MD25 33 |
| 106 | #define RT305X_GPIO_SDRAM_MD26 34 |
| 107 | #define RT305X_GPIO_SDRAM_MD27 35 |
| 108 | #define RT305X_GPIO_SDRAM_MD28 36 |
| 109 | #define RT305X_GPIO_SDRAM_MD29 37 |
| 110 | #define RT305X_GPIO_SDRAM_MD30 38 |
| 111 | #define RT305X_GPIO_SDRAM_MD31 39 |
| 112 | #define RT305X_GPIO_GE0_TXD0 40 |
| 113 | #define RT305X_GPIO_GE0_TXD1 41 |
| 114 | #define RT305X_GPIO_GE0_TXD2 42 |
| 115 | #define RT305X_GPIO_GE0_TXD3 43 |
| 116 | #define RT305X_GPIO_GE0_TXEN 44 |
| 117 | #define RT305X_GPIO_GE0_TXCLK 45 |
| 118 | #define RT305X_GPIO_GE0_RXD0 46 |
| 119 | #define RT305X_GPIO_GE0_RXD1 47 |
| 120 | #define RT305X_GPIO_GE0_RXD2 48 |
| 121 | #define RT305X_GPIO_GE0_RXD3 49 |
| 122 | #define RT305X_GPIO_GE0_RXDV 50 |
| 123 | #define RT305X_GPIO_GE0_RXCLK 51 |
| 124 | |
| 125 | void rt305x_gpio_init(u32 mode); |
| 126 | |
| 127 | #endif /* _RT305X_H_ */ |
| 128 | |
