| 1 | /* |
| 2 | * Copyright (c) 2005 Atheros Communications Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * $ATH_LICENSE_HOSTSDK0_C$ |
| 6 | * |
| 7 | */ |
| 8 | |
| 9 | #if defined(AR6001) |
| 10 | #define GPIO_PIN_COUNT 18 |
| 11 | #else |
| 12 | #define GPIO_PIN_COUNT 18 |
| 13 | #endif |
| 14 | |
| 15 | /* |
| 16 | * Possible values for WMIX_GPIO_SET_REGISTER_CMDID. |
| 17 | * NB: These match hardware order, so that addresses can |
| 18 | * easily be computed. |
| 19 | */ |
| 20 | #define GPIO_ID_OUT 0x00000000 |
| 21 | #define GPIO_ID_OUT_W1TS 0x00000001 |
| 22 | #define GPIO_ID_OUT_W1TC 0x00000002 |
| 23 | #define GPIO_ID_ENABLE 0x00000003 |
| 24 | #define GPIO_ID_ENABLE_W1TS 0x00000004 |
| 25 | #define GPIO_ID_ENABLE_W1TC 0x00000005 |
| 26 | #define GPIO_ID_IN 0x00000006 |
| 27 | #define GPIO_ID_STATUS 0x00000007 |
| 28 | #define GPIO_ID_STATUS_W1TS 0x00000008 |
| 29 | #define GPIO_ID_STATUS_W1TC 0x00000009 |
| 30 | #define GPIO_ID_PIN0 0x0000000a |
| 31 | #define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) |
| 32 | |
| 33 | #define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(17) |
| 34 | #define GPIO_ID_NONE 0xffffffff |
| 35 | |
