| 1 | #ifndef _LINUX_LIS302DL_H |
| 2 | #define _LINUX_LIS302DL_H |
| 3 | |
| 4 | #include <linux/types.h> |
| 5 | #include <linux/spi/spi.h> |
| 6 | #include <linux/input.h> |
| 7 | #include <linux/workqueue.h> |
| 8 | |
| 9 | struct lis302dl_info; |
| 10 | |
| 11 | struct lis302dl_platform_data { |
| 12 | char *name; |
| 13 | unsigned long pin_chip_select; |
| 14 | unsigned long pin_clk; |
| 15 | unsigned long pin_mosi; |
| 16 | unsigned long pin_miso; |
| 17 | int open_drain; |
| 18 | int interrupt; |
| 19 | void (*lis302dl_suspend_io)(struct lis302dl_info *, int resuming); |
| 20 | }; |
| 21 | |
| 22 | struct lis302dl_info { |
| 23 | struct lis302dl_platform_data *pdata; |
| 24 | struct device *dev; |
| 25 | struct input_dev *input_dev; |
| 26 | unsigned int flags; |
| 27 | unsigned int threshold; |
| 28 | unsigned int duration; |
| 29 | u32 overruns; |
| 30 | struct { |
| 31 | unsigned int threshold; /* mg */ |
| 32 | unsigned int duration; /* ms */ |
| 33 | } wakeup; |
| 34 | |
| 35 | struct spi_device *spi; |
| 36 | u_int8_t regs[0x40]; |
| 37 | }; |
| 38 | |
| 39 | enum lis302dl_reg { |
| 40 | LIS302DL_REG_WHO_AM_I = 0x0f, |
| 41 | LIS302DL_REG_CTRL1 = 0x20, |
| 42 | LIS302DL_REG_CTRL2 = 0x21, |
| 43 | LIS302DL_REG_CTRL3 = 0x22, |
| 44 | LIS302DL_REG_HP_FILTER_RESET = 0x23, |
| 45 | LIS302DL_REG_STATUS = 0x27, |
| 46 | LIS302DL_REG_OUT_X = 0x29, |
| 47 | LIS302DL_REG_OUT_Y = 0x2b, |
| 48 | LIS302DL_REG_OUT_Z = 0x2d, |
| 49 | LIS302DL_REG_FF_WU_CFG_1 = 0x30, |
| 50 | LIS302DL_REG_FF_WU_SRC_1 = 0x31, |
| 51 | LIS302DL_REG_FF_WU_THS_1 = 0x32, |
| 52 | LIS302DL_REG_FF_WU_DURATION_1 = 0x33, |
| 53 | LIS302DL_REG_FF_WU_CFG_2 = 0x34, |
| 54 | LIS302DL_REG_FF_WU_SRC_2 = 0x35, |
| 55 | LIS302DL_REG_FF_WU_THS_2 = 0x36, |
| 56 | LIS302DL_REG_FF_WU_DURATION_2 = 0x37, |
| 57 | LIS302DL_REG_CLICK_CFG = 0x38, |
| 58 | LIS302DL_REG_CLICK_SRC = 0x39, |
| 59 | LIS302DL_REG_CLICK_THSY_X = 0x3b, |
| 60 | LIS302DL_REG_CLICK_THSZ = 0x3c, |
| 61 | LIS302DL_REG_CLICK_TIME_LIMIT = 0x3d, |
| 62 | LIS302DL_REG_CLICK_LATENCY = 0x3e, |
| 63 | LIS302DL_REG_CLICK_WINDOW = 0x3f, |
| 64 | }; |
| 65 | |
| 66 | enum lis302dl_reg_ctrl1 { |
| 67 | LIS302DL_CTRL1_Xen = 0x01, |
| 68 | LIS302DL_CTRL1_Yen = 0x02, |
| 69 | LIS302DL_CTRL1_Zen = 0x04, |
| 70 | LIS302DL_CTRL1_STM = 0x08, |
| 71 | LIS302DL_CTRL1_STP = 0x10, |
| 72 | LIS302DL_CTRL1_FS = 0x20, |
| 73 | LIS302DL_CTRL1_PD = 0x40, |
| 74 | LIS302DL_CTRL1_DR = 0x80, |
| 75 | }; |
| 76 | |
| 77 | enum lis302dl_reg_ctrl2 { |
| 78 | LIS302DL_CTRL2_HPC1 = 0x01, |
| 79 | LIS302DL_CTRL2_HPC2 = 0x02, |
| 80 | LIS302DL_CTRL2_HPFF1 = 0x04, |
| 81 | LIS302DL_CTRL2_HPFF2 = 0x08, |
| 82 | LIS302DL_CTRL2_FDS = 0x10, |
| 83 | LIS302DL_CTRL2_BOOT = 0x40, |
| 84 | LIS302DL_CTRL2_SIM = 0x80, |
| 85 | }; |
| 86 | enum lis302dl_reg_ctrl3 { |
| 87 | LIS302DL_CTRL3_PP_OD = 0x40, |
| 88 | LIS302DL_CTRL3_IHL = 0x80, |
| 89 | }; |
| 90 | |
| 91 | enum lis302dl_reg_status { |
| 92 | LIS302DL_STATUS_XDA = 0x01, |
| 93 | LIS302DL_STATUS_YDA = 0x02, |
| 94 | LIS302DL_STATUS_ZDA = 0x04, |
| 95 | LIS302DL_STATUS_XYZDA = 0x08, |
| 96 | LIS302DL_STATUS_XOR = 0x10, |
| 97 | LIS302DL_STATUS_YOR = 0x20, |
| 98 | LIS302DL_STATUS_ZOR = 0x40, |
| 99 | LIS302DL_STATUS_XYZOR = 0x80, |
| 100 | }; |
| 101 | |
| 102 | /* Wakeup/freefall interrupt defs */ |
| 103 | enum lis302dl_reg_ffwucfg { |
| 104 | LIS302DL_FFWUCFG_XLIE = 0x01, |
| 105 | LIS302DL_FFWUCFG_XHIE = 0x02, |
| 106 | LIS302DL_FFWUCFG_YLIE = 0x04, |
| 107 | LIS302DL_FFWUCFG_YHIE = 0x08, |
| 108 | LIS302DL_FFWUCFG_ZLIE = 0x10, |
| 109 | LIS302DL_FFWUCFG_ZHIE = 0x20, |
| 110 | LIS302DL_FFWUCFG_LIR = 0x40, |
| 111 | LIS302DL_FFWUCFG_AOI = 0x80, |
| 112 | }; |
| 113 | |
| 114 | enum lis302dl_reg_ffwuths { |
| 115 | LIS302DL_FFWUTHS_DCRM = 0x80, |
| 116 | }; |
| 117 | |
| 118 | enum lis302dl_reg_ffwusrc { |
| 119 | LIS302DL_FFWUSRC_XL = 0x01, |
| 120 | LIS302DL_FFWUSRC_XH = 0x02, |
| 121 | LIS302DL_FFWUSRC_YL = 0x04, |
| 122 | LIS302DL_FFWUSRC_YH = 0x08, |
| 123 | LIS302DL_FFWUSRC_ZL = 0x10, |
| 124 | LIS302DL_FFWUSRC_ZH = 0x20, |
| 125 | LIS302DL_FFWUSRC_IA = 0x40, |
| 126 | }; |
| 127 | |
| 128 | enum lis302dl_reg_cloik_src { |
| 129 | LIS302DL_CLICKSRC_SINGLE_X = 0x01, |
| 130 | LIS302DL_CLICKSRC_DOUBLE_X = 0x02, |
| 131 | LIS302DL_CLICKSRC_SINGLE_Y = 0x04, |
| 132 | LIS302DL_CLICKSRC_DOUBLE_Y = 0x08, |
| 133 | LIS302DL_CLICKSRC_SINGLE_Z = 0x10, |
| 134 | LIS302DL_CLICKSRC_DOUBLE_Z = 0x20, |
| 135 | LIS302DL_CLICKSRC_IA = 0x40, |
| 136 | }; |
| 137 | |
| 138 | #define LIS302DL_WHO_AM_I_MAGIC 0x3b |
| 139 | |
| 140 | #define LIS302DL_F_WUP_FF_1 0x0001 /* wake up from free fall */ |
| 141 | #define LIS302DL_F_WUP_FF_2 0x0002 |
| 142 | #define LIS302DL_F_WUP_FF 0x0003 |
| 143 | #define LIS302DL_F_WUP_CLICK 0x0004 |
| 144 | #define LIS302DL_F_POWER 0x0010 |
| 145 | #define LIS302DL_F_FS 0x0020 /* ADC full scale */ |
| 146 | #define LIS302DL_F_INPUT_OPEN 0x0040 /* Set if input device is opened */ |
| 147 | #define LIS302DL_F_IRQ_WAKE 0x0080 /* IRQ is setup in wake mode */ |
| 148 | #define LIS302DL_F_DR 0x0100 /* Data rate, 400Hz/100Hz */ |
| 149 | |
| 150 | |
| 151 | #endif /* _LINUX_LIS302DL_H */ |
| 152 | |
| 153 | |
