| 1 | /* |
| 2 | * arch/ubicom32/include/asm/cacheflush.h |
| 3 | * Cache flushing definitions for Ubicom32 architecture. |
| 4 | * |
| 5 | * (C) Copyright 2009, Ubicom, Inc. |
| 6 | * |
| 7 | * This file is part of the Ubicom32 Linux Kernel Port. |
| 8 | * |
| 9 | * The Ubicom32 Linux Kernel Port is free software: you can redistribute |
| 10 | * it and/or modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation, either version 2 of the |
| 12 | * License, or (at your option) any later version. |
| 13 | * |
| 14 | * The Ubicom32 Linux Kernel Port is distributed in the hope that it |
| 15 | * will be useful, but WITHOUT ANY WARRANTY; without even the implied |
| 16 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
| 17 | * the GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with the Ubicom32 Linux Kernel Port. If not, |
| 21 | * see <http://www.gnu.org/licenses/>. |
| 22 | * |
| 23 | * Ubicom32 implementation derived from (with many thanks): |
| 24 | * arch/m68knommu |
| 25 | * arch/blackfin |
| 26 | * arch/parisc |
| 27 | */ |
| 28 | #ifndef _ASM_UBICOM32_CACHEFLUSH_H |
| 29 | #define _ASM_UBICOM32_CACHEFLUSH_H |
| 30 | |
| 31 | /* |
| 32 | * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com> |
| 33 | */ |
| 34 | #include <linux/mm.h> |
| 35 | #include <asm/cachectl.h> |
| 36 | #include <asm/ip5000.h> |
| 37 | |
| 38 | #define flush_cache_all() __flush_cache_all() |
| 39 | #define flush_cache_mm(mm) do { } while (0) |
| 40 | #define flush_cache_dup_mm(mm) do { } while (0) |
| 41 | #define flush_cache_range(vma, start, end) __flush_cache_all() |
| 42 | #define flush_cache_page(vma, vmaddr) do { } while (0) |
| 43 | #define flush_dcache_page(page) do { } while (0) |
| 44 | #define flush_dcache_mmap_lock(mapping) do { } while (0) |
| 45 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) |
| 46 | |
| 47 | #define flush_dcache_range(start, end) \ |
| 48 | do { \ |
| 49 | /* Flush the data cache and invalidate the I cache. */ \ |
| 50 | mem_cache_control(DCCR_BASE, start, end, CCR_CTRL_FLUSH_ADDR); \ |
| 51 | mem_cache_control(ICCR_BASE, start, end, CCR_CTRL_INV_ADDR); \ |
| 52 | } while (0) |
| 53 | |
| 54 | #define flush_icache_range(start, end) \ |
| 55 | do { \ |
| 56 | /* Flush the data cache and invalidate the I cache. */ \ |
| 57 | mem_cache_control(DCCR_BASE, start, end, CCR_CTRL_FLUSH_ADDR); \ |
| 58 | mem_cache_control(ICCR_BASE, start, end, CCR_CTRL_INV_ADDR); \ |
| 59 | } while (0) |
| 60 | |
| 61 | #define flush_icache_page(vma,pg) do { } while (0) |
| 62 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) |
| 63 | #define flush_cache_vmap(start, end) do { } while (0) |
| 64 | #define flush_cache_vunmap(start, end) do { } while (0) |
| 65 | |
| 66 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 67 | memcpy(dst, src, len) |
| 68 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
| 69 | memcpy(dst, src, len) |
| 70 | |
| 71 | /* |
| 72 | * Cache handling for IP5000 |
| 73 | */ |
| 74 | extern inline void mem_cache_invalidate_all(unsigned long cc) |
| 75 | { |
| 76 | if (cc == DCCR_BASE) |
| 77 | UBICOM32_LOCK(DCCR_LOCK_BIT); |
| 78 | else |
| 79 | UBICOM32_LOCK(ICCR_LOCK_BIT); |
| 80 | |
| 81 | asm volatile ( |
| 82 | " bset "D(CCR_CTRL)"(%0), "D(CCR_CTRL)"(%0), #"D(CCR_CTRL_RESET)" \n\t" |
| 83 | " nop \n\t" |
| 84 | " bclr "D(CCR_CTRL)"(%0), "D(CCR_CTRL)"(%0), #"D(CCR_CTRL_RESET)" \n\t" |
| 85 | " pipe_flush 0 \n\t" |
| 86 | : |
| 87 | : "a"(cc) |
| 88 | : "cc" |
| 89 | ); |
| 90 | |
| 91 | if (cc == DCCR_BASE) |
| 92 | UBICOM32_UNLOCK(DCCR_LOCK_BIT); |
| 93 | else |
| 94 | UBICOM32_UNLOCK(ICCR_LOCK_BIT); |
| 95 | |
| 96 | } |
| 97 | |
| 98 | static inline void __flush_cache_all(void) |
| 99 | { |
| 100 | /* |
| 101 | * Flush Icache |
| 102 | */ |
| 103 | mem_cache_invalidate_all(ICCR_BASE); |
| 104 | |
| 105 | /* |
| 106 | * Flush Dcache |
| 107 | */ |
| 108 | mem_cache_invalidate_all(DCCR_BASE); |
| 109 | } |
| 110 | |
| 111 | #endif /* _ASM_UBICOM32_CACHEFLUSH_H */ |
| 112 | |
