| 1 | /* |
| 2 | * arch/ubicom32/include/asm/ip5000-asm.h |
| 3 | * Instruction macros for the IP5000. |
| 4 | * |
| 5 | * (C) Copyright 2009, Ubicom, Inc. |
| 6 | * |
| 7 | * This file is part of the Ubicom32 Linux Kernel Port. |
| 8 | * |
| 9 | * The Ubicom32 Linux Kernel Port is free software: you can redistribute |
| 10 | * it and/or modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation, either version 2 of the |
| 12 | * License, or (at your option) any later version. |
| 13 | * |
| 14 | * The Ubicom32 Linux Kernel Port is distributed in the hope that it |
| 15 | * will be useful, but WITHOUT ANY WARRANTY; without even the implied |
| 16 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
| 17 | * the GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with the Ubicom32 Linux Kernel Port. If not, |
| 21 | * see <http://www.gnu.org/licenses/>. |
| 22 | * |
| 23 | * Ubicom32 implementation derived from (with many thanks): |
| 24 | * arch/m68knommu |
| 25 | * arch/blackfin |
| 26 | * arch/parisc |
| 27 | */ |
| 28 | |
| 29 | #ifndef _ASM_UBICOM32_IP5000_ASM_H |
| 30 | #define _ASM_UBICOM32_IP5000_ASM_H |
| 31 | |
| 32 | #if !defined(__LINKER__) |
| 33 | |
| 34 | #if defined(__ASSEMBLY__) |
| 35 | .macro cycles quant |
| 36 | .if (\quant) == 1 |
| 37 | nop |
| 38 | .else |
| 39 | .if (((\quant) + 3) / 8) > 0 |
| 40 | .rept (((\quant) + 3) / 8) |
| 41 | jmpt.f .+4 |
| 42 | .endr |
| 43 | .endif |
| 44 | .if ((((\quant) + 3) % 8) / 4) > 0 |
| 45 | jmpt.t .+4 |
| 46 | .endif |
| 47 | .endif |
| 48 | .endm |
| 49 | #else |
| 50 | /* |
| 51 | * Same macro as above just in C inline asm |
| 52 | */ |
| 53 | asm (" \n\ |
| 54 | .macro cycles quant \n\ |
| 55 | .if (\\quant) == 1 \n\ |
| 56 | nop \n\ |
| 57 | .else \n\ |
| 58 | .if (((\\quant) + 3) / 8) > 0 \n\ |
| 59 | .rept (((\\quant) + 3) / 8) \n\ |
| 60 | jmpt.f .+4 \n\ |
| 61 | .endr \n\ |
| 62 | .endif \n\ |
| 63 | .if ((((\\quant) + 3) % 8) / 4) > 0 \n\ |
| 64 | jmpt.t .+4 \n\ |
| 65 | .endif \n\ |
| 66 | .endif \n\ |
| 67 | .endm \n\ |
| 68 | "); |
| 69 | #endif |
| 70 | |
| 71 | |
| 72 | #if defined(__ASSEMBLY__) |
| 73 | .macro pipe_flush cyc |
| 74 | cycles 11 - (\cyc) |
| 75 | .endm |
| 76 | #else |
| 77 | /* |
| 78 | * Same macro as above just in C inline asm |
| 79 | */ |
| 80 | asm (" \n\ |
| 81 | .macro pipe_flush cyc \n\ |
| 82 | cycles 11 - (\\cyc) \n\ |
| 83 | .endm \n\ |
| 84 | "); |
| 85 | |
| 86 | #endif |
| 87 | |
| 88 | #if defined(__ASSEMBLY__) |
| 89 | .macro setcsr_flush cyc |
| 90 | cycles 5 - (\cyc) |
| 91 | .endm |
| 92 | #else |
| 93 | /* |
| 94 | * Same macro as above just in C inline asm |
| 95 | */ |
| 96 | asm (" \n\ |
| 97 | .macro setcsr_flush cyc \n\ |
| 98 | cycles 5 - (\\cyc) \n\ |
| 99 | .endm \n\ |
| 100 | "); |
| 101 | #endif |
| 102 | |
| 103 | /* |
| 104 | * Macros for prefetch (using miss-aligned memory write) |
| 105 | */ |
| 106 | #if defined(__ASSEMBLY__) |
| 107 | |
| 108 | .macro pre_fetch_macro thread_num, Ascratch, Aaddress length |
| 109 | bclr MT_TRAP_EN, MT_TRAP_EN, #(\thread_num) |
| 110 | bset \Ascratch, \Aaddress, #0 ; force a miss-aligned address |
| 111 | jmpt.t .+4 ; delay for both address setup and trap disable |
| 112 | move.4 (\Ascratch), #0 |
| 113 | .if (\length > 32) |
| 114 | move.4 32(\Ascratch), #0 |
| 115 | .endif |
| 116 | .if (\length > 64) |
| 117 | move.4 64(\Ascratch), #0 |
| 118 | .endif |
| 119 | .if (\length > 96) |
| 120 | move.4 96(\Ascratch), #0 |
| 121 | .endif |
| 122 | .if (\length > 128) |
| 123 | invalid_instruction ; maximum pre-fetch size is 4 cache lines |
| 124 | .endif |
| 125 | bset MT_TRAP_EN, MT_TRAP_EN, #(\thread_num) |
| 126 | .endm |
| 127 | |
| 128 | #else |
| 129 | /* |
| 130 | * Same macro as above just in C inline asm |
| 131 | */ |
| 132 | asm (" \n\ |
| 133 | .macro pre_fetch_macro thread_num, Ascratch, Aaddress length \n\ |
| 134 | bclr MT_TRAP_EN, MT_TRAP_EN, #(\thread_num) \n\ |
| 135 | bset \\Ascratch, \\Aaddress, #0 ; force a miss-aligned address \n\ |
| 136 | jmpt.t .+4 ; delay for both address setup and trap disable \n\ |
| 137 | move.4 (\\Ascratch), #0 \n\ |
| 138 | .if (\\length > 32) \n\ |
| 139 | move.4 32(\\Ascratch), #0 \n\ |
| 140 | .endif \n\ |
| 141 | .if (\\length > 64) \n\ |
| 142 | move.4 64(\\Ascratch), #0 \n\ |
| 143 | .endif \n\ |
| 144 | .if (\\length > 96) \n\ |
| 145 | move.4 96(\\Ascratch), #0 \n\ |
| 146 | .endif \n\ |
| 147 | .if (\\length > 128) \n\ |
| 148 | invalid_instruction ; maximum pre-fetch size is 4 cache lines \n\ |
| 149 | .endif \n\ |
| 150 | bset MT_TRAP_EN, MT_TRAP_EN, #(\\thread_num) \n\ |
| 151 | .endm \n\ |
| 152 | "); |
| 153 | #endif |
| 154 | |
| 155 | #endif /* !defined(__LINKER__) */ |
| 156 | #endif /* defined _ASM_UBICOM32_IP5000_ASM_H */ |
| 157 | |
