| 1 | /* |
| 2 | * arch/ubicom32/kernel/module.c |
| 3 | * Ubicom32 architecture loadable module support. |
| 4 | * |
| 5 | * (C) Copyright 2009, Ubicom, Inc. |
| 6 | * |
| 7 | * This file is part of the Ubicom32 Linux Kernel Port. |
| 8 | * |
| 9 | * The Ubicom32 Linux Kernel Port is free software: you can redistribute |
| 10 | * it and/or modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation, either version 2 of the |
| 12 | * License, or (at your option) any later version. |
| 13 | * |
| 14 | * The Ubicom32 Linux Kernel Port is distributed in the hope that it |
| 15 | * will be useful, but WITHOUT ANY WARRANTY; without even the implied |
| 16 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
| 17 | * the GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with the Ubicom32 Linux Kernel Port. If not, |
| 21 | * see <http://www.gnu.org/licenses/>. |
| 22 | * |
| 23 | * Ubicom32 implementation derived from (with many thanks): |
| 24 | * arch/m68knommu |
| 25 | * arch/blackfin |
| 26 | * arch/parisc |
| 27 | */ |
| 28 | #include <linux/moduleloader.h> |
| 29 | #include <linux/bug.h> |
| 30 | #include <linux/elf.h> |
| 31 | #include <linux/vmalloc.h> |
| 32 | #include <linux/fs.h> |
| 33 | #include <linux/string.h> |
| 34 | #include <linux/kernel.h> |
| 35 | #include <asm/ocm-alloc.h> |
| 36 | |
| 37 | #if 0 |
| 38 | #define DEBUGP printk |
| 39 | #else |
| 40 | #define DEBUGP(fmt...) |
| 41 | #endif |
| 42 | |
| 43 | static void _module_free_ocm(struct module *mod) |
| 44 | { |
| 45 | printk(KERN_INFO "module arch cleanup %s: OCM instruction memory free " |
| 46 | " of %d @%p\n", mod->name, mod->arch.ocm_inst_size, |
| 47 | mod->arch.ocm_inst); |
| 48 | |
| 49 | if (mod->arch.ocm_inst) { |
| 50 | ocm_inst_free(mod->arch.ocm_inst); |
| 51 | mod->arch.ocm_inst = 0; |
| 52 | mod->arch.ocm_inst_size = 0; |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | void *module_alloc(unsigned long size) |
| 57 | { |
| 58 | if (size == 0) |
| 59 | return NULL; |
| 60 | return vmalloc(size); |
| 61 | } |
| 62 | |
| 63 | |
| 64 | /* Free memory returned from module_alloc */ |
| 65 | void module_free(struct module *mod, void *module_region) |
| 66 | { |
| 67 | vfree(module_region); |
| 68 | /* FIXME: If module_region == mod->init_region, trim exception |
| 69 | table entries. */ |
| 70 | |
| 71 | /* |
| 72 | * This is expected to be final module free, use this to prune the |
| 73 | * ocm |
| 74 | */ |
| 75 | if (module_region && module_region == mod->module_core) |
| 76 | _module_free_ocm(mod); |
| 77 | |
| 78 | } |
| 79 | |
| 80 | /* |
| 81 | * module_frob_arch_sections() |
| 82 | * Called from kernel/module.c allowing arch specific handling of |
| 83 | * sections/headers. |
| 84 | */ |
| 85 | int module_frob_arch_sections(Elf_Ehdr *hdr, |
| 86 | Elf_Shdr *sechdrs, |
| 87 | char *secstrings, |
| 88 | struct module *mod) |
| 89 | { |
| 90 | Elf_Shdr *s, *sechdrs_end; |
| 91 | void *ocm_inst = NULL; |
| 92 | int ocm_inst_size = 0; |
| 93 | |
| 94 | /* |
| 95 | * Ubicom32 v3 and v4 are almost binary compatible but not completely. |
| 96 | * To be safe check that the module was compiled with the correct -march |
| 97 | * which is flags. |
| 98 | */ |
| 99 | #ifdef CONFIG_UBICOM32_V4 |
| 100 | if ((hdr->e_flags & 0xFFFF) != EF_UBICOM32_V4) { |
| 101 | printk(KERN_WARNING "Module %s was not compiled for " |
| 102 | "ubicom32v4, elf_flags:%x,\n", |
| 103 | mod->name, hdr->e_flags); |
| 104 | return -ENOEXEC; |
| 105 | } |
| 106 | #elif defined CONFIG_UBICOM32_V3 |
| 107 | if ((hdr->e_flags & 0xFFFF) != EF_UBICOM32_V3) { |
| 108 | printk(KERN_WARNING "Module %s was not compiled for " |
| 109 | "ubicom32v3, elf_flags:%x\n", |
| 110 | mod->name, hdr->e_flags); |
| 111 | return -ENOEXEC; |
| 112 | } |
| 113 | #else |
| 114 | #error Unknown/Unsupported ubicom32 architecture. |
| 115 | #endif |
| 116 | |
| 117 | /* |
| 118 | * XXX: sechdrs are vmalloced in kernel/module.c |
| 119 | * and would be vfreed just after module is loaded, |
| 120 | * so we hack to keep the only information we needed |
| 121 | * in mod->arch to correctly free L1 I/D sram later. |
| 122 | * NOTE: this breaks the semantic of mod->arch structure. |
| 123 | */ |
| 124 | sechdrs_end = sechdrs + hdr->e_shnum; |
| 125 | for (s = sechdrs; s < sechdrs_end; ++s) { |
| 126 | if (strncmp(".ocm_text", secstrings + s->sh_name, 9) == 0) |
| 127 | ocm_inst_size += s->sh_size; |
| 128 | } |
| 129 | |
| 130 | if (!ocm_inst_size) |
| 131 | return 0; |
| 132 | |
| 133 | ocm_inst = ocm_inst_alloc(ocm_inst_size, 0 /* internal */); |
| 134 | if (ocm_inst == NULL) { |
| 135 | #ifdef CONFIG_OCM_MODULES_FALLBACK_TO_DDR |
| 136 | printk(KERN_WARNING |
| 137 | "module %s: OCM instruction memory allocation of %d" |
| 138 | "failed, fallback to DDR\n", mod->name, ocm_inst_size); |
| 139 | return 0; |
| 140 | #else |
| 141 | printk(KERN_ERR |
| 142 | "module %s: OCM instruction memory allocation of %d" |
| 143 | "failed.\n", mod->name, ocm_inst_size); |
| 144 | return -ENOMEM; |
| 145 | #endif |
| 146 | } |
| 147 | |
| 148 | mod->arch.ocm_inst = ocm_inst; |
| 149 | mod->arch.ocm_inst_size = ocm_inst_size; |
| 150 | |
| 151 | printk(KERN_INFO |
| 152 | "module %s: OCM instruction memory allocation of %d @%p\n", |
| 153 | mod->name, mod->arch.ocm_inst_size, mod->arch.ocm_inst); |
| 154 | |
| 155 | for (s = sechdrs; s < sechdrs_end; ++s) { |
| 156 | if (strncmp(".ocm_text", secstrings + s->sh_name, 9) == 0) { |
| 157 | memcpy(ocm_inst, (void *)s->sh_addr, s->sh_size); |
| 158 | s->sh_flags &= ~SHF_ALLOC; |
| 159 | s->sh_addr = (unsigned long)ocm_inst; |
| 160 | ocm_inst += s->sh_size; |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | int apply_relocate(Elf32_Shdr *sechdrs, |
| 168 | const char *strtab, |
| 169 | unsigned int symindex, |
| 170 | unsigned int relsec, |
| 171 | struct module *me) |
| 172 | { |
| 173 | DEBUGP("Invalid Applying relocate section %u to %u\n", relsec, |
| 174 | sechdrs[relsec].sh_info); |
| 175 | return -EINVAL; |
| 176 | } |
| 177 | |
| 178 | int apply_relocate_add(Elf32_Shdr *sechdrs, |
| 179 | const char *strtab, |
| 180 | unsigned int symindex, |
| 181 | unsigned int relsec, |
| 182 | struct module *me) |
| 183 | { |
| 184 | unsigned int i; |
| 185 | Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr; |
| 186 | Elf32_Sym *sym; |
| 187 | uint32_t *location; |
| 188 | uint32_t insn; |
| 189 | |
| 190 | DEBUGP("Applying relocate_add section %u to %u\n", relsec, |
| 191 | sechdrs[relsec].sh_info); |
| 192 | for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { |
| 193 | uint32_t v; |
| 194 | const int elf32_rtype = ELF32_R_TYPE(rel[i].r_info); |
| 195 | |
| 196 | /* This is where to make the change */ |
| 197 | location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr |
| 198 | + rel[i].r_offset; |
| 199 | /* This is the symbol it is referring to. Note that all |
| 200 | undefined symbols have been resolved. */ |
| 201 | sym = (Elf32_Sym *)sechdrs[symindex].sh_addr |
| 202 | + ELF32_R_SYM(rel[i].r_info); |
| 203 | |
| 204 | v = rel[i].r_addend + sym->st_value; |
| 205 | |
| 206 | |
| 207 | switch (elf32_rtype) { |
| 208 | case R_UBICOM32_32: |
| 209 | { |
| 210 | /* |
| 211 | * Store the 32 bit relocation as is. |
| 212 | */ |
| 213 | *location = v; |
| 214 | break; |
| 215 | } |
| 216 | case R_UBICOM32_HI24: |
| 217 | { |
| 218 | /* |
| 219 | * 24 bit relocation that is part of the MOVEAI |
| 220 | * instruction. The 24 bits come from bits 7 - 30 of the |
| 221 | * relocation. Theses bits eventually get split into 2 |
| 222 | * fields in the instruction encoding. |
| 223 | * |
| 224 | * - Bits 7 - 27 of the relocation are encoded into bits |
| 225 | * 0 - 20 of the instruction. |
| 226 | * |
| 227 | * - Bits 28 - 30 of the relocation are encoded into |
| 228 | * bit 24 - 26 of the instruction. |
| 229 | */ |
| 230 | uint32_t valid24 = (v >> 7) & 0xffffff; |
| 231 | insn = *location; |
| 232 | |
| 233 | insn &= ~(0x1fffff | (0x7 << 24)); |
| 234 | insn |= (valid24 & 0x1fffff); |
| 235 | insn |= ((valid24 & 0xe00000) << 3); |
| 236 | *location = insn; |
| 237 | } |
| 238 | break; |
| 239 | case R_UBICOM32_LO7_S: |
| 240 | case R_UBICOM32_LO7_2_S: |
| 241 | case R_UBICOM32_LO7_4_S: |
| 242 | { |
| 243 | /* |
| 244 | * Bits 0 - 6 of the relocation are encoded into the |
| 245 | * 7bit unsigned immediate fields of the SOURCE-1 field |
| 246 | * of the instruction. The immediate value is left |
| 247 | * shifted by (0, 1, 2) based on the operand size. |
| 248 | */ |
| 249 | uint32_t valid7 = v & 0x7f; |
| 250 | insn = *location; |
| 251 | |
| 252 | if (elf32_rtype == R_UBICOM32_LO7_2_S) { |
| 253 | valid7 >>= 1; |
| 254 | } else if (elf32_rtype == R_UBICOM32_LO7_4_S) { |
| 255 | valid7 >>= 2; |
| 256 | } |
| 257 | |
| 258 | insn &= ~(0x1f | (0x3 << 8)); |
| 259 | insn |= (valid7 & 0x1f); |
| 260 | insn |= ((valid7 & 0x60) << 3); |
| 261 | *location = insn; |
| 262 | } |
| 263 | break; |
| 264 | case R_UBICOM32_LO7_D: |
| 265 | case R_UBICOM32_LO7_2_D: |
| 266 | case R_UBICOM32_LO7_4_D: |
| 267 | { |
| 268 | /* |
| 269 | * Bits 0 - 6 of the relocation are encoded into the |
| 270 | * 7bit unsigned immediate fields of the DESTINATION |
| 271 | * field of the instruction. The immediate value is |
| 272 | * left shifted by (0, 1, 2) based on the operand size. |
| 273 | */ |
| 274 | uint32_t valid7 = v & 0x7f; |
| 275 | insn = *location; |
| 276 | |
| 277 | if (elf32_rtype == R_UBICOM32_LO7_2_D) { |
| 278 | valid7 >>= 1; |
| 279 | } else if (elf32_rtype == R_UBICOM32_LO7_4_D) { |
| 280 | valid7 >>= 2; |
| 281 | } |
| 282 | |
| 283 | insn &= ~((0x1f | (0x3 << 8)) << 16); |
| 284 | insn |= ((valid7 & 0x1f) << 16); |
| 285 | insn |= ((valid7 & 0x60) << 19); |
| 286 | *location = insn; |
| 287 | } |
| 288 | break; |
| 289 | case R_UBICOM32_LO7_CALLI: |
| 290 | case R_UBICOM32_LO16_CALLI: |
| 291 | { |
| 292 | /* |
| 293 | * Extract the offset for a CALLI instruction. The |
| 294 | * offsets can be either 7 bits or 18 bits. Since all |
| 295 | * instructions in ubicom32 architecture are at work |
| 296 | * aligned addresses the truncated offset is right |
| 297 | * shifted by 2 before being encoded in the instruction. |
| 298 | */ |
| 299 | uint32_t val; |
| 300 | if (elf32_rtype == R_UBICOM32_LO7_CALLI) { |
| 301 | val = v & 0x7f; |
| 302 | } else { |
| 303 | val = v & 0x3ffff; |
| 304 | } |
| 305 | |
| 306 | val >>= 2; |
| 307 | |
| 308 | insn = *location; |
| 309 | |
| 310 | insn &= ~0x071f071f; |
| 311 | insn |= (val & 0x1f) << 0; |
| 312 | val >>= 5; |
| 313 | insn |= (val & 0x07) << 8; |
| 314 | val >>= 3; |
| 315 | insn |= (val & 0x1f) << 16; |
| 316 | val >>= 5; |
| 317 | insn |= (val & 0x07) << 24; |
| 318 | *location = insn; |
| 319 | } |
| 320 | break; |
| 321 | case R_UBICOM32_24_PCREL: |
| 322 | { |
| 323 | /* |
| 324 | * Extract 26 bit signed PC relative offset for CALL |
| 325 | * instructions. Since instruction addresses are word |
| 326 | * aligned the offset is right shited by 2 before |
| 327 | * encoding into instruction. |
| 328 | */ |
| 329 | int32_t val = v - (int32_t)location; |
| 330 | |
| 331 | /* |
| 332 | * Check that the top 7 bits are all equal to the sign |
| 333 | * bit (26), i.e all 0's or all 1's. If they are not then |
| 334 | * the absolute difference is greater than 25 bits. |
| 335 | */ |
| 336 | if (((uint32_t)val & 0xFE000000) != 0xFE000000 && |
| 337 | ((uint32_t)val & 0xFE000000) != 0x0) { |
| 338 | /* |
| 339 | * The relocation is beyond our addressable |
| 340 | * range with a 26 bit call. |
| 341 | */ |
| 342 | printk(KERN_ERR "module %s: PC Relative " |
| 343 | "relocation out of range: " |
| 344 | "%u (%x->%x, %x)\n", |
| 345 | me->name, elf32_rtype, |
| 346 | v, (uint32_t) location, val); |
| 347 | return -ENOEXEC; |
| 348 | } |
| 349 | |
| 350 | val = (val & 0x3ffffff) >> 2; |
| 351 | insn = *location; |
| 352 | insn = insn & 0xf8e00000; |
| 353 | |
| 354 | insn |= (val >> 21) << 24; |
| 355 | insn |= (val & 0x1fffff); |
| 356 | *location = insn; |
| 357 | } |
| 358 | break; |
| 359 | case R_UBICOM32_LO16: |
| 360 | case R_UBICOM32_HI16: |
| 361 | { |
| 362 | /* |
| 363 | * 16 bit immediate value that is encoded into bit 0 - |
| 364 | * 15 of the instruction. |
| 365 | */ |
| 366 | uint32_t val; |
| 367 | |
| 368 | if (elf32_rtype == R_UBICOM32_LO16) { |
| 369 | val = v & 0xffff; |
| 370 | } else { |
| 371 | val = (v >> 16) & 0xffff; |
| 372 | } |
| 373 | |
| 374 | insn = *location; |
| 375 | insn &= 0xffff0000; |
| 376 | |
| 377 | insn |= val; |
| 378 | *location = insn; |
| 379 | } |
| 380 | break; |
| 381 | case R_UBICOM32_21_PCREL: |
| 382 | { |
| 383 | /* |
| 384 | * Extract 23 bit signed PC relative offset for JMP<cc> |
| 385 | * instructions. Since instruction addresses are word |
| 386 | * aligned the offset is right shited by 2 before |
| 387 | * encoding into instruction. |
| 388 | */ |
| 389 | int32_t val = v - (int32_t)location; |
| 390 | |
| 391 | val = (val & 0x7fffff) >> 2; |
| 392 | insn = *location; |
| 393 | insn = insn & 0xffe00000; |
| 394 | |
| 395 | insn |= (val >> 21) << 24; |
| 396 | insn |= val; |
| 397 | *location = insn; |
| 398 | } |
| 399 | break; |
| 400 | default: |
| 401 | BUG(); |
| 402 | printk(KERN_ERR "module %s: Unknown relocation: %u\n", |
| 403 | me->name, elf32_rtype); |
| 404 | return -ENOEXEC; |
| 405 | } |
| 406 | } |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | int module_finalize(const Elf_Ehdr *hdr, |
| 411 | const Elf_Shdr *sechdrs, |
| 412 | struct module *mod) |
| 413 | { |
| 414 | unsigned int i, strindex = 0, symindex = 0; |
| 415 | char *secstrings; |
| 416 | int err; |
| 417 | |
| 418 | err = module_bug_finalize(hdr, sechdrs, mod); |
| 419 | if (err) |
| 420 | return err; |
| 421 | |
| 422 | if (!mod->arch.ocm_inst) { |
| 423 | /* |
| 424 | * No OCM code, so nothing more to do. |
| 425 | */ |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; |
| 430 | |
| 431 | for (i = 1; i < hdr->e_shnum; i++) { |
| 432 | /* Internal symbols and strings. */ |
| 433 | if (sechdrs[i].sh_type == SHT_SYMTAB) { |
| 434 | symindex = i; |
| 435 | strindex = sechdrs[i].sh_link; |
| 436 | } |
| 437 | } |
| 438 | |
| 439 | for (i = 1; i < hdr->e_shnum; i++) { |
| 440 | const char *strtab = (char *)sechdrs[strindex].sh_addr; |
| 441 | unsigned int info = sechdrs[i].sh_info; |
| 442 | |
| 443 | /* Not a valid relocation section? */ |
| 444 | if (info >= hdr->e_shnum) |
| 445 | continue; |
| 446 | |
| 447 | if ((sechdrs[i].sh_type == SHT_RELA) && |
| 448 | (strncmp(".rela.ocm_text", |
| 449 | secstrings + sechdrs[i].sh_name, 5 + 9) == 0)) { |
| 450 | err = apply_relocate_add((Elf_Shdr *) sechdrs, strtab, |
| 451 | symindex, i, mod); |
| 452 | if (err) |
| 453 | return err; |
| 454 | } |
| 455 | } |
| 456 | |
| 457 | return 0; |
| 458 | } |
| 459 | |
| 460 | void module_arch_cleanup(struct module *mod) |
| 461 | { |
| 462 | module_bug_cleanup(mod); |
| 463 | } |
| 464 | |
