| 1 | From 781c5ae32a2e8aede2e1756dfbea1abb3cf09ffc Mon Sep 17 00:00:00 2001 |
| 2 | From: Gabor Juhos <juhosg@openwrt.org> |
| 3 | Date: Sun, 5 Jun 2011 23:38:44 +0200 |
| 4 | Subject: [PATCH 01/27] MIPS: ath79: Change number of available IRQs |
| 5 | |
| 6 | The status register of the miscellaneous interrupt controller is 32 bits |
| 7 | wide, but the actual value of NR_IRQS covers only 8 of them. Change |
| 8 | NR_IRQS in order to make all of those interrupt lines usable. |
| 9 | |
| 10 | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> |
| 11 | Cc: linux-mips@linux-mips.org |
| 12 | Patchwork: https://patchwork.linux-mips.org/patch/2441/ |
| 13 | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
| 14 | --- |
| 15 | arch/mips/include/asm/mach-ath79/irq.h | 4 ++-- |
| 16 | 1 files changed, 2 insertions(+), 2 deletions(-) |
| 17 | |
| 18 | --- a/arch/mips/include/asm/mach-ath79/irq.h |
| 19 | +++ b/arch/mips/include/asm/mach-ath79/irq.h |
| 20 | @@ -10,10 +10,10 @@ |
| 21 | #define __ASM_MACH_ATH79_IRQ_H |
| 22 | |
| 23 | #define MIPS_CPU_IRQ_BASE 0 |
| 24 | -#define NR_IRQS 16 |
| 25 | +#define NR_IRQS 40 |
| 26 | |
| 27 | #define ATH79_MISC_IRQ_BASE 8 |
| 28 | -#define ATH79_MISC_IRQ_COUNT 8 |
| 29 | +#define ATH79_MISC_IRQ_COUNT 32 |
| 30 | |
| 31 | #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) |
| 32 | #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) |
| 33 | |
