Root/target/linux/ar71xx/patches-3.2/128-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch

1From da0f20f8a99de9193fc484a25d1f9edc913c98fd Mon Sep 17 00:00:00 2001
2From: Gabor Juhos <juhosg@openwrt.org>
3Date: Sat, 10 Dec 2011 20:09:39 +0100
4Subject: [PATCH 28/35] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
5
6Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
8---
9 arch/mips/ath79/common.c | 9 ++++++++-
10 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
11 2 files changed, 9 insertions(+), 1 deletions(-)
12
13--- a/arch/mips/ath79/common.c
14+++ b/arch/mips/ath79/common.c
15@@ -1,9 +1,12 @@
16 /*
17  * Atheros AR71XX/AR724X/AR913X common routines
18  *
19- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
20+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
21+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
22  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
23  *
24+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
25+ *
26  * This program is free software; you can redistribute it and/or modify it
27  * under the terms of the GNU General Public License version 2 as published
28  * by the Free Software Foundation.
29@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask)
30         reg = AR913X_RESET_REG_RESET_MODULE;
31     else if (soc_is_ar933x())
32         reg = AR933X_RESET_REG_RESET_MODULE;
33+ else if (soc_is_ar934x())
34+ reg = AR934X_RESET_REG_RESET_MODULE;
35     else
36         BUG();
37 
38@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask)
39         reg = AR913X_RESET_REG_RESET_MODULE;
40     else if (soc_is_ar933x())
41         reg = AR933X_RESET_REG_RESET_MODULE;
42+ else if (soc_is_ar934x())
43+ reg = AR934X_RESET_REG_RESET_MODULE;
44     else
45         BUG();
46 
47--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
48+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
49@@ -227,6 +227,7 @@
50 #define AR933X_RESET_REG_RESET_MODULE 0x1c
51 #define AR933X_RESET_REG_BOOTSTRAP 0xac
52 
53+#define AR934X_RESET_REG_RESET_MODULE 0x1c
54 #define AR934X_RESET_REG_BOOTSTRAP 0xb0
55 #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
56 
57

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