Root/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-replace-ath724x-to-ar724x.patch

1From 0cbee5634678ffbd10bee9e302d013392dd8289e Mon Sep 17 00:00:00 2001
2From: Gabor Juhos <juhosg@openwrt.org>
3Date: Fri, 18 Nov 2011 11:16:33 +0100
4Subject: [PATCH 07/35] MIPS: ath79: replace ath724x to ar724x
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Replace the 'ath724x' to 'ar724x' in function, variable and
10structure names to reflect the name of the real SoC.
11
12Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
13Acked-by: René Bolldorf <xsecute@googlemail.com>
14
15v4: - add an Acked-by tag from René
16    - refreshed due to the changes in a previous patch
17v3: - no changes
18v2: - no changes
19---
20 arch/mips/ath79/mach-ubnt-xm.c | 4 +-
21 arch/mips/ath79/pci.c | 6 ++--
22 arch/mips/ath79/pci.h | 10 +++---
23 arch/mips/include/asm/mach-ath79/pci.h | 4 +-
24 arch/mips/pci/pci-ar724x.c | 62 ++++++++++++++++----------------
25 5 files changed, 43 insertions(+), 43 deletions(-)
26
27--- a/arch/mips/ath79/mach-ubnt-xm.c
28+++ b/arch/mips/ath79/mach-ubnt-xm.c
29@@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ub
30 #ifdef CONFIG_PCI
31 static struct ath9k_platform_data ubnt_xm_eeprom_data;
32 
33-static struct ath724x_pci_data ubnt_xm_pci_data[] = {
34+static struct ar724x_pci_data ubnt_xm_pci_data[] = {
35     {
36         .irq = UBNT_XM_PCI_IRQ,
37         .pdata = &ubnt_xm_eeprom_data,
38@@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
39     memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
40            sizeof(ubnt_xm_eeprom_data.eeprom_data));
41 
42- ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
43+ ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
44 #endif /* CONFIG_PCI */
45 
46     ath79_register_pci();
47--- a/arch/mips/ath79/pci.c
48+++ b/arch/mips/ath79/pci.c
49@@ -13,10 +13,10 @@
50 #include <asm/mach-ath79/pci.h>
51 #include "pci.h"
52 
53-static struct ath724x_pci_data *pci_data;
54+static struct ar724x_pci_data *pci_data;
55 static int pci_data_size;
56 
57-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
58+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
59 {
60     pci_data = data;
61     pci_data_size = size;
62@@ -50,7 +50,7 @@ int pcibios_plat_dev_init(struct pci_dev
63 int __init ath79_register_pci(void)
64 {
65     if (soc_is_ar724x())
66- return ath724x_pcibios_init();
67+ return ar724x_pcibios_init();
68 
69     return -ENODEV;
70 }
71--- a/arch/mips/ath79/pci.h
72+++ b/arch/mips/ath79/pci.h
73@@ -8,15 +8,15 @@
74  * by the Free Software Foundation.
75  */
76 
77-#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
78-#define __ASM_MACH_ATH79_PCI_ATH724X_H
79+#ifndef _ATH79_PCI_H
80+#define _ATH79_PCI_H
81 
82-struct ath724x_pci_data {
83+struct ar724x_pci_data {
84     int irq;
85     void *pdata;
86 };
87 
88-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
89+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
90 
91 #ifdef CONFIG_PCI
92 int ath79_register_pci(void);
93@@ -24,4 +24,4 @@ int ath79_register_pci(void);
94 static inline int ath79_register_pci(void) { return 0; }
95 #endif
96 
97-#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
98+#endif /* _ATH79_PCI_H */
99--- a/arch/mips/include/asm/mach-ath79/pci.h
100+++ b/arch/mips/include/asm/mach-ath79/pci.h
101@@ -12,9 +12,9 @@
102 #define __ASM_MACH_ATH79_PCI_H
103 
104 #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
105-int ath724x_pcibios_init(void);
106+int ar724x_pcibios_init(void);
107 #else
108-static inline int ath724x_pcibios_init(void) { return 0 };
109+static inline int ar724x_pcibios_init(void) { return 0 };
110 #endif
111 
112 #endif /* __ASM_MACH_ATH79_PCI_H */
113--- a/arch/mips/pci/pci-ar724x.c
114+++ b/arch/mips/pci/pci-ar724x.c
115@@ -14,13 +14,13 @@
116 #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
117 #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
118 
119-#define ATH724X_PCI_DEV_BASE 0x14000000
120-#define ATH724X_PCI_MEM_BASE 0x10000000
121-#define ATH724X_PCI_MEM_SIZE 0x08000000
122+#define AR724X_PCI_DEV_BASE 0x14000000
123+#define AR724X_PCI_MEM_BASE 0x10000000
124+#define AR724X_PCI_MEM_SIZE 0x08000000
125 
126-static DEFINE_SPINLOCK(ath724x_pci_lock);
127+static DEFINE_SPINLOCK(ar724x_pci_lock);
128 
129-static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
130+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
131                 int size, uint32_t *value)
132 {
133     unsigned long flags, addr, tval, mask;
134@@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_b
135     if (where & (size - 1))
136         return PCIBIOS_BAD_REGISTER_NUMBER;
137 
138- spin_lock_irqsave(&ath724x_pci_lock, flags);
139+ spin_lock_irqsave(&ar724x_pci_lock, flags);
140 
141     switch (size) {
142     case 1:
143         addr = where & ~3;
144         mask = 0xff000000 >> ((where % 4) * 8);
145- tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
146+ tval = reg_read(AR724X_PCI_DEV_BASE + addr);
147         tval = tval & ~mask;
148         *value = (tval >> ((4 - (where % 4))*8));
149         break;
150     case 2:
151         addr = where & ~3;
152         mask = 0xffff0000 >> ((where % 4)*8);
153- tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
154+ tval = reg_read(AR724X_PCI_DEV_BASE + addr);
155         tval = tval & ~mask;
156         *value = (tval >> ((4 - (where % 4))*8));
157         break;
158     case 4:
159- *value = reg_read(ATH724X_PCI_DEV_BASE + where);
160+ *value = reg_read(AR724X_PCI_DEV_BASE + where);
161         break;
162     default:
163- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
164+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
165 
166         return PCIBIOS_BAD_REGISTER_NUMBER;
167     }
168 
169- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
170+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
171 
172     return PCIBIOS_SUCCESSFUL;
173 }
174 
175-static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
176+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
177                  int size, uint32_t value)
178 {
179     unsigned long flags, tval, addr, mask;
180@@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_
181     if (where & (size - 1))
182         return PCIBIOS_BAD_REGISTER_NUMBER;
183 
184- spin_lock_irqsave(&ath724x_pci_lock, flags);
185+ spin_lock_irqsave(&ar724x_pci_lock, flags);
186 
187     switch (size) {
188     case 1:
189- addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
190+ addr = (AR724X_PCI_DEV_BASE + where) & ~3;
191         mask = 0xff000000 >> ((where % 4)*8);
192         tval = reg_read(addr);
193         tval = tval & ~mask;
194@@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_
195         reg_write(addr, tval);
196         break;
197     case 2:
198- addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
199+ addr = (AR724X_PCI_DEV_BASE + where) & ~3;
200         mask = 0xffff0000 >> ((where % 4)*8);
201         tval = reg_read(addr);
202         tval = tval & ~mask;
203@@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_
204         reg_write(addr, tval);
205         break;
206     case 4:
207- reg_write((ATH724X_PCI_DEV_BASE + where), value);
208+ reg_write((AR724X_PCI_DEV_BASE + where), value);
209         break;
210     default:
211- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
212+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
213 
214         return PCIBIOS_BAD_REGISTER_NUMBER;
215     }
216 
217- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
218+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
219 
220     return PCIBIOS_SUCCESSFUL;
221 }
222 
223-static struct pci_ops ath724x_pci_ops = {
224- .read = ath724x_pci_read,
225- .write = ath724x_pci_write,
226+static struct pci_ops ar724x_pci_ops = {
227+ .read = ar724x_pci_read,
228+ .write = ar724x_pci_write,
229 };
230 
231-static struct resource ath724x_io_resource = {
232+static struct resource ar724x_io_resource = {
233     .name = "PCI IO space",
234     .start = 0,
235     .end = 0,
236     .flags = IORESOURCE_IO,
237 };
238 
239-static struct resource ath724x_mem_resource = {
240+static struct resource ar724x_mem_resource = {
241     .name = "PCI memory space",
242- .start = ATH724X_PCI_MEM_BASE,
243- .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
244+ .start = AR724X_PCI_MEM_BASE,
245+ .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
246     .flags = IORESOURCE_MEM,
247 };
248 
249-static struct pci_controller ath724x_pci_controller = {
250- .pci_ops = &ath724x_pci_ops,
251- .io_resource = &ath724x_io_resource,
252- .mem_resource = &ath724x_mem_resource,
253+static struct pci_controller ar724x_pci_controller = {
254+ .pci_ops = &ar724x_pci_ops,
255+ .io_resource = &ar724x_io_resource,
256+ .mem_resource = &ar724x_mem_resource,
257 };
258 
259-int __init ath724x_pcibios_init(void)
260+int __init ar724x_pcibios_init(void)
261 {
262- register_pci_controller(&ath724x_pci_controller);
263+ register_pci_controller(&ar724x_pci_controller);
264 
265     return PCIBIOS_SUCCESSFUL;
266 }
267

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