| 1 | From 48b7e765e6e097d20d809fadd17a4355d26ad6d5 Mon Sep 17 00:00:00 2001 |
| 2 | From: Gabor Juhos <juhosg@openwrt.org> |
| 3 | Date: Wed, 11 Jan 2012 20:06:35 +0100 |
| 4 | Subject: [PATCH 1/7] spi/ath79: add delay between SCK changes |
| 5 | |
| 6 | The driver uses the "as fast as it can" approach |
| 7 | to drive the SCK signal. However this does not |
| 8 | work with certain low speed SPI chips (e.g. the |
| 9 | PCF2123 RTC chip). Add per-bit slowdowns in order |
| 10 | to be able to use the driver with such chips as |
| 11 | well. |
| 12 | |
| 13 | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> |
| 14 | --- |
| 15 | drivers/spi/spi-ath79.c | 8 ++++++++ |
| 16 | 1 files changed, 8 insertions(+), 0 deletions(-) |
| 17 | |
| 18 | --- a/drivers/spi/spi-ath79.c |
| 19 | +++ b/drivers/spi/spi-ath79.c |
| 20 | @@ -52,6 +52,12 @@ static inline struct ath79_spi *ath79_sp |
| 21 | return spi_master_get_devdata(spi->master); |
| 22 | } |
| 23 | |
| 24 | +static inline void ath79_spi_delay(unsigned nsecs) |
| 25 | +{ |
| 26 | + if (nsecs) |
| 27 | + ndelay(nsecs); |
| 28 | +} |
| 29 | + |
| 30 | static void ath79_spi_chipselect(struct spi_device *spi, int is_active) |
| 31 | { |
| 32 | struct ath79_spi *sp = ath79_spidev_to_sp(spi); |
| 33 | @@ -184,7 +190,9 @@ static u32 ath79_spi_txrx_mode0(struct s |
| 34 | |
| 35 | /* setup MSB (to slave) on trailing edge */ |
| 36 | ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); |
| 37 | + ath79_spi_delay(nsecs); |
| 38 | ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK); |
| 39 | + ath79_spi_delay(nsecs); |
| 40 | |
| 41 | word <<= 1; |
| 42 | } |
| 43 | |
