| 1 | --- a/Documentation/feature-removal-schedule.txt |
| 2 | +++ b/Documentation/feature-removal-schedule.txt |
| 3 | @@ -551,3 +551,15 @@ When: 3.5 |
| 4 | Why: The iwlagn module has been renamed iwlwifi. The alias will be around |
| 5 | for backward compatibility for several cycles and then dropped. |
| 6 | Who: Don Fry <donald.h.fry@intel.com> |
| 7 | + |
| 8 | +---------------------------- |
| 9 | + |
| 10 | +What: pci_scan_bus_parented() |
| 11 | +When: 3.5 |
| 12 | +Why: The pci_scan_bus_parented() interface creates a new root bus. The |
| 13 | + bus is created with default resources (ioport_resource and |
| 14 | + iomem_resource) that are always wrong, so we rely on arch code to |
| 15 | + correct them later. Callers of pci_scan_bus_parented() should |
| 16 | + convert to using pci_scan_root_bus() so they can supply a list of |
| 17 | + bus resources when the bus is created. |
| 18 | +Who: Bjorn Helgaas <bhelgaas@google.com> |
| 19 | --- a/arch/alpha/kernel/pci.c |
| 20 | +++ b/arch/alpha/kernel/pci.c |
| 21 | @@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pc |
| 22 | void __devinit |
| 23 | pcibios_fixup_bus(struct pci_bus *bus) |
| 24 | { |
| 25 | - /* Propagate hose info into the subordinate devices. */ |
| 26 | - |
| 27 | - struct pci_controller *hose = bus->sysdata; |
| 28 | struct pci_dev *dev = bus->self; |
| 29 | |
| 30 | - if (!dev) { |
| 31 | - /* Root bus. */ |
| 32 | - u32 pci_mem_end; |
| 33 | - u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; |
| 34 | - unsigned long end; |
| 35 | - |
| 36 | - bus->resource[0] = hose->io_space; |
| 37 | - bus->resource[1] = hose->mem_space; |
| 38 | - |
| 39 | - /* Adjust hose mem_space limit to prevent PCI allocations |
| 40 | - in the iommu windows. */ |
| 41 | - pci_mem_end = min((u32)__direct_map_base, sg_base) - 1; |
| 42 | - end = hose->mem_space->start + pci_mem_end; |
| 43 | - if (hose->mem_space->end > end) |
| 44 | - hose->mem_space->end = end; |
| 45 | - } else if (pci_probe_only && |
| 46 | + if (pci_probe_only && dev && |
| 47 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
| 48 | pci_read_bridge_bases(bus); |
| 49 | pcibios_fixup_device_resources(dev, bus); |
| 50 | @@ -414,13 +396,31 @@ void __init |
| 51 | common_init_pci(void) |
| 52 | { |
| 53 | struct pci_controller *hose; |
| 54 | + struct list_head resources; |
| 55 | struct pci_bus *bus; |
| 56 | int next_busno; |
| 57 | int need_domain_info = 0; |
| 58 | + u32 pci_mem_end; |
| 59 | + u32 sg_base; |
| 60 | + unsigned long end; |
| 61 | |
| 62 | /* Scan all of the recorded PCI controllers. */ |
| 63 | for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { |
| 64 | - bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); |
| 65 | + sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; |
| 66 | + |
| 67 | + /* Adjust hose mem_space limit to prevent PCI allocations |
| 68 | + in the iommu windows. */ |
| 69 | + pci_mem_end = min((u32)__direct_map_base, sg_base) - 1; |
| 70 | + end = hose->mem_space->start + pci_mem_end; |
| 71 | + if (hose->mem_space->end > end) |
| 72 | + hose->mem_space->end = end; |
| 73 | + |
| 74 | + INIT_LIST_HEAD(&resources); |
| 75 | + pci_add_resource(&resources, hose->io_space); |
| 76 | + pci_add_resource(&resources, hose->mem_space); |
| 77 | + |
| 78 | + bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops, |
| 79 | + hose, &resources); |
| 80 | hose->bus = bus; |
| 81 | hose->need_domain_info = need_domain_info; |
| 82 | next_busno = bus->subordinate + 1; |
| 83 | --- a/arch/arm/common/it8152.c |
| 84 | +++ b/arch/arm/common/it8152.c |
| 85 | @@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, stru |
| 86 | goto err1; |
| 87 | } |
| 88 | |
| 89 | - sys->resource[0] = &it8152_io; |
| 90 | - sys->resource[1] = &it8152_mem; |
| 91 | + pci_add_resource(&sys->resources, &it8152_io); |
| 92 | + pci_add_resource(&sys->resources, &it8152_mem); |
| 93 | |
| 94 | if (platform_notify || platform_notify_remove) { |
| 95 | printk(KERN_ERR "PCI: Can't use platform_notify\n"); |
| 96 | @@ -352,7 +352,7 @@ void pcibios_set_master(struct pci_dev * |
| 97 | |
| 98 | struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys) |
| 99 | { |
| 100 | - return pci_scan_bus(nr, &it8152_ops, sys); |
| 101 | + return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources); |
| 102 | } |
| 103 | |
| 104 | EXPORT_SYMBOL(dma_set_coherent_mask); |
| 105 | --- a/arch/arm/common/via82c505.c |
| 106 | +++ b/arch/arm/common/via82c505.c |
| 107 | @@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struc |
| 108 | struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata) |
| 109 | { |
| 110 | if (nr == 0) |
| 111 | - return pci_scan_bus(0, &via82c505_ops, sysdata); |
| 112 | + return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata, |
| 113 | + &sysdata->resources); |
| 114 | |
| 115 | return NULL; |
| 116 | } |
| 117 | --- a/arch/arm/include/asm/mach/pci.h |
| 118 | +++ b/arch/arm/include/asm/mach/pci.h |
| 119 | @@ -40,7 +40,7 @@ struct pci_sys_data { |
| 120 | u64 mem_offset; /* bus->cpu memory mapping offset */ |
| 121 | unsigned long io_offset; /* bus->cpu IO mapping offset */ |
| 122 | struct pci_bus *bus; /* PCI bus */ |
| 123 | - struct resource *resource[3]; /* Primary PCI bus resources */ |
| 124 | + struct list_head resources; /* root bus resources (apertures) */ |
| 125 | /* Bridge swizzling */ |
| 126 | u8 (*swizzle)(struct pci_dev *, u8 *); |
| 127 | /* IRQ mapping */ |
| 128 | --- a/arch/arm/kernel/bios32.c |
| 129 | +++ b/arch/arm/kernel/bios32.c |
| 130 | @@ -316,21 +316,6 @@ pdev_fixup_device_resources(struct pci_s |
| 131 | } |
| 132 | } |
| 133 | |
| 134 | -static void __devinit |
| 135 | -pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root) |
| 136 | -{ |
| 137 | - struct pci_dev *dev = bus->self; |
| 138 | - int i; |
| 139 | - |
| 140 | - if (!dev) { |
| 141 | - /* |
| 142 | - * Assign root bus resources. |
| 143 | - */ |
| 144 | - for (i = 0; i < 3; i++) |
| 145 | - bus->resource[i] = root->resource[i]; |
| 146 | - } |
| 147 | -} |
| 148 | - |
| 149 | /* |
| 150 | * pcibios_fixup_bus - Called after each bus is probed, |
| 151 | * but before its children are examined. |
| 152 | @@ -341,8 +326,6 @@ void pcibios_fixup_bus(struct pci_bus *b |
| 153 | struct pci_dev *dev; |
| 154 | u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; |
| 155 | |
| 156 | - pbus_assign_bus_resources(bus, root); |
| 157 | - |
| 158 | /* |
| 159 | * Walk the devices on this bus, working out what we can |
| 160 | * and can't support. |
| 161 | @@ -508,12 +491,18 @@ static void __init pcibios_init_hw(struc |
| 162 | sys->busnr = busnr; |
| 163 | sys->swizzle = hw->swizzle; |
| 164 | sys->map_irq = hw->map_irq; |
| 165 | - sys->resource[0] = &ioport_resource; |
| 166 | - sys->resource[1] = &iomem_resource; |
| 167 | + INIT_LIST_HEAD(&sys->resources); |
| 168 | |
| 169 | ret = hw->setup(nr, sys); |
| 170 | |
| 171 | if (ret > 0) { |
| 172 | + if (list_empty(&sys->resources)) { |
| 173 | + pci_add_resource(&sys->resources, |
| 174 | + &ioport_resource); |
| 175 | + pci_add_resource(&sys->resources, |
| 176 | + &iomem_resource); |
| 177 | + } |
| 178 | + |
| 179 | sys->bus = hw->scan(nr, sys); |
| 180 | |
| 181 | if (!sys->bus) |
| 182 | --- a/arch/arm/mach-cns3xxx/pcie.c |
| 183 | +++ b/arch/arm/mach-cns3xxx/pcie.c |
| 184 | @@ -151,13 +151,12 @@ static int cns3xxx_pci_setup(int nr, str |
| 185 | struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys); |
| 186 | struct resource *res_io = &cnspci->res_io; |
| 187 | struct resource *res_mem = &cnspci->res_mem; |
| 188 | - struct resource **sysres = sys->resource; |
| 189 | |
| 190 | BUG_ON(request_resource(&iomem_resource, res_io) || |
| 191 | request_resource(&iomem_resource, res_mem)); |
| 192 | |
| 193 | - sysres[0] = res_io; |
| 194 | - sysres[1] = res_mem; |
| 195 | + pci_add_resource(&sys->resources, res_io); |
| 196 | + pci_add_resource(&sys->resources, res_mem); |
| 197 | |
| 198 | return 1; |
| 199 | } |
| 200 | @@ -169,7 +168,8 @@ static struct pci_ops cns3xxx_pcie_ops = |
| 201 | |
| 202 | static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys) |
| 203 | { |
| 204 | - return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys); |
| 205 | + return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys, |
| 206 | + &sys->resources); |
| 207 | } |
| 208 | |
| 209 | static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
| 210 | --- a/arch/arm/mach-dove/pcie.c |
| 211 | +++ b/arch/arm/mach-dove/pcie.c |
| 212 | @@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr |
| 213 | pp->res[0].flags = IORESOURCE_IO; |
| 214 | if (request_resource(&ioport_resource, &pp->res[0])) |
| 215 | panic("Request PCIe IO resource failed\n"); |
| 216 | - sys->resource[0] = &pp->res[0]; |
| 217 | + pci_add_resource(&sys->resources, &pp->res[0]); |
| 218 | |
| 219 | /* |
| 220 | * IORESOURCE_MEM |
| 221 | @@ -88,9 +88,7 @@ static int __init dove_pcie_setup(int nr |
| 222 | pp->res[1].flags = IORESOURCE_MEM; |
| 223 | if (request_resource(&iomem_resource, &pp->res[1])) |
| 224 | panic("Request PCIe Memory resource failed\n"); |
| 225 | - sys->resource[1] = &pp->res[1]; |
| 226 | - |
| 227 | - sys->resource[2] = NULL; |
| 228 | + pci_add_resource(&sys->resources, &pp->res[1]); |
| 229 | |
| 230 | return 1; |
| 231 | } |
| 232 | @@ -184,7 +182,8 @@ dove_pcie_scan_bus(int nr, struct pci_sy |
| 233 | struct pci_bus *bus; |
| 234 | |
| 235 | if (nr < num_pcie_ports) { |
| 236 | - bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); |
| 237 | + bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys, |
| 238 | + &sys->resources); |
| 239 | } else { |
| 240 | bus = NULL; |
| 241 | BUG(); |
| 242 | --- a/arch/arm/mach-footbridge/dc21285.c |
| 243 | +++ b/arch/arm/mach-footbridge/dc21285.c |
| 244 | @@ -275,9 +275,9 @@ int __init dc21285_setup(int nr, struct |
| 245 | allocate_resource(&iomem_resource, &res[0], 0x40000000, |
| 246 | 0x80000000, 0xffffffff, 0x40000000, NULL, NULL); |
| 247 | |
| 248 | - sys->resource[0] = &ioport_resource; |
| 249 | - sys->resource[1] = &res[0]; |
| 250 | - sys->resource[2] = &res[1]; |
| 251 | + pci_add_resource(&sys->resources, &ioport_resource); |
| 252 | + pci_add_resource(&sys->resources, &res[0]); |
| 253 | + pci_add_resource(&sys->resources, &res[1]); |
| 254 | sys->mem_offset = DC21285_PCI_MEM; |
| 255 | |
| 256 | return 1; |
| 257 | @@ -285,7 +285,7 @@ int __init dc21285_setup(int nr, struct |
| 258 | |
| 259 | struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys) |
| 260 | { |
| 261 | - return pci_scan_bus(0, &dc21285_ops, sys); |
| 262 | + return pci_scan_root_bus(NULL, 0, &dc21285_ops, sys, &sys->resources); |
| 263 | } |
| 264 | |
| 265 | #define dc21285_request_irq(_a, _b, _c, _d, _e) \ |
| 266 | --- a/arch/arm/mach-integrator/pci_v3.c |
| 267 | +++ b/arch/arm/mach-integrator/pci_v3.c |
| 268 | @@ -359,7 +359,7 @@ static struct resource pre_mem = { |
| 269 | .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 270 | }; |
| 271 | |
| 272 | -static int __init pci_v3_setup_resources(struct resource **resource) |
| 273 | +static int __init pci_v3_setup_resources(struct pci_sys_data *sys) |
| 274 | { |
| 275 | if (request_resource(&iomem_resource, &non_mem)) { |
| 276 | printk(KERN_ERR "PCI: unable to allocate non-prefetchable " |
| 277 | @@ -374,13 +374,13 @@ static int __init pci_v3_setup_resources |
| 278 | } |
| 279 | |
| 280 | /* |
| 281 | - * bus->resource[0] is the IO resource for this bus |
| 282 | - * bus->resource[1] is the mem resource for this bus |
| 283 | - * bus->resource[2] is the prefetch mem resource for this bus |
| 284 | + * the IO resource for this bus |
| 285 | + * the mem resource for this bus |
| 286 | + * the prefetch mem resource for this bus |
| 287 | */ |
| 288 | - resource[0] = &ioport_resource; |
| 289 | - resource[1] = &non_mem; |
| 290 | - resource[2] = &pre_mem; |
| 291 | + pci_add_resource(&sys->resources, &ioport_resource); |
| 292 | + pci_add_resource(&sys->resources, &non_mem); |
| 293 | + pci_add_resource(&sys->resources, &pre_mem); |
| 294 | |
| 295 | return 1; |
| 296 | } |
| 297 | @@ -481,7 +481,7 @@ int __init pci_v3_setup(int nr, struct p |
| 298 | |
| 299 | if (nr == 0) { |
| 300 | sys->mem_offset = PHYS_PCI_MEM_BASE; |
| 301 | - ret = pci_v3_setup_resources(sys->resource); |
| 302 | + ret = pci_v3_setup_resources(sys); |
| 303 | } |
| 304 | |
| 305 | return ret; |
| 306 | @@ -489,7 +489,8 @@ int __init pci_v3_setup(int nr, struct p |
| 307 | |
| 308 | struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys) |
| 309 | { |
| 310 | - return pci_scan_bus(sys->busnr, &pci_v3_ops, sys); |
| 311 | + return pci_scan_root_bus(NULL, sys->busnr, &pci_v3_ops, sys, |
| 312 | + &sys->resources); |
| 313 | } |
| 314 | |
| 315 | /* |
| 316 | --- a/arch/arm/mach-iop13xx/pci.c |
| 317 | +++ b/arch/arm/mach-iop13xx/pci.c |
| 318 | @@ -537,14 +537,14 @@ struct pci_bus *iop13xx_scan_bus(int nr, |
| 319 | while(time_before(jiffies, atux_trhfa_timeout)) |
| 320 | udelay(100); |
| 321 | |
| 322 | - bus = pci_bus_atux = pci_scan_bus(sys->busnr, |
| 323 | - &iop13xx_atux_ops, |
| 324 | - sys); |
| 325 | + bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr, |
| 326 | + &iop13xx_atux_ops, |
| 327 | + sys, &sys->resources); |
| 328 | break; |
| 329 | case IOP13XX_INIT_ATU_ATUE: |
| 330 | - bus = pci_bus_atue = pci_scan_bus(sys->busnr, |
| 331 | - &iop13xx_atue_ops, |
| 332 | - sys); |
| 333 | + bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr, |
| 334 | + &iop13xx_atue_ops, |
| 335 | + sys, &sys->resources); |
| 336 | break; |
| 337 | } |
| 338 | |
| 339 | @@ -1084,9 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci |
| 340 | request_resource(&ioport_resource, &res[0]); |
| 341 | request_resource(&iomem_resource, &res[1]); |
| 342 | |
| 343 | - sys->resource[0] = &res[0]; |
| 344 | - sys->resource[1] = &res[1]; |
| 345 | - sys->resource[2] = NULL; |
| 346 | + pci_add_resource(&sys->resources, &res[0]); |
| 347 | + pci_add_resource(&sys->resources, &res[1]); |
| 348 | |
| 349 | return 1; |
| 350 | } |
| 351 | --- a/arch/arm/mach-ixp2000/enp2611.c |
| 352 | +++ b/arch/arm/mach-ixp2000/enp2611.c |
| 353 | @@ -145,7 +145,8 @@ static struct pci_ops enp2611_pci_ops = |
| 354 | static struct pci_bus * __init enp2611_pci_scan_bus(int nr, |
| 355 | struct pci_sys_data *sys) |
| 356 | { |
| 357 | - return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys); |
| 358 | + return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys, |
| 359 | + &sys->resources); |
| 360 | } |
| 361 | |
| 362 | static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot, |
| 363 | --- a/arch/arm/mach-ixp2000/pci.c |
| 364 | +++ b/arch/arm/mach-ixp2000/pci.c |
| 365 | @@ -132,7 +132,8 @@ static struct pci_ops ixp2000_pci_ops = |
| 366 | |
| 367 | struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata) |
| 368 | { |
| 369 | - return pci_scan_bus(sysdata->busnr, &ixp2000_pci_ops, sysdata); |
| 370 | + return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops, |
| 371 | + sysdata, &sysdata->resources); |
| 372 | } |
| 373 | |
| 374 | |
| 375 | @@ -242,9 +243,8 @@ int ixp2000_pci_setup(int nr, struct pci |
| 376 | if (nr >= 1) |
| 377 | return 0; |
| 378 | |
| 379 | - sys->resource[0] = &ixp2000_pci_io_space; |
| 380 | - sys->resource[1] = &ixp2000_pci_mem_space; |
| 381 | - sys->resource[2] = NULL; |
| 382 | + pci_add_resource(&sys->resources, &ixp2000_pci_io_space); |
| 383 | + pci_add_resource(&sys->resources, &ixp2000_pci_mem_space); |
| 384 | |
| 385 | return 1; |
| 386 | } |
| 387 | --- a/arch/arm/mach-ixp23xx/pci.c |
| 388 | +++ b/arch/arm/mach-ixp23xx/pci.c |
| 389 | @@ -143,7 +143,8 @@ struct pci_ops ixp23xx_pci_ops = { |
| 390 | |
| 391 | struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata) |
| 392 | { |
| 393 | - return pci_scan_bus(sysdata->busnr, &ixp23xx_pci_ops, sysdata); |
| 394 | + return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops, |
| 395 | + sysdata, &sysdata->resources); |
| 396 | } |
| 397 | |
| 398 | int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
| 399 | @@ -280,9 +281,8 @@ int ixp23xx_pci_setup(int nr, struct pci |
| 400 | if (nr >= 1) |
| 401 | return 0; |
| 402 | |
| 403 | - sys->resource[0] = &ixp23xx_pci_io_space; |
| 404 | - sys->resource[1] = &ixp23xx_pci_mem_space; |
| 405 | - sys->resource[2] = NULL; |
| 406 | + pci_add_resource(&sys->resources, &ixp23xx_pci_io_space); |
| 407 | + pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space); |
| 408 | |
| 409 | return 1; |
| 410 | } |
| 411 | --- a/arch/arm/mach-ixp4xx/common-pci.c |
| 412 | +++ b/arch/arm/mach-ixp4xx/common-pci.c |
| 413 | @@ -472,9 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_ |
| 414 | request_resource(&ioport_resource, &res[0]); |
| 415 | request_resource(&iomem_resource, &res[1]); |
| 416 | |
| 417 | - sys->resource[0] = &res[0]; |
| 418 | - sys->resource[1] = &res[1]; |
| 419 | - sys->resource[2] = NULL; |
| 420 | + pci_add_resource(&sys->resources, &res[0]); |
| 421 | + pci_add_resource(&sys->resources, &res[1]); |
| 422 | |
| 423 | platform_notify = ixp4xx_pci_platform_notify; |
| 424 | platform_notify_remove = ixp4xx_pci_platform_notify_remove; |
| 425 | @@ -484,7 +483,8 @@ int ixp4xx_setup(int nr, struct pci_sys_ |
| 426 | |
| 427 | struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) |
| 428 | { |
| 429 | - return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); |
| 430 | + return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys, |
| 431 | + &sys->resources); |
| 432 | } |
| 433 | |
| 434 | int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 435 | --- a/arch/arm/mach-kirkwood/pcie.c |
| 436 | +++ b/arch/arm/mach-kirkwood/pcie.c |
| 437 | @@ -198,9 +198,8 @@ static int __init kirkwood_pcie_setup(in |
| 438 | if (request_resource(&iomem_resource, &pp->res[1])) |
| 439 | panic("Request PCIe%d Memory resource failed\n", index); |
| 440 | |
| 441 | - sys->resource[0] = &pp->res[0]; |
| 442 | - sys->resource[1] = &pp->res[1]; |
| 443 | - sys->resource[2] = NULL; |
| 444 | + pci_add_resource(&sys->resources, &pp->res[0]); |
| 445 | + pci_add_resource(&sys->resources, &pp->res[1]); |
| 446 | sys->io_offset = 0; |
| 447 | |
| 448 | /* |
| 449 | @@ -236,7 +235,8 @@ kirkwood_pcie_scan_bus(int nr, struct pc |
| 450 | struct pci_bus *bus; |
| 451 | |
| 452 | if (nr < num_pcie_ports) { |
| 453 | - bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); |
| 454 | + bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys, |
| 455 | + &sys->resources); |
| 456 | } else { |
| 457 | bus = NULL; |
| 458 | BUG(); |
| 459 | --- a/arch/arm/mach-ks8695/pci.c |
| 460 | +++ b/arch/arm/mach-ks8695/pci.c |
| 461 | @@ -143,7 +143,8 @@ static struct pci_ops ks8695_pci_ops = { |
| 462 | |
| 463 | static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) |
| 464 | { |
| 465 | - return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); |
| 466 | + return pci_scan_root_bus(NULL, sys->busnr, &ks8695_pci_ops, sys, |
| 467 | + &sys->resources); |
| 468 | } |
| 469 | |
| 470 | static struct resource pci_mem = { |
| 471 | @@ -168,9 +169,8 @@ static int __init ks8695_pci_setup(int n |
| 472 | request_resource(&iomem_resource, &pci_mem); |
| 473 | request_resource(&ioport_resource, &pci_io); |
| 474 | |
| 475 | - sys->resource[0] = &pci_io; |
| 476 | - sys->resource[1] = &pci_mem; |
| 477 | - sys->resource[2] = NULL; |
| 478 | + pci_add_resource(&sys->resources, &pci_io); |
| 479 | + pci_add_resource(&sys->resources, &pci_mem); |
| 480 | |
| 481 | /* Assign and enable processor bridge */ |
| 482 | ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); |
| 483 | --- a/arch/arm/mach-mv78xx0/pcie.c |
| 484 | +++ b/arch/arm/mach-mv78xx0/pcie.c |
| 485 | @@ -155,9 +155,8 @@ static int __init mv78xx0_pcie_setup(int |
| 486 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); |
| 487 | orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info); |
| 488 | |
| 489 | - sys->resource[0] = &pp->res[0]; |
| 490 | - sys->resource[1] = &pp->res[1]; |
| 491 | - sys->resource[2] = NULL; |
| 492 | + pci_add_resource(&sys->resources, &pp->res[0]); |
| 493 | + pci_add_resource(&sys->resources, &pp->res[1]); |
| 494 | |
| 495 | return 1; |
| 496 | } |
| 497 | @@ -251,7 +250,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci |
| 498 | struct pci_bus *bus; |
| 499 | |
| 500 | if (nr < num_pcie_ports) { |
| 501 | - bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); |
| 502 | + bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys, |
| 503 | + &sys->resources); |
| 504 | } else { |
| 505 | bus = NULL; |
| 506 | BUG(); |
| 507 | --- a/arch/arm/mach-orion5x/pci.c |
| 508 | +++ b/arch/arm/mach-orion5x/pci.c |
| 509 | @@ -176,7 +176,7 @@ static int __init pcie_setup(struct pci_ |
| 510 | res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; |
| 511 | if (request_resource(&ioport_resource, &res[0])) |
| 512 | panic("Request PCIe IO resource failed\n"); |
| 513 | - sys->resource[0] = &res[0]; |
| 514 | + pci_add_resource(&sys->resources, &res[0]); |
| 515 | |
| 516 | /* |
| 517 | * IORESOURCE_MEM |
| 518 | @@ -187,9 +187,8 @@ static int __init pcie_setup(struct pci_ |
| 519 | res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; |
| 520 | if (request_resource(&iomem_resource, &res[1])) |
| 521 | panic("Request PCIe Memory resource failed\n"); |
| 522 | - sys->resource[1] = &res[1]; |
| 523 | + pci_add_resource(&sys->resources, &res[1]); |
| 524 | |
| 525 | - sys->resource[2] = NULL; |
| 526 | sys->io_offset = 0; |
| 527 | |
| 528 | return 1; |
| 529 | @@ -505,7 +504,7 @@ static int __init pci_setup(struct pci_s |
| 530 | res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; |
| 531 | if (request_resource(&ioport_resource, &res[0])) |
| 532 | panic("Request PCI IO resource failed\n"); |
| 533 | - sys->resource[0] = &res[0]; |
| 534 | + pci_add_resource(&sys->resources, &res[0]); |
| 535 | |
| 536 | /* |
| 537 | * IORESOURCE_MEM |
| 538 | @@ -516,9 +515,8 @@ static int __init pci_setup(struct pci_s |
| 539 | res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; |
| 540 | if (request_resource(&iomem_resource, &res[1])) |
| 541 | panic("Request PCI Memory resource failed\n"); |
| 542 | - sys->resource[1] = &res[1]; |
| 543 | + pci_add_resource(&sys->resources, &res[1]); |
| 544 | |
| 545 | - sys->resource[2] = NULL; |
| 546 | sys->io_offset = 0; |
| 547 | |
| 548 | return 1; |
| 549 | @@ -579,9 +577,11 @@ struct pci_bus __init *orion5x_pci_sys_s |
| 550 | struct pci_bus *bus; |
| 551 | |
| 552 | if (nr == 0) { |
| 553 | - bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); |
| 554 | + bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys, |
| 555 | + &sys->resources); |
| 556 | } else if (nr == 1 && !orion5x_pci_disabled) { |
| 557 | - bus = pci_scan_bus(sys->busnr, &pci_ops, sys); |
| 558 | + bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys, |
| 559 | + &sys->resources); |
| 560 | } else { |
| 561 | bus = NULL; |
| 562 | BUG(); |
| 563 | --- a/arch/arm/mach-sa1100/pci-nanoengine.c |
| 564 | +++ b/arch/arm/mach-sa1100/pci-nanoengine.c |
| 565 | @@ -131,7 +131,8 @@ static int __init pci_nanoengine_map_irq |
| 566 | |
| 567 | struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys) |
| 568 | { |
| 569 | - return pci_scan_bus(sys->busnr, &pci_nano_ops, sys); |
| 570 | + return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys, |
| 571 | + &sys->resources); |
| 572 | } |
| 573 | |
| 574 | static struct resource pci_io_ports = { |
| 575 | @@ -226,7 +227,7 @@ static struct resource pci_prefetchable_ |
| 576 | .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 577 | }; |
| 578 | |
| 579 | -static int __init pci_nanoengine_setup_resources(struct resource **resource) |
| 580 | +static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys) |
| 581 | { |
| 582 | if (request_resource(&ioport_resource, &pci_io_ports)) { |
| 583 | printk(KERN_ERR "PCI: unable to allocate io port region\n"); |
| 584 | @@ -243,9 +244,9 @@ static int __init pci_nanoengine_setup_r |
| 585 | printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); |
| 586 | return -EBUSY; |
| 587 | } |
| 588 | - resource[0] = &pci_io_ports; |
| 589 | - resource[1] = &pci_non_prefetchable_memory; |
| 590 | - resource[2] = &pci_prefetchable_memory; |
| 591 | + pci_add_resource(&sys->resources, &pci_io_ports); |
| 592 | + pci_add_resource(&sys->resources, &pci_non_prefetchable_memory); |
| 593 | + pci_add_resource(&sys->resources, &pci_prefetchable_memory); |
| 594 | |
| 595 | return 1; |
| 596 | } |
| 597 | @@ -260,7 +261,7 @@ int __init pci_nanoengine_setup(int nr, |
| 598 | if (nr == 0) { |
| 599 | sys->mem_offset = NANO_PCI_MEM_RW_PHYS; |
| 600 | sys->io_offset = 0x400; |
| 601 | - ret = pci_nanoengine_setup_resources(sys->resource); |
| 602 | + ret = pci_nanoengine_setup_resources(sys); |
| 603 | /* Enable alternate memory bus master mode, see |
| 604 | * "Intel StrongARM SA1110 Developer's Manual", |
| 605 | * section 10.8, "Alternate Memory Bus Master Mode". */ |
| 606 | --- a/arch/arm/mach-tegra/pcie.c |
| 607 | +++ b/arch/arm/mach-tegra/pcie.c |
| 608 | @@ -409,7 +409,7 @@ static int tegra_pcie_setup(int nr, stru |
| 609 | pp->res[0].flags = IORESOURCE_IO; |
| 610 | if (request_resource(&ioport_resource, &pp->res[0])) |
| 611 | panic("Request PCIe IO resource failed\n"); |
| 612 | - sys->resource[0] = &pp->res[0]; |
| 613 | + pci_add_resource(&sys->resources, &pp->res[0]); |
| 614 | |
| 615 | /* |
| 616 | * IORESOURCE_MEM |
| 617 | @@ -428,7 +428,7 @@ static int tegra_pcie_setup(int nr, stru |
| 618 | pp->res[1].flags = IORESOURCE_MEM; |
| 619 | if (request_resource(&iomem_resource, &pp->res[1])) |
| 620 | panic("Request PCIe Memory resource failed\n"); |
| 621 | - sys->resource[1] = &pp->res[1]; |
| 622 | + pci_add_resource(&sys->resources, &pp->res[1]); |
| 623 | |
| 624 | /* |
| 625 | * IORESOURCE_MEM | IORESOURCE_PREFETCH |
| 626 | @@ -447,7 +447,7 @@ static int tegra_pcie_setup(int nr, stru |
| 627 | pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 628 | if (request_resource(&iomem_resource, &pp->res[2])) |
| 629 | panic("Request PCIe Prefetch Memory resource failed\n"); |
| 630 | - sys->resource[2] = &pp->res[2]; |
| 631 | + pci_add_resource(&sys->resources, &pp->res[2]); |
| 632 | |
| 633 | return 1; |
| 634 | } |
| 635 | @@ -468,7 +468,8 @@ static struct pci_bus __init *tegra_pcie |
| 636 | pp = tegra_pcie.port + nr; |
| 637 | pp->root_bus_nr = sys->busnr; |
| 638 | |
| 639 | - return pci_scan_bus(sys->busnr, &tegra_pcie_ops, sys); |
| 640 | + return pci_scan_root_bus(NULL, sys->busnr, &tegra_pcie_ops, sys, |
| 641 | + &sys->resources); |
| 642 | } |
| 643 | |
| 644 | static struct hw_pci tegra_pcie_hw __initdata = { |
| 645 | --- a/arch/arm/mach-versatile/pci.c |
| 646 | +++ b/arch/arm/mach-versatile/pci.c |
| 647 | @@ -191,7 +191,7 @@ static struct resource pre_mem = { |
| 648 | .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 649 | }; |
| 650 | |
| 651 | -static int __init pci_versatile_setup_resources(struct resource **resource) |
| 652 | +static int __init pci_versatile_setup_resources(struct list_head *resources) |
| 653 | { |
| 654 | int ret = 0; |
| 655 | |
| 656 | @@ -215,13 +215,13 @@ static int __init pci_versatile_setup_re |
| 657 | } |
| 658 | |
| 659 | /* |
| 660 | - * bus->resource[0] is the IO resource for this bus |
| 661 | - * bus->resource[1] is the mem resource for this bus |
| 662 | - * bus->resource[2] is the prefetch mem resource for this bus |
| 663 | + * the IO resource for this bus |
| 664 | + * the mem resource for this bus |
| 665 | + * the prefetch mem resource for this bus |
| 666 | */ |
| 667 | - resource[0] = &io_mem; |
| 668 | - resource[1] = &non_mem; |
| 669 | - resource[2] = &pre_mem; |
| 670 | + pci_add_resource(resources, &io_mem); |
| 671 | + pci_add_resource(resources, &non_mem); |
| 672 | + pci_add_resource(resources, &pre_mem); |
| 673 | |
| 674 | goto out; |
| 675 | |
| 676 | @@ -250,7 +250,7 @@ int __init pci_versatile_setup(int nr, s |
| 677 | |
| 678 | if (nr == 0) { |
| 679 | sys->mem_offset = 0; |
| 680 | - ret = pci_versatile_setup_resources(sys->resource); |
| 681 | + ret = pci_versatile_setup_resources(&sys->resources); |
| 682 | if (ret < 0) { |
| 683 | printk("pci_versatile_setup: resources... oops?\n"); |
| 684 | goto out; |
| 685 | @@ -306,7 +306,8 @@ int __init pci_versatile_setup(int nr, s |
| 686 | |
| 687 | struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys) |
| 688 | { |
| 689 | - return pci_scan_bus(sys->busnr, &pci_versatile_ops, sys); |
| 690 | + return pci_scan_root_bus(NULL, sys->busnr, &pci_versatile_ops, sys, |
| 691 | + &sys->resources); |
| 692 | } |
| 693 | |
| 694 | void __init pci_versatile_preinit(void) |
| 695 | --- a/arch/arm/plat-iop/pci.c |
| 696 | +++ b/arch/arm/plat-iop/pci.c |
| 697 | @@ -215,16 +215,16 @@ int iop3xx_pci_setup(int nr, struct pci_ |
| 698 | sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; |
| 699 | sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; |
| 700 | |
| 701 | - sys->resource[0] = &res[0]; |
| 702 | - sys->resource[1] = &res[1]; |
| 703 | - sys->resource[2] = NULL; |
| 704 | + pci_add_resource(&sys->resources, &res[0]); |
| 705 | + pci_add_resource(&sys->resources, &res[1]); |
| 706 | |
| 707 | return 1; |
| 708 | } |
| 709 | |
| 710 | struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys) |
| 711 | { |
| 712 | - return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); |
| 713 | + return pci_scan_root_bus(NULL, sys->busnr, &iop3xx_ops, sys, |
| 714 | + &sys->resources); |
| 715 | } |
| 716 | |
| 717 | void __init iop3xx_atu_setup(void) |
| 718 | --- a/arch/frv/mb93090-mb00/pci-vdk.c |
| 719 | +++ b/arch/frv/mb93090-mb00/pci-vdk.c |
| 720 | @@ -327,11 +327,6 @@ void __init pcibios_fixup_bus(struct pci |
| 721 | printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number); |
| 722 | #endif |
| 723 | |
| 724 | - if (bus->number == 0) { |
| 725 | - bus->resource[0] = &pci_ioport_resource; |
| 726 | - bus->resource[1] = &pci_iomem_resource; |
| 727 | - } |
| 728 | - |
| 729 | pci_read_bridge_bases(bus); |
| 730 | |
| 731 | if (bus->number == 0) { |
| 732 | @@ -357,6 +352,7 @@ void __init pcibios_fixup_bus(struct pci |
| 733 | int __init pcibios_init(void) |
| 734 | { |
| 735 | struct pci_ops *dir = NULL; |
| 736 | + LIST_HEAD(resources); |
| 737 | |
| 738 | if (!mb93090_mb00_detected) |
| 739 | return -ENXIO; |
| 740 | @@ -420,7 +416,10 @@ int __init pcibios_init(void) |
| 741 | } |
| 742 | |
| 743 | printk("PCI: Probing PCI hardware\n"); |
| 744 | - pci_root_bus = pci_scan_bus(0, pci_root_ops, NULL); |
| 745 | + pci_add_resource(&resources, &pci_ioport_resource); |
| 746 | + pci_add_resource(&resources, &pci_iomem_resource); |
| 747 | + pci_root_bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL, |
| 748 | + &resources); |
| 749 | |
| 750 | pcibios_irq_init(); |
| 751 | pcibios_fixup_peer_bridges(); |
| 752 | --- a/arch/ia64/pci/pci.c |
| 753 | +++ b/arch/ia64/pci/pci.c |
| 754 | @@ -134,6 +134,7 @@ alloc_pci_controller (int seg) |
| 755 | struct pci_root_info { |
| 756 | struct acpi_device *bridge; |
| 757 | struct pci_controller *controller; |
| 758 | + struct list_head resources; |
| 759 | char *name; |
| 760 | }; |
| 761 | |
| 762 | @@ -315,24 +316,13 @@ static __devinit acpi_status add_window( |
| 763 | &window->resource); |
| 764 | } |
| 765 | |
| 766 | - return AE_OK; |
| 767 | -} |
| 768 | + /* HP's firmware has a hack to work around a Windows bug. |
| 769 | + * Ignore these tiny memory ranges */ |
| 770 | + if (!((window->resource.flags & IORESOURCE_MEM) && |
| 771 | + (window->resource.end - window->resource.start < 16))) |
| 772 | + pci_add_resource(&info->resources, &window->resource); |
| 773 | |
| 774 | -static void __devinit |
| 775 | -pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) |
| 776 | -{ |
| 777 | - int i; |
| 778 | - |
| 779 | - pci_bus_remove_resources(bus); |
| 780 | - for (i = 0; i < ctrl->windows; i++) { |
| 781 | - struct resource *res = &ctrl->window[i].resource; |
| 782 | - /* HP's firmware has a hack to work around a Windows bug. |
| 783 | - * Ignore these tiny memory ranges */ |
| 784 | - if ((res->flags & IORESOURCE_MEM) && |
| 785 | - (res->end - res->start < 16)) |
| 786 | - continue; |
| 787 | - pci_bus_add_resource(bus, res, 0); |
| 788 | - } |
| 789 | + return AE_OK; |
| 790 | } |
| 791 | |
| 792 | struct pci_bus * __devinit |
| 793 | @@ -343,6 +333,7 @@ pci_acpi_scan_root(struct acpi_pci_root |
| 794 | int bus = root->secondary.start; |
| 795 | struct pci_controller *controller; |
| 796 | unsigned int windows = 0; |
| 797 | + struct pci_root_info info; |
| 798 | struct pci_bus *pbus; |
| 799 | char *name; |
| 800 | int pxm; |
| 801 | @@ -359,11 +350,10 @@ pci_acpi_scan_root(struct acpi_pci_root |
| 802 | controller->node = pxm_to_node(pxm); |
| 803 | #endif |
| 804 | |
| 805 | + INIT_LIST_HEAD(&info.resources); |
| 806 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window, |
| 807 | &windows); |
| 808 | if (windows) { |
| 809 | - struct pci_root_info info; |
| 810 | - |
| 811 | controller->window = |
| 812 | kmalloc_node(sizeof(*controller->window) * windows, |
| 813 | GFP_KERNEL, controller->node); |
| 814 | @@ -387,8 +377,14 @@ pci_acpi_scan_root(struct acpi_pci_root |
| 815 | * should handle the case here, but it appears that IA64 hasn't |
| 816 | * such quirk. So we just ignore the case now. |
| 817 | */ |
| 818 | - pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller); |
| 819 | + pbus = pci_create_root_bus(NULL, bus, &pci_root_ops, controller, |
| 820 | + &info.resources); |
| 821 | + if (!pbus) { |
| 822 | + pci_free_resource_list(&info.resources); |
| 823 | + return NULL; |
| 824 | + } |
| 825 | |
| 826 | + pbus->subordinate = pci_scan_child_bus(pbus); |
| 827 | return pbus; |
| 828 | |
| 829 | out3: |
| 830 | @@ -504,14 +500,10 @@ pcibios_fixup_bus (struct pci_bus *b) |
| 831 | if (b->self) { |
| 832 | pci_read_bridge_bases(b); |
| 833 | pcibios_fixup_bridge_resources(b->self); |
| 834 | - } else { |
| 835 | - pcibios_setup_root_windows(b, b->sysdata); |
| 836 | } |
| 837 | list_for_each_entry(dev, &b->devices, bus_list) |
| 838 | pcibios_fixup_device_resources(dev); |
| 839 | platform_pci_fixup_bus(b); |
| 840 | - |
| 841 | - return; |
| 842 | } |
| 843 | |
| 844 | void __devinit |
| 845 | --- a/arch/microblaze/include/asm/pci-bridge.h |
| 846 | +++ b/arch/microblaze/include/asm/pci-bridge.h |
| 847 | @@ -140,7 +140,6 @@ extern void pci_process_bridge_OF_ranges |
| 848 | /* Allocate & free a PCI host bridge structure */ |
| 849 | extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); |
| 850 | extern void pcibios_free_controller(struct pci_controller *phb); |
| 851 | -extern void pcibios_setup_phb_resources(struct pci_controller *hose); |
| 852 | |
| 853 | #endif /* __KERNEL__ */ |
| 854 | #endif /* _ASM_MICROBLAZE_PCI_BRIDGE_H */ |
| 855 | --- a/arch/microblaze/pci/pci-common.c |
| 856 | +++ b/arch/microblaze/pci/pci-common.c |
| 857 | @@ -1019,7 +1019,6 @@ static void __devinit pcibios_fixup_brid |
| 858 | struct pci_dev *dev = bus->self; |
| 859 | |
| 860 | pci_bus_for_each_resource(bus, res, i) { |
| 861 | - res = bus->resource[i]; |
| 862 | if (!res) |
| 863 | continue; |
| 864 | if (!res->flags) |
| 865 | @@ -1219,7 +1218,6 @@ void pcibios_allocate_bus_resources(stru |
| 866 | pci_domain_nr(bus), bus->number); |
| 867 | |
| 868 | pci_bus_for_each_resource(bus, res, i) { |
| 869 | - res = bus->resource[i]; |
| 870 | if (!res || !res->flags |
| 871 | || res->start > res->end || res->parent) |
| 872 | continue; |
| 873 | @@ -1510,14 +1508,18 @@ int pcibios_enable_device(struct pci_dev |
| 874 | return pci_enable_resources(dev, mask); |
| 875 | } |
| 876 | |
| 877 | -void __devinit pcibios_setup_phb_resources(struct pci_controller *hose) |
| 878 | +static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources) |
| 879 | { |
| 880 | - struct pci_bus *bus = hose->bus; |
| 881 | struct resource *res; |
| 882 | int i; |
| 883 | |
| 884 | /* Hookup PHB IO resource */ |
| 885 | - bus->resource[0] = res = &hose->io_resource; |
| 886 | + res = &hose->io_resource; |
| 887 | + |
| 888 | + /* Fixup IO space offset */ |
| 889 | + io_offset = (unsigned long)hose->io_base_virt - isa_io_base; |
| 890 | + res->start = (res->start + io_offset) & 0xffffffffu; |
| 891 | + res->end = (res->end + io_offset) & 0xffffffffu; |
| 892 | |
| 893 | if (!res->flags) { |
| 894 | printk(KERN_WARNING "PCI: I/O resource not set for host" |
| 895 | @@ -1528,6 +1530,7 @@ void __devinit pcibios_setup_phb_resourc |
| 896 | res->end = res->start + IO_SPACE_LIMIT; |
| 897 | res->flags = IORESOURCE_IO; |
| 898 | } |
| 899 | + pci_add_resource(resources, res); |
| 900 | |
| 901 | pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n", |
| 902 | (unsigned long long)res->start, |
| 903 | @@ -1550,7 +1553,7 @@ void __devinit pcibios_setup_phb_resourc |
| 904 | res->flags = IORESOURCE_MEM; |
| 905 | |
| 906 | } |
| 907 | - bus->resource[i+1] = res; |
| 908 | + pci_add_resource(resources, res); |
| 909 | |
| 910 | pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", |
| 911 | i, (unsigned long long)res->start, |
| 912 | @@ -1573,34 +1576,27 @@ struct device_node *pcibios_get_phb_of_n |
| 913 | |
| 914 | static void __devinit pcibios_scan_phb(struct pci_controller *hose) |
| 915 | { |
| 916 | + LIST_HEAD(resources); |
| 917 | struct pci_bus *bus; |
| 918 | struct device_node *node = hose->dn; |
| 919 | - unsigned long io_offset; |
| 920 | - struct resource *res = &hose->io_resource; |
| 921 | |
| 922 | pr_debug("PCI: Scanning PHB %s\n", |
| 923 | node ? node->full_name : "<NO NAME>"); |
| 924 | |
| 925 | - /* Create an empty bus for the toplevel */ |
| 926 | - bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); |
| 927 | + pcibios_setup_phb_resources(hose, &resources); |
| 928 | + |
| 929 | + bus = pci_scan_root_bus(hose->parent, hose->first_busno, |
| 930 | + hose->ops, hose, &resources); |
| 931 | if (bus == NULL) { |
| 932 | printk(KERN_ERR "Failed to create bus for PCI domain %04x\n", |
| 933 | hose->global_number); |
| 934 | + pci_free_resource_list(&resources); |
| 935 | return; |
| 936 | } |
| 937 | bus->secondary = hose->first_busno; |
| 938 | hose->bus = bus; |
| 939 | |
| 940 | - /* Fixup IO space offset */ |
| 941 | - io_offset = (unsigned long)hose->io_base_virt - isa_io_base; |
| 942 | - res->start = (res->start + io_offset) & 0xffffffffu; |
| 943 | - res->end = (res->end + io_offset) & 0xffffffffu; |
| 944 | - |
| 945 | - /* Wire up PHB bus resources */ |
| 946 | - pcibios_setup_phb_resources(hose); |
| 947 | - |
| 948 | - /* Scan children */ |
| 949 | - hose->last_busno = bus->subordinate = pci_scan_child_bus(bus); |
| 950 | + hose->last_busno = bus->subordinate; |
| 951 | } |
| 952 | |
| 953 | static int __init pcibios_init(void) |
| 954 | @@ -1614,8 +1610,6 @@ static int __init pcibios_init(void) |
| 955 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
| 956 | hose->last_busno = 0xff; |
| 957 | pcibios_scan_phb(hose); |
| 958 | - printk(KERN_INFO "calling pci_bus_add_devices()\n"); |
| 959 | - pci_bus_add_devices(hose->bus); |
| 960 | if (next_busno <= hose->last_busno) |
| 961 | next_busno = hose->last_busno + 1; |
| 962 | } |
| 963 | --- a/arch/mips/pci/pci.c |
| 964 | +++ b/arch/mips/pci/pci.c |
| 965 | @@ -81,6 +81,7 @@ static void __devinit pcibios_scanbus(st |
| 966 | { |
| 967 | static int next_busno; |
| 968 | static int need_domain_info; |
| 969 | + LIST_HEAD(resources); |
| 970 | struct pci_bus *bus; |
| 971 | |
| 972 | if (!hose->iommu) |
| 973 | @@ -89,7 +90,13 @@ static void __devinit pcibios_scanbus(st |
| 974 | if (hose->get_busno && pci_probe_only) |
| 975 | next_busno = (*hose->get_busno)(); |
| 976 | |
| 977 | - bus = pci_scan_bus(next_busno, hose->pci_ops, hose); |
| 978 | + pci_add_resource(&resources, hose->mem_resource); |
| 979 | + pci_add_resource(&resources, hose->io_resource); |
| 980 | + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, |
| 981 | + &resources); |
| 982 | + if (!bus) |
| 983 | + pci_free_resource_list(&resources); |
| 984 | + |
| 985 | hose->bus = bus; |
| 986 | |
| 987 | need_domain_info = need_domain_info || hose->index; |
| 988 | @@ -266,15 +273,11 @@ void __devinit pcibios_fixup_bus(struct |
| 989 | { |
| 990 | /* Propagate hose info into the subordinate devices. */ |
| 991 | |
| 992 | - struct pci_controller *hose = bus->sysdata; |
| 993 | struct list_head *ln; |
| 994 | struct pci_dev *dev = bus->self; |
| 995 | |
| 996 | - if (!dev) { |
| 997 | - bus->resource[0] = hose->io_resource; |
| 998 | - bus->resource[1] = hose->mem_resource; |
| 999 | - } else if (pci_probe_only && |
| 1000 | - (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
| 1001 | + if (pci_probe_only && dev && |
| 1002 | + (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
| 1003 | pci_read_bridge_bases(bus); |
| 1004 | pcibios_fixup_device_resources(dev, bus); |
| 1005 | } |
| 1006 | --- a/arch/mn10300/unit-asb2305/pci.c |
| 1007 | +++ b/arch/mn10300/unit-asb2305/pci.c |
| 1008 | @@ -380,11 +380,6 @@ void __devinit pcibios_fixup_bus(struct |
| 1009 | { |
| 1010 | struct pci_dev *dev; |
| 1011 | |
| 1012 | - if (bus->number == 0) { |
| 1013 | - bus->resource[0] = &pci_ioport_resource; |
| 1014 | - bus->resource[1] = &pci_iomem_resource; |
| 1015 | - } |
| 1016 | - |
| 1017 | if (bus->self) { |
| 1018 | pci_read_bridge_bases(bus); |
| 1019 | pcibios_fixup_device_resources(bus->self); |
| 1020 | @@ -402,6 +397,8 @@ void __devinit pcibios_fixup_bus(struct |
| 1021 | */ |
| 1022 | static int __init pcibios_init(void) |
| 1023 | { |
| 1024 | + LIST_HEAD(resources); |
| 1025 | + |
| 1026 | ioport_resource.start = 0xA0000000; |
| 1027 | ioport_resource.end = 0xDFFFFFFF; |
| 1028 | iomem_resource.start = 0xA0000000; |
| 1029 | @@ -423,7 +420,10 @@ static int __init pcibios_init(void) |
| 1030 | printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n", |
| 1031 | MEM_PAGING_REG); |
| 1032 | |
| 1033 | - pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL); |
| 1034 | + pci_add_resource(&resources, &pci_ioport_resource); |
| 1035 | + pci_add_resource(&resources, &pci_iomem_resource); |
| 1036 | + pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL, |
| 1037 | + &resources); |
| 1038 | |
| 1039 | pcibios_irq_init(); |
| 1040 | pcibios_fixup_irqs(); |
| 1041 | --- a/arch/powerpc/include/asm/pci-bridge.h |
| 1042 | +++ b/arch/powerpc/include/asm/pci-bridge.h |
| 1043 | @@ -222,7 +222,6 @@ extern void pci_process_bridge_OF_ranges |
| 1044 | /* Allocate & free a PCI host bridge structure */ |
| 1045 | extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); |
| 1046 | extern void pcibios_free_controller(struct pci_controller *phb); |
| 1047 | -extern void pcibios_setup_phb_resources(struct pci_controller *hose); |
| 1048 | |
| 1049 | #ifdef CONFIG_PCI |
| 1050 | extern int pcibios_vaddr_is_ioport(void __iomem *address); |
| 1051 | --- a/arch/powerpc/kernel/pci-common.c |
| 1052 | +++ b/arch/powerpc/kernel/pci-common.c |
| 1053 | @@ -1555,14 +1555,13 @@ int pcibios_enable_device(struct pci_dev |
| 1054 | return pci_enable_resources(dev, mask); |
| 1055 | } |
| 1056 | |
| 1057 | -void __devinit pcibios_setup_phb_resources(struct pci_controller *hose) |
| 1058 | +static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources) |
| 1059 | { |
| 1060 | - struct pci_bus *bus = hose->bus; |
| 1061 | struct resource *res; |
| 1062 | int i; |
| 1063 | |
| 1064 | /* Hookup PHB IO resource */ |
| 1065 | - bus->resource[0] = res = &hose->io_resource; |
| 1066 | + res = &hose->io_resource; |
| 1067 | |
| 1068 | if (!res->flags) { |
| 1069 | printk(KERN_WARNING "PCI: I/O resource not set for host" |
| 1070 | @@ -1580,6 +1579,7 @@ void __devinit pcibios_setup_phb_resourc |
| 1071 | (unsigned long long)res->start, |
| 1072 | (unsigned long long)res->end, |
| 1073 | (unsigned long)res->flags); |
| 1074 | + pci_add_resource(resources, res); |
| 1075 | |
| 1076 | /* Hookup PHB Memory resources */ |
| 1077 | for (i = 0; i < 3; ++i) { |
| 1078 | @@ -1597,12 +1597,12 @@ void __devinit pcibios_setup_phb_resourc |
| 1079 | res->flags = IORESOURCE_MEM; |
| 1080 | #endif /* CONFIG_PPC32 */ |
| 1081 | } |
| 1082 | - bus->resource[i+1] = res; |
| 1083 | |
| 1084 | pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i, |
| 1085 | (unsigned long long)res->start, |
| 1086 | (unsigned long long)res->end, |
| 1087 | (unsigned long)res->flags); |
| 1088 | + pci_add_resource(resources, res); |
| 1089 | } |
| 1090 | |
| 1091 | pr_debug("PCI: PHB MEM offset = %016llx\n", |
| 1092 | @@ -1696,6 +1696,7 @@ struct device_node *pcibios_get_phb_of_n |
| 1093 | */ |
| 1094 | void __devinit pcibios_scan_phb(struct pci_controller *hose) |
| 1095 | { |
| 1096 | + LIST_HEAD(resources); |
| 1097 | struct pci_bus *bus; |
| 1098 | struct device_node *node = hose->dn; |
| 1099 | int mode; |
| 1100 | @@ -1703,22 +1704,24 @@ void __devinit pcibios_scan_phb(struct p |
| 1101 | pr_debug("PCI: Scanning PHB %s\n", |
| 1102 | node ? node->full_name : "<NO NAME>"); |
| 1103 | |
| 1104 | + /* Get some IO space for the new PHB */ |
| 1105 | + pcibios_setup_phb_io_space(hose); |
| 1106 | + |
| 1107 | + /* Wire up PHB bus resources */ |
| 1108 | + pcibios_setup_phb_resources(hose, &resources); |
| 1109 | + |
| 1110 | /* Create an empty bus for the toplevel */ |
| 1111 | - bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); |
| 1112 | + bus = pci_create_root_bus(hose->parent, hose->first_busno, |
| 1113 | + hose->ops, hose, &resources); |
| 1114 | if (bus == NULL) { |
| 1115 | pr_err("Failed to create bus for PCI domain %04x\n", |
| 1116 | hose->global_number); |
| 1117 | + pci_free_resource_list(&resources); |
| 1118 | return; |
| 1119 | } |
| 1120 | bus->secondary = hose->first_busno; |
| 1121 | hose->bus = bus; |
| 1122 | |
| 1123 | - /* Get some IO space for the new PHB */ |
| 1124 | - pcibios_setup_phb_io_space(hose); |
| 1125 | - |
| 1126 | - /* Wire up PHB bus resources */ |
| 1127 | - pcibios_setup_phb_resources(hose); |
| 1128 | - |
| 1129 | /* Get probe mode and perform scan */ |
| 1130 | mode = PCI_PROBE_NORMAL; |
| 1131 | if (node && ppc_md.pci_probe_mode) |
| 1132 | --- a/arch/powerpc/kernel/pci_64.c |
| 1133 | +++ b/arch/powerpc/kernel/pci_64.c |
| 1134 | @@ -131,30 +131,13 @@ EXPORT_SYMBOL_GPL(pcibios_unmap_io_space |
| 1135 | |
| 1136 | #endif /* CONFIG_HOTPLUG */ |
| 1137 | |
| 1138 | -int __devinit pcibios_map_io_space(struct pci_bus *bus) |
| 1139 | +static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose) |
| 1140 | { |
| 1141 | struct vm_struct *area; |
| 1142 | unsigned long phys_page; |
| 1143 | unsigned long size_page; |
| 1144 | unsigned long io_virt_offset; |
| 1145 | - struct pci_controller *hose; |
| 1146 | - |
| 1147 | - WARN_ON(bus == NULL); |
| 1148 | |
| 1149 | - /* If this not a PHB, nothing to do, page tables still exist and |
| 1150 | - * thus HPTEs will be faulted in when needed |
| 1151 | - */ |
| 1152 | - if (bus->self) { |
| 1153 | - pr_debug("IO mapping for PCI-PCI bridge %s\n", |
| 1154 | - pci_name(bus->self)); |
| 1155 | - pr_debug(" virt=0x%016llx...0x%016llx\n", |
| 1156 | - bus->resource[0]->start + _IO_BASE, |
| 1157 | - bus->resource[0]->end + _IO_BASE); |
| 1158 | - return 0; |
| 1159 | - } |
| 1160 | - |
| 1161 | - /* Get the host bridge */ |
| 1162 | - hose = pci_bus_to_host(bus); |
| 1163 | phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE); |
| 1164 | size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE); |
| 1165 | |
| 1166 | @@ -198,11 +181,30 @@ int __devinit pcibios_map_io_space(struc |
| 1167 | |
| 1168 | return 0; |
| 1169 | } |
| 1170 | + |
| 1171 | +int __devinit pcibios_map_io_space(struct pci_bus *bus) |
| 1172 | +{ |
| 1173 | + WARN_ON(bus == NULL); |
| 1174 | + |
| 1175 | + /* If this not a PHB, nothing to do, page tables still exist and |
| 1176 | + * thus HPTEs will be faulted in when needed |
| 1177 | + */ |
| 1178 | + if (bus->self) { |
| 1179 | + pr_debug("IO mapping for PCI-PCI bridge %s\n", |
| 1180 | + pci_name(bus->self)); |
| 1181 | + pr_debug(" virt=0x%016llx...0x%016llx\n", |
| 1182 | + bus->resource[0]->start + _IO_BASE, |
| 1183 | + bus->resource[0]->end + _IO_BASE); |
| 1184 | + return 0; |
| 1185 | + } |
| 1186 | + |
| 1187 | + return pcibios_map_phb_io_space(pci_bus_to_host(bus)); |
| 1188 | +} |
| 1189 | EXPORT_SYMBOL_GPL(pcibios_map_io_space); |
| 1190 | |
| 1191 | void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose) |
| 1192 | { |
| 1193 | - pcibios_map_io_space(hose->bus); |
| 1194 | + pcibios_map_phb_io_space(hose); |
| 1195 | } |
| 1196 | |
| 1197 | #define IOBASE_BRIDGE_NUMBER 0 |
| 1198 | --- a/arch/sh/drivers/pci/pci.c |
| 1199 | +++ b/arch/sh/drivers/pci/pci.c |
| 1200 | @@ -36,9 +36,15 @@ static void __devinit pcibios_scanbus(st |
| 1201 | { |
| 1202 | static int next_busno; |
| 1203 | static int need_domain_info; |
| 1204 | + LIST_HEAD(resources); |
| 1205 | + int i; |
| 1206 | struct pci_bus *bus; |
| 1207 | |
| 1208 | - bus = pci_scan_bus(next_busno, hose->pci_ops, hose); |
| 1209 | + for (i = 0; i < hose->nr_resources; i++) |
| 1210 | + pci_add_resource(&resources, hose->resources + i); |
| 1211 | + |
| 1212 | + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, |
| 1213 | + &resources); |
| 1214 | hose->bus = bus; |
| 1215 | |
| 1216 | need_domain_info = need_domain_info || hose->index; |
| 1217 | @@ -55,6 +61,8 @@ static void __devinit pcibios_scanbus(st |
| 1218 | pci_bus_size_bridges(bus); |
| 1219 | pci_bus_assign_resources(bus); |
| 1220 | pci_enable_bridges(bus); |
| 1221 | + } else { |
| 1222 | + pci_free_resource_list(&resources); |
| 1223 | } |
| 1224 | } |
| 1225 | |
| 1226 | @@ -162,16 +170,8 @@ static void pcibios_fixup_device_resourc |
| 1227 | */ |
| 1228 | void __devinit pcibios_fixup_bus(struct pci_bus *bus) |
| 1229 | { |
| 1230 | - struct pci_dev *dev = bus->self; |
| 1231 | + struct pci_dev *dev; |
| 1232 | struct list_head *ln; |
| 1233 | - struct pci_channel *hose = bus->sysdata; |
| 1234 | - |
| 1235 | - if (!dev) { |
| 1236 | - int i; |
| 1237 | - |
| 1238 | - for (i = 0; i < hose->nr_resources; i++) |
| 1239 | - bus->resource[i] = hose->resources + i; |
| 1240 | - } |
| 1241 | |
| 1242 | for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { |
| 1243 | dev = pci_dev_b(ln); |
| 1244 | --- a/arch/sparc/kernel/leon_pci.c |
| 1245 | +++ b/arch/sparc/kernel/leon_pci.c |
| 1246 | @@ -19,22 +19,22 @@ |
| 1247 | */ |
| 1248 | void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) |
| 1249 | { |
| 1250 | + LIST_HEAD(resources); |
| 1251 | struct pci_bus *root_bus; |
| 1252 | |
| 1253 | - root_bus = pci_scan_bus_parented(&ofdev->dev, 0, info->ops, info); |
| 1254 | - if (root_bus) { |
| 1255 | - root_bus->resource[0] = &info->io_space; |
| 1256 | - root_bus->resource[1] = &info->mem_space; |
| 1257 | - root_bus->resource[2] = NULL; |
| 1258 | - |
| 1259 | - /* Init all PCI devices into PCI tree */ |
| 1260 | - pci_bus_add_devices(root_bus); |
| 1261 | + pci_add_resource(&resources, &info->io_space); |
| 1262 | + pci_add_resource(&resources, &info->mem_space); |
| 1263 | |
| 1264 | + root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info, |
| 1265 | + &resources); |
| 1266 | + if (root_bus) { |
| 1267 | /* Setup IRQs of all devices using custom routines */ |
| 1268 | pci_fixup_irqs(pci_common_swizzle, info->map_irq); |
| 1269 | |
| 1270 | /* Assign devices with resources */ |
| 1271 | pci_assign_unassigned_resources(); |
| 1272 | + } else { |
| 1273 | + pci_free_resource_list(&resources); |
| 1274 | } |
| 1275 | } |
| 1276 | |
| 1277 | @@ -83,15 +83,6 @@ void __devinit pcibios_fixup_bus(struct |
| 1278 | int i, has_io, has_mem; |
| 1279 | u16 cmd; |
| 1280 | |
| 1281 | - /* Generic PCI bus probing sets these to point at |
| 1282 | - * &io{port,mem}_resouce which is wrong for us. |
| 1283 | - */ |
| 1284 | - if (pbus->self == NULL) { |
| 1285 | - pbus->resource[0] = &info->io_space; |
| 1286 | - pbus->resource[1] = &info->mem_space; |
| 1287 | - pbus->resource[2] = NULL; |
| 1288 | - } |
| 1289 | - |
| 1290 | list_for_each_entry(dev, &pbus->devices, bus_list) { |
| 1291 | /* |
| 1292 | * We can not rely on that the bootloader has enabled I/O |
| 1293 | --- a/arch/sparc/kernel/pci.c |
| 1294 | +++ b/arch/sparc/kernel/pci.c |
| 1295 | @@ -685,23 +685,25 @@ static void __devinit pci_bus_register_o |
| 1296 | struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, |
| 1297 | struct device *parent) |
| 1298 | { |
| 1299 | + LIST_HEAD(resources); |
| 1300 | struct device_node *node = pbm->op->dev.of_node; |
| 1301 | struct pci_bus *bus; |
| 1302 | |
| 1303 | printk("PCI: Scanning PBM %s\n", node->full_name); |
| 1304 | |
| 1305 | - bus = pci_create_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm); |
| 1306 | + pci_add_resource(&resources, &pbm->io_space); |
| 1307 | + pci_add_resource(&resources, &pbm->mem_space); |
| 1308 | + bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops, |
| 1309 | + pbm, &resources); |
| 1310 | if (!bus) { |
| 1311 | printk(KERN_ERR "Failed to create bus for %s\n", |
| 1312 | node->full_name); |
| 1313 | + pci_free_resource_list(&resources); |
| 1314 | return NULL; |
| 1315 | } |
| 1316 | bus->secondary = pbm->pci_first_busno; |
| 1317 | bus->subordinate = pbm->pci_last_busno; |
| 1318 | |
| 1319 | - bus->resource[0] = &pbm->io_space; |
| 1320 | - bus->resource[1] = &pbm->mem_space; |
| 1321 | - |
| 1322 | pci_of_scan_bus(pbm, node, bus); |
| 1323 | pci_bus_add_devices(bus); |
| 1324 | pci_bus_register_of_sysfs(bus); |
| 1325 | @@ -711,13 +713,6 @@ struct pci_bus * __devinit pci_scan_one_ |
| 1326 | |
| 1327 | void __devinit pcibios_fixup_bus(struct pci_bus *pbus) |
| 1328 | { |
| 1329 | - struct pci_pbm_info *pbm = pbus->sysdata; |
| 1330 | - |
| 1331 | - /* Generic PCI bus probing sets these to point at |
| 1332 | - * &io{port,mem}_resouce which is wrong for us. |
| 1333 | - */ |
| 1334 | - pbus->resource[0] = &pbm->io_space; |
| 1335 | - pbus->resource[1] = &pbm->mem_space; |
| 1336 | } |
| 1337 | |
| 1338 | void pcibios_update_irq(struct pci_dev *pdev, int irq) |
| 1339 | --- a/arch/x86/include/asm/topology.h |
| 1340 | +++ b/arch/x86/include/asm/topology.h |
| 1341 | @@ -174,7 +174,7 @@ static inline void arch_fix_phys_package |
| 1342 | } |
| 1343 | |
| 1344 | struct pci_bus; |
| 1345 | -void x86_pci_root_bus_res_quirks(struct pci_bus *b); |
| 1346 | +void x86_pci_root_bus_resources(int bus, struct list_head *resources); |
| 1347 | |
| 1348 | #ifdef CONFIG_SMP |
| 1349 | #define mc_capable() ((boot_cpu_data.x86_max_cores > 1) && \ |
| 1350 | --- a/arch/x86/pci/acpi.c |
| 1351 | +++ b/arch/x86/pci/acpi.c |
| 1352 | @@ -12,7 +12,7 @@ struct pci_root_info { |
| 1353 | char *name; |
| 1354 | unsigned int res_num; |
| 1355 | struct resource *res; |
| 1356 | - struct pci_bus *bus; |
| 1357 | + struct list_head *resources; |
| 1358 | int busnum; |
| 1359 | }; |
| 1360 | |
| 1361 | @@ -275,23 +275,20 @@ static void add_resources(struct pci_roo |
| 1362 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", |
| 1363 | res, conflict->name, conflict); |
| 1364 | else |
| 1365 | - pci_bus_add_resource(info->bus, res, 0); |
| 1366 | + pci_add_resource(info->resources, res); |
| 1367 | } |
| 1368 | } |
| 1369 | |
| 1370 | static void |
| 1371 | get_current_resources(struct acpi_device *device, int busnum, |
| 1372 | - int domain, struct pci_bus *bus) |
| 1373 | + int domain, struct list_head *resources) |
| 1374 | { |
| 1375 | struct pci_root_info info; |
| 1376 | size_t size; |
| 1377 | |
| 1378 | - if (pci_use_crs) |
| 1379 | - pci_bus_remove_resources(bus); |
| 1380 | - |
| 1381 | info.bridge = device; |
| 1382 | - info.bus = bus; |
| 1383 | info.res_num = 0; |
| 1384 | + info.resources = resources; |
| 1385 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, |
| 1386 | &info); |
| 1387 | if (!info.res_num) |
| 1388 | @@ -300,7 +297,7 @@ get_current_resources(struct acpi_device |
| 1389 | size = sizeof(*info.res) * info.res_num; |
| 1390 | info.res = kmalloc(size, GFP_KERNEL); |
| 1391 | if (!info.res) |
| 1392 | - goto res_alloc_fail; |
| 1393 | + return; |
| 1394 | |
| 1395 | info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum); |
| 1396 | if (!info.name) |
| 1397 | @@ -315,8 +312,6 @@ get_current_resources(struct acpi_device |
| 1398 | |
| 1399 | name_alloc_fail: |
| 1400 | kfree(info.res); |
| 1401 | -res_alloc_fail: |
| 1402 | - return; |
| 1403 | } |
| 1404 | |
| 1405 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) |
| 1406 | @@ -324,6 +319,7 @@ struct pci_bus * __devinit pci_acpi_scan |
| 1407 | struct acpi_device *device = root->device; |
| 1408 | int domain = root->segment; |
| 1409 | int busnum = root->secondary.start; |
| 1410 | + LIST_HEAD(resources); |
| 1411 | struct pci_bus *bus; |
| 1412 | struct pci_sysdata *sd; |
| 1413 | int node; |
| 1414 | @@ -378,11 +374,15 @@ struct pci_bus * __devinit pci_acpi_scan |
| 1415 | memcpy(bus->sysdata, sd, sizeof(*sd)); |
| 1416 | kfree(sd); |
| 1417 | } else { |
| 1418 | - bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd); |
| 1419 | - if (bus) { |
| 1420 | - get_current_resources(device, busnum, domain, bus); |
| 1421 | + get_current_resources(device, busnum, domain, &resources); |
| 1422 | + if (list_empty(&resources)) |
| 1423 | + x86_pci_root_bus_resources(busnum, &resources); |
| 1424 | + bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, |
| 1425 | + &resources); |
| 1426 | + if (bus) |
| 1427 | bus->subordinate = pci_scan_child_bus(bus); |
| 1428 | - } |
| 1429 | + else |
| 1430 | + pci_free_resource_list(&resources); |
| 1431 | } |
| 1432 | |
| 1433 | /* After the PCI-E bus has been walked and all devices discovered, |
| 1434 | --- a/arch/x86/pci/broadcom_bus.c |
| 1435 | +++ b/arch/x86/pci/broadcom_bus.c |
| 1436 | @@ -15,10 +15,11 @@ |
| 1437 | #include <linux/pci.h> |
| 1438 | #include <linux/init.h> |
| 1439 | #include <asm/pci_x86.h> |
| 1440 | +#include <asm/pci-direct.h> |
| 1441 | |
| 1442 | #include "bus_numa.h" |
| 1443 | |
| 1444 | -static void __devinit cnb20le_res(struct pci_dev *dev) |
| 1445 | +static void __init cnb20le_res(u8 bus, u8 slot, u8 func) |
| 1446 | { |
| 1447 | struct pci_root_info *info; |
| 1448 | struct resource res; |
| 1449 | @@ -26,21 +27,12 @@ static void __devinit cnb20le_res(struct |
| 1450 | u8 fbus, lbus; |
| 1451 | int i; |
| 1452 | |
| 1453 | -#ifdef CONFIG_ACPI |
| 1454 | - /* |
| 1455 | - * We should get host bridge information from ACPI unless the BIOS |
| 1456 | - * doesn't support it. |
| 1457 | - */ |
| 1458 | - if (acpi_os_get_root_pointer()) |
| 1459 | - return; |
| 1460 | -#endif |
| 1461 | - |
| 1462 | info = &pci_root_info[pci_root_num]; |
| 1463 | pci_root_num++; |
| 1464 | |
| 1465 | /* read the PCI bus numbers */ |
| 1466 | - pci_read_config_byte(dev, 0x44, &fbus); |
| 1467 | - pci_read_config_byte(dev, 0x45, &lbus); |
| 1468 | + fbus = read_pci_config_byte(bus, slot, func, 0x44); |
| 1469 | + lbus = read_pci_config_byte(bus, slot, func, 0x45); |
| 1470 | info->bus_min = fbus; |
| 1471 | info->bus_max = lbus; |
| 1472 | |
| 1473 | @@ -59,8 +51,8 @@ static void __devinit cnb20le_res(struct |
| 1474 | } |
| 1475 | |
| 1476 | /* read the non-prefetchable memory window */ |
| 1477 | - pci_read_config_word(dev, 0xc0, &word1); |
| 1478 | - pci_read_config_word(dev, 0xc2, &word2); |
| 1479 | + word1 = read_pci_config_16(bus, slot, func, 0xc0); |
| 1480 | + word2 = read_pci_config_16(bus, slot, func, 0xc2); |
| 1481 | if (word1 != word2) { |
| 1482 | res.start = (word1 << 16) | 0x0000; |
| 1483 | res.end = (word2 << 16) | 0xffff; |
| 1484 | @@ -69,8 +61,8 @@ static void __devinit cnb20le_res(struct |
| 1485 | } |
| 1486 | |
| 1487 | /* read the prefetchable memory window */ |
| 1488 | - pci_read_config_word(dev, 0xc4, &word1); |
| 1489 | - pci_read_config_word(dev, 0xc6, &word2); |
| 1490 | + word1 = read_pci_config_16(bus, slot, func, 0xc4); |
| 1491 | + word2 = read_pci_config_16(bus, slot, func, 0xc6); |
| 1492 | if (word1 != word2) { |
| 1493 | res.start = (word1 << 16) | 0x0000; |
| 1494 | res.end = (word2 << 16) | 0xffff; |
| 1495 | @@ -79,8 +71,8 @@ static void __devinit cnb20le_res(struct |
| 1496 | } |
| 1497 | |
| 1498 | /* read the IO port window */ |
| 1499 | - pci_read_config_word(dev, 0xd0, &word1); |
| 1500 | - pci_read_config_word(dev, 0xd2, &word2); |
| 1501 | + word1 = read_pci_config_16(bus, slot, func, 0xd0); |
| 1502 | + word2 = read_pci_config_16(bus, slot, func, 0xd2); |
| 1503 | if (word1 != word2) { |
| 1504 | res.start = word1; |
| 1505 | res.end = word2; |
| 1506 | @@ -92,13 +84,37 @@ static void __devinit cnb20le_res(struct |
| 1507 | res.start = fbus; |
| 1508 | res.end = lbus; |
| 1509 | res.flags = IORESOURCE_BUS; |
| 1510 | - dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n", |
| 1511 | - pci_domain_nr(dev->bus), &res); |
| 1512 | + printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res); |
| 1513 | |
| 1514 | for (i = 0; i < info->res_num; i++) |
| 1515 | - dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]); |
| 1516 | + printk(KERN_INFO "host bridge window %pR\n", &info->res[i]); |
| 1517 | } |
| 1518 | |
| 1519 | -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, |
| 1520 | - cnb20le_res); |
| 1521 | +static int __init broadcom_postcore_init(void) |
| 1522 | +{ |
| 1523 | + u8 bus = 0, slot = 0; |
| 1524 | + u32 id; |
| 1525 | + u16 vendor, device; |
| 1526 | + |
| 1527 | +#ifdef CONFIG_ACPI |
| 1528 | + /* |
| 1529 | + * We should get host bridge information from ACPI unless the BIOS |
| 1530 | + * doesn't support it. |
| 1531 | + */ |
| 1532 | + if (acpi_os_get_root_pointer()) |
| 1533 | + return 0; |
| 1534 | +#endif |
| 1535 | + |
| 1536 | + id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); |
| 1537 | + vendor = id & 0xffff; |
| 1538 | + device = (id >> 16) & 0xffff; |
| 1539 | + |
| 1540 | + if (vendor == PCI_VENDOR_ID_SERVERWORKS && |
| 1541 | + device == PCI_DEVICE_ID_SERVERWORKS_LE) { |
| 1542 | + cnb20le_res(bus, slot, 0); |
| 1543 | + cnb20le_res(bus, slot, 1); |
| 1544 | + } |
| 1545 | + return 0; |
| 1546 | +} |
| 1547 | |
| 1548 | +postcore_initcall(broadcom_postcore_init); |
| 1549 | --- a/arch/x86/pci/bus_numa.c |
| 1550 | +++ b/arch/x86/pci/bus_numa.c |
| 1551 | @@ -7,45 +7,50 @@ |
| 1552 | int pci_root_num; |
| 1553 | struct pci_root_info pci_root_info[PCI_ROOT_NR]; |
| 1554 | |
| 1555 | -void x86_pci_root_bus_res_quirks(struct pci_bus *b) |
| 1556 | +void x86_pci_root_bus_resources(int bus, struct list_head *resources) |
| 1557 | { |
| 1558 | int i; |
| 1559 | int j; |
| 1560 | struct pci_root_info *info; |
| 1561 | |
| 1562 | - /* don't go for it if _CRS is used already */ |
| 1563 | - if (b->resource[0] != &ioport_resource || |
| 1564 | - b->resource[1] != &iomem_resource) |
| 1565 | - return; |
| 1566 | - |
| 1567 | if (!pci_root_num) |
| 1568 | - return; |
| 1569 | + goto default_resources; |
| 1570 | |
| 1571 | for (i = 0; i < pci_root_num; i++) { |
| 1572 | - if (pci_root_info[i].bus_min == b->number) |
| 1573 | + if (pci_root_info[i].bus_min == bus) |
| 1574 | break; |
| 1575 | } |
| 1576 | |
| 1577 | if (i == pci_root_num) |
| 1578 | - return; |
| 1579 | + goto default_resources; |
| 1580 | |
| 1581 | - printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n", |
| 1582 | - b->number); |
| 1583 | + printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n", |
| 1584 | + bus); |
| 1585 | |
| 1586 | - pci_bus_remove_resources(b); |
| 1587 | info = &pci_root_info[i]; |
| 1588 | for (j = 0; j < info->res_num; j++) { |
| 1589 | struct resource *res; |
| 1590 | struct resource *root; |
| 1591 | |
| 1592 | res = &info->res[j]; |
| 1593 | - pci_bus_add_resource(b, res, 0); |
| 1594 | + pci_add_resource(resources, res); |
| 1595 | if (res->flags & IORESOURCE_IO) |
| 1596 | root = &ioport_resource; |
| 1597 | else |
| 1598 | root = &iomem_resource; |
| 1599 | insert_resource(root, res); |
| 1600 | } |
| 1601 | + return; |
| 1602 | + |
| 1603 | +default_resources: |
| 1604 | + /* |
| 1605 | + * We don't have any host bridge aperture information from the |
| 1606 | + * "native host bridge drivers," e.g., amd_bus or broadcom_bus, |
| 1607 | + * so fall back to the defaults historically used by pci_create_bus(). |
| 1608 | + */ |
| 1609 | + printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus); |
| 1610 | + pci_add_resource(resources, &ioport_resource); |
| 1611 | + pci_add_resource(resources, &iomem_resource); |
| 1612 | } |
| 1613 | |
| 1614 | void __devinit update_res(struct pci_root_info *info, resource_size_t start, |
| 1615 | --- a/arch/x86/pci/common.c |
| 1616 | +++ b/arch/x86/pci/common.c |
| 1617 | @@ -164,9 +164,6 @@ void __devinit pcibios_fixup_bus(struct |
| 1618 | { |
| 1619 | struct pci_dev *dev; |
| 1620 | |
| 1621 | - /* root bus? */ |
| 1622 | - if (!b->parent) |
| 1623 | - x86_pci_root_bus_res_quirks(b); |
| 1624 | pci_read_bridge_bases(b); |
| 1625 | list_for_each_entry(dev, &b->devices, bus_list) |
| 1626 | pcibios_fixup_device_resources(dev); |
| 1627 | @@ -433,6 +430,7 @@ void __init dmi_check_pciprobe(void) |
| 1628 | |
| 1629 | struct pci_bus * __devinit pcibios_scan_root(int busnum) |
| 1630 | { |
| 1631 | + LIST_HEAD(resources); |
| 1632 | struct pci_bus *bus = NULL; |
| 1633 | struct pci_sysdata *sd; |
| 1634 | |
| 1635 | @@ -456,9 +454,12 @@ struct pci_bus * __devinit pcibios_scan_ |
| 1636 | sd->node = get_mp_bus_to_node(busnum); |
| 1637 | |
| 1638 | printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum); |
| 1639 | - bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); |
| 1640 | - if (!bus) |
| 1641 | + x86_pci_root_bus_resources(busnum, &resources); |
| 1642 | + bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources); |
| 1643 | + if (!bus) { |
| 1644 | + pci_free_resource_list(&resources); |
| 1645 | kfree(sd); |
| 1646 | + } |
| 1647 | |
| 1648 | return bus; |
| 1649 | } |
| 1650 | @@ -639,6 +640,7 @@ int pci_ext_cfg_avail(struct pci_dev *de |
| 1651 | |
| 1652 | struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node) |
| 1653 | { |
| 1654 | + LIST_HEAD(resources); |
| 1655 | struct pci_bus *bus = NULL; |
| 1656 | struct pci_sysdata *sd; |
| 1657 | |
| 1658 | @@ -653,9 +655,12 @@ struct pci_bus * __devinit pci_scan_bus_ |
| 1659 | return NULL; |
| 1660 | } |
| 1661 | sd->node = node; |
| 1662 | - bus = pci_scan_bus(busno, ops, sd); |
| 1663 | - if (!bus) |
| 1664 | + x86_pci_root_bus_resources(busno, &resources); |
| 1665 | + bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources); |
| 1666 | + if (!bus) { |
| 1667 | + pci_free_resource_list(&resources); |
| 1668 | kfree(sd); |
| 1669 | + } |
| 1670 | |
| 1671 | return bus; |
| 1672 | } |
| 1673 | --- a/arch/x86/pci/legacy.c |
| 1674 | +++ b/arch/x86/pci/legacy.c |
| 1675 | @@ -31,9 +31,6 @@ int __init pci_legacy_init(void) |
| 1676 | |
| 1677 | printk("PCI: Probing PCI hardware\n"); |
| 1678 | pci_root_bus = pcibios_scan_root(0); |
| 1679 | - if (pci_root_bus) |
| 1680 | - pci_bus_add_devices(pci_root_bus); |
| 1681 | - |
| 1682 | return 0; |
| 1683 | } |
| 1684 | |
| 1685 | --- a/arch/x86/pci/numaq_32.c |
| 1686 | +++ b/arch/x86/pci/numaq_32.c |
| 1687 | @@ -153,8 +153,6 @@ int __init pci_numaq_init(void) |
| 1688 | raw_pci_ops = &pci_direct_conf1_mq; |
| 1689 | |
| 1690 | pci_root_bus = pcibios_scan_root(0); |
| 1691 | - if (pci_root_bus) |
| 1692 | - pci_bus_add_devices(pci_root_bus); |
| 1693 | if (num_online_nodes() > 1) |
| 1694 | for_each_online_node(quad) { |
| 1695 | if (quad == 0) |
| 1696 | --- a/arch/xtensa/kernel/pci.c |
| 1697 | +++ b/arch/xtensa/kernel/pci.c |
| 1698 | @@ -134,9 +134,46 @@ struct pci_controller * __init pcibios_a |
| 1699 | return pci_ctrl; |
| 1700 | } |
| 1701 | |
| 1702 | +static void __init pci_controller_apertures(struct pci_controller *pci_ctrl, |
| 1703 | + struct list_head *resources) |
| 1704 | +{ |
| 1705 | + struct resource *res; |
| 1706 | + unsigned long io_offset; |
| 1707 | + int i; |
| 1708 | + |
| 1709 | + io_offset = (unsigned long)pci_ctrl->io_space.base; |
| 1710 | + res = &pci_ctrl->io_resource; |
| 1711 | + if (!res->flags) { |
| 1712 | + if (io_offset) |
| 1713 | + printk (KERN_ERR "I/O resource not set for host" |
| 1714 | + " bridge %d\n", pci_ctrl->index); |
| 1715 | + res->start = 0; |
| 1716 | + res->end = IO_SPACE_LIMIT; |
| 1717 | + res->flags = IORESOURCE_IO; |
| 1718 | + } |
| 1719 | + res->start += io_offset; |
| 1720 | + res->end += io_offset; |
| 1721 | + pci_add_resource(resources, res); |
| 1722 | + |
| 1723 | + for (i = 0; i < 3; i++) { |
| 1724 | + res = &pci_ctrl->mem_resources[i]; |
| 1725 | + if (!res->flags) { |
| 1726 | + if (i > 0) |
| 1727 | + continue; |
| 1728 | + printk(KERN_ERR "Memory resource not set for " |
| 1729 | + "host bridge %d\n", pci_ctrl->index); |
| 1730 | + res->start = 0; |
| 1731 | + res->end = ~0U; |
| 1732 | + res->flags = IORESOURCE_MEM; |
| 1733 | + } |
| 1734 | + pci_add_resource(resources, res); |
| 1735 | + } |
| 1736 | +} |
| 1737 | + |
| 1738 | static int __init pcibios_init(void) |
| 1739 | { |
| 1740 | struct pci_controller *pci_ctrl; |
| 1741 | + struct list_head resources; |
| 1742 | struct pci_bus *bus; |
| 1743 | int next_busno = 0, i; |
| 1744 | |
| 1745 | @@ -145,19 +182,10 @@ static int __init pcibios_init(void) |
| 1746 | /* Scan all of the recorded PCI controllers. */ |
| 1747 | for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) { |
| 1748 | pci_ctrl->last_busno = 0xff; |
| 1749 | - bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops, |
| 1750 | - pci_ctrl); |
| 1751 | - if (pci_ctrl->io_resource.flags) { |
| 1752 | - unsigned long offs; |
| 1753 | - |
| 1754 | - offs = (unsigned long)pci_ctrl->io_space.base; |
| 1755 | - pci_ctrl->io_resource.start += offs; |
| 1756 | - pci_ctrl->io_resource.end += offs; |
| 1757 | - bus->resource[0] = &pci_ctrl->io_resource; |
| 1758 | - } |
| 1759 | - for (i = 0; i < 3; ++i) |
| 1760 | - if (pci_ctrl->mem_resources[i].flags) |
| 1761 | - bus->resource[i+1] =&pci_ctrl->mem_resources[i]; |
| 1762 | + INIT_LIST_HEAD(&resources); |
| 1763 | + pci_controller_apertures(pci_ctrl, &resources); |
| 1764 | + bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno, |
| 1765 | + pci_ctrl->ops, pci_ctrl, &resources); |
| 1766 | pci_ctrl->bus = bus; |
| 1767 | pci_ctrl->last_busno = bus->subordinate; |
| 1768 | if (next_busno <= pci_ctrl->last_busno) |
| 1769 | @@ -178,36 +206,7 @@ void __init pcibios_fixup_bus(struct pci |
| 1770 | int i; |
| 1771 | |
| 1772 | io_offset = (unsigned long)pci_ctrl->io_space.base; |
| 1773 | - if (bus->parent == NULL) { |
| 1774 | - /* this is a host bridge - fill in its resources */ |
| 1775 | - pci_ctrl->bus = bus; |
| 1776 | - |
| 1777 | - bus->resource[0] = res = &pci_ctrl->io_resource; |
| 1778 | - if (!res->flags) { |
| 1779 | - if (io_offset) |
| 1780 | - printk (KERN_ERR "I/O resource not set for host" |
| 1781 | - " bridge %d\n", pci_ctrl->index); |
| 1782 | - res->start = 0; |
| 1783 | - res->end = IO_SPACE_LIMIT; |
| 1784 | - res->flags = IORESOURCE_IO; |
| 1785 | - } |
| 1786 | - res->start += io_offset; |
| 1787 | - res->end += io_offset; |
| 1788 | - |
| 1789 | - for (i = 0; i < 3; i++) { |
| 1790 | - res = &pci_ctrl->mem_resources[i]; |
| 1791 | - if (!res->flags) { |
| 1792 | - if (i > 0) |
| 1793 | - continue; |
| 1794 | - printk(KERN_ERR "Memory resource not set for " |
| 1795 | - "host bridge %d\n", pci_ctrl->index); |
| 1796 | - res->start = 0; |
| 1797 | - res->end = ~0U; |
| 1798 | - res->flags = IORESOURCE_MEM; |
| 1799 | - } |
| 1800 | - bus->resource[i+1] = res; |
| 1801 | - } |
| 1802 | - } else { |
| 1803 | + if (bus->parent) { |
| 1804 | /* This is a subordinate bridge */ |
| 1805 | pci_read_bridge_bases(bus); |
| 1806 | |
| 1807 | --- a/drivers/parisc/dino.c |
| 1808 | +++ b/drivers/parisc/dino.c |
| 1809 | @@ -562,19 +562,6 @@ dino_fixup_bus(struct pci_bus *bus) |
| 1810 | /* Firmware doesn't set up card-mode dino, so we have to */ |
| 1811 | if (is_card_dino(&dino_dev->hba.dev->id)) { |
| 1812 | dino_card_setup(bus, dino_dev->hba.base_addr); |
| 1813 | - } else if(bus->parent == NULL) { |
| 1814 | - /* must have a dino above it, reparent the resources |
| 1815 | - * into the dino window */ |
| 1816 | - int i; |
| 1817 | - struct resource *res = &dino_dev->hba.lmmio_space; |
| 1818 | - |
| 1819 | - bus->resource[0] = &(dino_dev->hba.io_space); |
| 1820 | - for(i = 0; i < DINO_MAX_LMMIO_RESOURCES; i++) { |
| 1821 | - if(res[i].flags == 0) |
| 1822 | - break; |
| 1823 | - bus->resource[i+1] = &res[i]; |
| 1824 | - } |
| 1825 | - |
| 1826 | } else if (bus->parent) { |
| 1827 | int i; |
| 1828 | |
| 1829 | @@ -927,6 +914,7 @@ static int __init dino_probe(struct pari |
| 1830 | const char *version = "unknown"; |
| 1831 | char *name; |
| 1832 | int is_cujo = 0; |
| 1833 | + LIST_HEAD(resources); |
| 1834 | struct pci_bus *bus; |
| 1835 | unsigned long hpa = dev->hpa.start; |
| 1836 | |
| 1837 | @@ -1003,26 +991,37 @@ static int __init dino_probe(struct pari |
| 1838 | |
| 1839 | dev->dev.platform_data = dino_dev; |
| 1840 | |
| 1841 | + pci_add_resource(&resources, &dino_dev->hba.io_space); |
| 1842 | + if (dino_dev->hba.lmmio_space.flags) |
| 1843 | + pci_add_resource(&resources, &dino_dev->hba.lmmio_space); |
| 1844 | + if (dino_dev->hba.elmmio_space.flags) |
| 1845 | + pci_add_resource(&resources, &dino_dev->hba.elmmio_space); |
| 1846 | + if (dino_dev->hba.gmmio_space.flags) |
| 1847 | + pci_add_resource(&resources, &dino_dev->hba.gmmio_space); |
| 1848 | + |
| 1849 | /* |
| 1850 | ** It's not used to avoid chicken/egg problems |
| 1851 | ** with configuration accessor functions. |
| 1852 | */ |
| 1853 | - dino_dev->hba.hba_bus = bus = pci_scan_bus_parented(&dev->dev, |
| 1854 | - dino_current_bus, &dino_cfg_ops, NULL); |
| 1855 | - |
| 1856 | - if(bus) { |
| 1857 | - /* This code *depends* on scanning being single threaded |
| 1858 | - * if it isn't, this global bus number count will fail |
| 1859 | - */ |
| 1860 | - dino_current_bus = bus->subordinate + 1; |
| 1861 | - pci_bus_assign_resources(bus); |
| 1862 | - pci_bus_add_devices(bus); |
| 1863 | - } else { |
| 1864 | + dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev, |
| 1865 | + dino_current_bus, &dino_cfg_ops, NULL, &resources); |
| 1866 | + if (!bus) { |
| 1867 | printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n", |
| 1868 | dev_name(&dev->dev), dino_current_bus); |
| 1869 | + pci_free_resource_list(&resources); |
| 1870 | /* increment the bus number in case of duplicates */ |
| 1871 | dino_current_bus++; |
| 1872 | + return 0; |
| 1873 | } |
| 1874 | + |
| 1875 | + bus->subordinate = pci_scan_child_bus(bus); |
| 1876 | + |
| 1877 | + /* This code *depends* on scanning being single threaded |
| 1878 | + * if it isn't, this global bus number count will fail |
| 1879 | + */ |
| 1880 | + dino_current_bus = bus->subordinate + 1; |
| 1881 | + pci_bus_assign_resources(bus); |
| 1882 | + pci_bus_add_devices(bus); |
| 1883 | return 0; |
| 1884 | } |
| 1885 | |
| 1886 | --- a/drivers/parisc/lba_pci.c |
| 1887 | +++ b/drivers/parisc/lba_pci.c |
| 1888 | @@ -653,7 +653,7 @@ lba_fixup_bus(struct pci_bus *bus) |
| 1889 | } |
| 1890 | } else { |
| 1891 | /* Host-PCI Bridge */ |
| 1892 | - int err, i; |
| 1893 | + int err; |
| 1894 | |
| 1895 | DBG("lba_fixup_bus() %s [%lx/%lx]/%lx\n", |
| 1896 | ldev->hba.io_space.name, |
| 1897 | @@ -669,9 +669,6 @@ lba_fixup_bus(struct pci_bus *bus) |
| 1898 | lba_dump_res(&ioport_resource, 2); |
| 1899 | BUG(); |
| 1900 | } |
| 1901 | - /* advertize Host bridge resources to PCI bus */ |
| 1902 | - bus->resource[0] = &(ldev->hba.io_space); |
| 1903 | - i = 1; |
| 1904 | |
| 1905 | if (ldev->hba.elmmio_space.start) { |
| 1906 | err = request_resource(&iomem_resource, |
| 1907 | @@ -685,35 +682,17 @@ lba_fixup_bus(struct pci_bus *bus) |
| 1908 | |
| 1909 | /* lba_dump_res(&iomem_resource, 2); */ |
| 1910 | /* BUG(); */ |
| 1911 | - } else |
| 1912 | - bus->resource[i++] = &(ldev->hba.elmmio_space); |
| 1913 | + } |
| 1914 | } |
| 1915 | |
| 1916 | - |
| 1917 | - /* Overlaps with elmmio can (and should) fail here. |
| 1918 | - * We will prune (or ignore) the distributed range. |
| 1919 | - * |
| 1920 | - * FIXME: SBA code should register all elmmio ranges first. |
| 1921 | - * that would take care of elmmio ranges routed |
| 1922 | - * to a different rope (already discovered) from |
| 1923 | - * getting registered *after* LBA code has already |
| 1924 | - * registered it's distributed lmmio range. |
| 1925 | - */ |
| 1926 | - if (truncate_pat_collision(&iomem_resource, |
| 1927 | - &(ldev->hba.lmmio_space))) { |
| 1928 | - |
| 1929 | - printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n", |
| 1930 | - (long)ldev->hba.lmmio_space.start, |
| 1931 | - (long)ldev->hba.lmmio_space.end); |
| 1932 | - } else { |
| 1933 | + if (ldev->hba.lmmio_space.flags) { |
| 1934 | err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space)); |
| 1935 | if (err < 0) { |
| 1936 | printk(KERN_ERR "FAILED: lba_fixup_bus() request for " |
| 1937 | "lmmio_space [%lx/%lx]\n", |
| 1938 | (long)ldev->hba.lmmio_space.start, |
| 1939 | (long)ldev->hba.lmmio_space.end); |
| 1940 | - } else |
| 1941 | - bus->resource[i++] = &(ldev->hba.lmmio_space); |
| 1942 | + } |
| 1943 | } |
| 1944 | |
| 1945 | #ifdef CONFIG_64BIT |
| 1946 | @@ -728,7 +707,6 @@ lba_fixup_bus(struct pci_bus *bus) |
| 1947 | lba_dump_res(&iomem_resource, 2); |
| 1948 | BUG(); |
| 1949 | } |
| 1950 | - bus->resource[i++] = &(ldev->hba.gmmio_space); |
| 1951 | } |
| 1952 | #endif |
| 1953 | |
| 1954 | @@ -1404,6 +1382,7 @@ static int __init |
| 1955 | lba_driver_probe(struct parisc_device *dev) |
| 1956 | { |
| 1957 | struct lba_device *lba_dev; |
| 1958 | + LIST_HEAD(resources); |
| 1959 | struct pci_bus *lba_bus; |
| 1960 | struct pci_ops *cfg_ops; |
| 1961 | u32 func_class; |
| 1962 | @@ -1518,10 +1497,41 @@ lba_driver_probe(struct parisc_device *d |
| 1963 | if (lba_dev->hba.bus_num.start < lba_next_bus) |
| 1964 | lba_dev->hba.bus_num.start = lba_next_bus; |
| 1965 | |
| 1966 | + /* Overlaps with elmmio can (and should) fail here. |
| 1967 | + * We will prune (or ignore) the distributed range. |
| 1968 | + * |
| 1969 | + * FIXME: SBA code should register all elmmio ranges first. |
| 1970 | + * that would take care of elmmio ranges routed |
| 1971 | + * to a different rope (already discovered) from |
| 1972 | + * getting registered *after* LBA code has already |
| 1973 | + * registered it's distributed lmmio range. |
| 1974 | + */ |
| 1975 | + if (truncate_pat_collision(&iomem_resource, |
| 1976 | + &(lba_dev->hba.lmmio_space))) { |
| 1977 | + printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n", |
| 1978 | + (long)lba_dev->hba.lmmio_space.start, |
| 1979 | + (long)lba_dev->hba.lmmio_space.end); |
| 1980 | + lba_dev->hba.lmmio_space.flags = 0; |
| 1981 | + } |
| 1982 | + |
| 1983 | + pci_add_resource(&resources, &lba_dev->hba.io_space); |
| 1984 | + if (lba_dev->hba.elmmio_space.start) |
| 1985 | + pci_add_resource(&resources, &lba_dev->hba.elmmio_space); |
| 1986 | + if (lba_dev->hba.lmmio_space.flags) |
| 1987 | + pci_add_resource(&resources, &lba_dev->hba.lmmio_space); |
| 1988 | + if (lba_dev->hba.gmmio_space.flags) |
| 1989 | + pci_add_resource(&resources, &lba_dev->hba.gmmio_space); |
| 1990 | + |
| 1991 | dev->dev.platform_data = lba_dev; |
| 1992 | lba_bus = lba_dev->hba.hba_bus = |
| 1993 | - pci_scan_bus_parented(&dev->dev, lba_dev->hba.bus_num.start, |
| 1994 | - cfg_ops, NULL); |
| 1995 | + pci_create_root_bus(&dev->dev, lba_dev->hba.bus_num.start, |
| 1996 | + cfg_ops, NULL, &resources); |
| 1997 | + if (!lba_bus) { |
| 1998 | + pci_free_resource_list(&resources); |
| 1999 | + return 0; |
| 2000 | + } |
| 2001 | + |
| 2002 | + lba_bus->subordinate = pci_scan_child_bus(lba_bus); |
| 2003 | |
| 2004 | /* This is in lieu of calling pci_assign_unassigned_resources() */ |
| 2005 | if (is_pdc_pat()) { |
| 2006 | @@ -1551,10 +1561,8 @@ lba_driver_probe(struct parisc_device *d |
| 2007 | lba_dev->flags |= LBA_FLAG_SKIP_PROBE; |
| 2008 | } |
| 2009 | |
| 2010 | - if (lba_bus) { |
| 2011 | - lba_next_bus = lba_bus->subordinate + 1; |
| 2012 | - pci_bus_add_devices(lba_bus); |
| 2013 | - } |
| 2014 | + lba_next_bus = lba_bus->subordinate + 1; |
| 2015 | + pci_bus_add_devices(lba_bus); |
| 2016 | |
| 2017 | /* Whew! Finally done! Tell services we got this one covered. */ |
| 2018 | return 0; |
| 2019 | --- a/drivers/pci/bus.c |
| 2020 | +++ b/drivers/pci/bus.c |
| 2021 | @@ -18,6 +18,32 @@ |
| 2022 | |
| 2023 | #include "pci.h" |
| 2024 | |
| 2025 | +void pci_add_resource(struct list_head *resources, struct resource *res) |
| 2026 | +{ |
| 2027 | + struct pci_bus_resource *bus_res; |
| 2028 | + |
| 2029 | + bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL); |
| 2030 | + if (!bus_res) { |
| 2031 | + printk(KERN_ERR "PCI: can't add bus resource %pR\n", res); |
| 2032 | + return; |
| 2033 | + } |
| 2034 | + |
| 2035 | + bus_res->res = res; |
| 2036 | + list_add_tail(&bus_res->list, resources); |
| 2037 | +} |
| 2038 | +EXPORT_SYMBOL(pci_add_resource); |
| 2039 | + |
| 2040 | +void pci_free_resource_list(struct list_head *resources) |
| 2041 | +{ |
| 2042 | + struct pci_bus_resource *bus_res, *tmp; |
| 2043 | + |
| 2044 | + list_for_each_entry_safe(bus_res, tmp, resources, list) { |
| 2045 | + list_del(&bus_res->list); |
| 2046 | + kfree(bus_res); |
| 2047 | + } |
| 2048 | +} |
| 2049 | +EXPORT_SYMBOL(pci_free_resource_list); |
| 2050 | + |
| 2051 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, |
| 2052 | unsigned int flags) |
| 2053 | { |
| 2054 | @@ -52,16 +78,12 @@ EXPORT_SYMBOL_GPL(pci_bus_resource_n); |
| 2055 | |
| 2056 | void pci_bus_remove_resources(struct pci_bus *bus) |
| 2057 | { |
| 2058 | - struct pci_bus_resource *bus_res, *tmp; |
| 2059 | int i; |
| 2060 | |
| 2061 | for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) |
| 2062 | bus->resource[i] = NULL; |
| 2063 | |
| 2064 | - list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { |
| 2065 | - list_del(&bus_res->list); |
| 2066 | - kfree(bus_res); |
| 2067 | - } |
| 2068 | + pci_free_resource_list(&bus->resources); |
| 2069 | } |
| 2070 | |
| 2071 | /** |
| 2072 | --- a/drivers/pci/probe.c |
| 2073 | +++ b/drivers/pci/probe.c |
| 2074 | @@ -1527,12 +1527,14 @@ unsigned int __devinit pci_scan_child_bu |
| 2075 | return max; |
| 2076 | } |
| 2077 | |
| 2078 | -struct pci_bus * pci_create_bus(struct device *parent, |
| 2079 | - int bus, struct pci_ops *ops, void *sysdata) |
| 2080 | +struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
| 2081 | + struct pci_ops *ops, void *sysdata, struct list_head *resources) |
| 2082 | { |
| 2083 | - int error; |
| 2084 | + int error, i; |
| 2085 | struct pci_bus *b, *b2; |
| 2086 | struct device *dev; |
| 2087 | + struct pci_bus_resource *bus_res, *n; |
| 2088 | + struct resource *res; |
| 2089 | |
| 2090 | b = pci_alloc_bus(); |
| 2091 | if (!b) |
| 2092 | @@ -1582,8 +1584,20 @@ struct pci_bus * pci_create_bus(struct d |
| 2093 | pci_create_legacy_files(b); |
| 2094 | |
| 2095 | b->number = b->secondary = bus; |
| 2096 | - b->resource[0] = &ioport_resource; |
| 2097 | - b->resource[1] = &iomem_resource; |
| 2098 | + |
| 2099 | + /* Add initial resources to the bus */ |
| 2100 | + list_for_each_entry_safe(bus_res, n, resources, list) |
| 2101 | + list_move_tail(&bus_res->list, &b->resources); |
| 2102 | + |
| 2103 | + if (parent) |
| 2104 | + dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&b->dev)); |
| 2105 | + else |
| 2106 | + printk(KERN_INFO "PCI host bridge to bus %s\n", dev_name(&b->dev)); |
| 2107 | + |
| 2108 | + pci_bus_for_each_resource(b, res, i) { |
| 2109 | + if (res) |
| 2110 | + dev_info(&b->dev, "root bus resource %pR\n", res); |
| 2111 | + } |
| 2112 | |
| 2113 | return b; |
| 2114 | |
| 2115 | @@ -1599,18 +1613,58 @@ err_out: |
| 2116 | return NULL; |
| 2117 | } |
| 2118 | |
| 2119 | +struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus, |
| 2120 | + struct pci_ops *ops, void *sysdata, struct list_head *resources) |
| 2121 | +{ |
| 2122 | + struct pci_bus *b; |
| 2123 | + |
| 2124 | + b = pci_create_root_bus(parent, bus, ops, sysdata, resources); |
| 2125 | + if (!b) |
| 2126 | + return NULL; |
| 2127 | + |
| 2128 | + b->subordinate = pci_scan_child_bus(b); |
| 2129 | + pci_bus_add_devices(b); |
| 2130 | + return b; |
| 2131 | +} |
| 2132 | +EXPORT_SYMBOL(pci_scan_root_bus); |
| 2133 | + |
| 2134 | +/* Deprecated; use pci_scan_root_bus() instead */ |
| 2135 | struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent, |
| 2136 | int bus, struct pci_ops *ops, void *sysdata) |
| 2137 | { |
| 2138 | + LIST_HEAD(resources); |
| 2139 | struct pci_bus *b; |
| 2140 | |
| 2141 | - b = pci_create_bus(parent, bus, ops, sysdata); |
| 2142 | + pci_add_resource(&resources, &ioport_resource); |
| 2143 | + pci_add_resource(&resources, &iomem_resource); |
| 2144 | + b = pci_create_root_bus(parent, bus, ops, sysdata, &resources); |
| 2145 | if (b) |
| 2146 | b->subordinate = pci_scan_child_bus(b); |
| 2147 | + else |
| 2148 | + pci_free_resource_list(&resources); |
| 2149 | return b; |
| 2150 | } |
| 2151 | EXPORT_SYMBOL(pci_scan_bus_parented); |
| 2152 | |
| 2153 | +struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, |
| 2154 | + void *sysdata) |
| 2155 | +{ |
| 2156 | + LIST_HEAD(resources); |
| 2157 | + struct pci_bus *b; |
| 2158 | + |
| 2159 | + pci_add_resource(&resources, &ioport_resource); |
| 2160 | + pci_add_resource(&resources, &iomem_resource); |
| 2161 | + b = pci_create_root_bus(NULL, bus, ops, sysdata, &resources); |
| 2162 | + if (b) { |
| 2163 | + b->subordinate = pci_scan_child_bus(b); |
| 2164 | + pci_bus_add_devices(b); |
| 2165 | + } else { |
| 2166 | + pci_free_resource_list(&resources); |
| 2167 | + } |
| 2168 | + return b; |
| 2169 | +} |
| 2170 | +EXPORT_SYMBOL(pci_scan_bus); |
| 2171 | + |
| 2172 | #ifdef CONFIG_HOTPLUG |
| 2173 | /** |
| 2174 | * pci_rescan_bus - scan a PCI bus for devices. |
| 2175 | --- a/include/linux/pci.h |
| 2176 | +++ b/include/linux/pci.h |
| 2177 | @@ -660,17 +660,13 @@ extern struct pci_bus *pci_find_bus(int |
| 2178 | void pci_bus_add_devices(const struct pci_bus *bus); |
| 2179 | struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, |
| 2180 | struct pci_ops *ops, void *sysdata); |
| 2181 | -static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, |
| 2182 | - void *sysdata) |
| 2183 | -{ |
| 2184 | - struct pci_bus *root_bus; |
| 2185 | - root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); |
| 2186 | - if (root_bus) |
| 2187 | - pci_bus_add_devices(root_bus); |
| 2188 | - return root_bus; |
| 2189 | -} |
| 2190 | -struct pci_bus *pci_create_bus(struct device *parent, int bus, |
| 2191 | - struct pci_ops *ops, void *sysdata); |
| 2192 | +struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); |
| 2193 | +struct pci_bus *pci_create_root_bus(struct device *parent, int bus, |
| 2194 | + struct pci_ops *ops, void *sysdata, |
| 2195 | + struct list_head *resources); |
| 2196 | +struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus, |
| 2197 | + struct pci_ops *ops, void *sysdata, |
| 2198 | + struct list_head *resources); |
| 2199 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, |
| 2200 | int busnr); |
| 2201 | void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); |
| 2202 | @@ -910,6 +906,8 @@ int pci_request_selected_regions_exclusi |
| 2203 | void pci_release_selected_regions(struct pci_dev *, int); |
| 2204 | |
| 2205 | /* drivers/pci/bus.c */ |
| 2206 | +void pci_add_resource(struct list_head *resources, struct resource *res); |
| 2207 | +void pci_free_resource_list(struct list_head *resources); |
| 2208 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); |
| 2209 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); |
| 2210 | void pci_bus_remove_resources(struct pci_bus *bus); |
| 2211 | |
