Root/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c

1/*
2 * MikroTik RouterBOARD 2011 support
3 *
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12#define pr_fmt(fmt) "rb2011: " fmt
13
14#include <linux/phy.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/ath9k_platform.h>
18#include <linux/ar8216_platform.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/flash.h>
24#include <linux/rle.h>
25#include <linux/routerboot.h>
26#include <linux/gpio.h>
27
28#include <asm/mach-ath79/ath79.h>
29#include <asm/mach-ath79/ar71xx_regs.h>
30
31#include "common.h"
32#include "dev-eth.h"
33#include "dev-m25p80.h"
34#include "dev-nfc.h"
35#include "dev-wmac.h"
36#include "machtypes.h"
37#include "routerboot.h"
38
39#define RB2011_GPIO_NAND_NCE 14
40
41#define RB_ROUTERBOOT_OFFSET 0x0000
42#define RB_ROUTERBOOT_SIZE 0xb000
43#define RB_HARD_CFG_OFFSET 0xb000
44#define RB_HARD_CFG_SIZE 0x1000
45#define RB_BIOS_OFFSET 0xd000
46#define RB_BIOS_SIZE 0x2000
47#define RB_SOFT_CFG_OFFSET 0xf000
48#define RB_SOFT_CFG_SIZE 0x1000
49
50#define RB_ART_SIZE 0x10000
51
52static struct mtd_partition rb2011_spi_partitions[] = {
53    {
54        .name = "routerboot",
55        .offset = RB_ROUTERBOOT_OFFSET,
56        .size = RB_ROUTERBOOT_SIZE,
57        .mask_flags = MTD_WRITEABLE,
58    }, {
59        .name = "hard_config",
60        .offset = RB_HARD_CFG_OFFSET,
61        .size = RB_HARD_CFG_SIZE,
62        .mask_flags = MTD_WRITEABLE,
63    }, {
64        .name = "bios",
65        .offset = RB_BIOS_OFFSET,
66        .size = RB_BIOS_SIZE,
67        .mask_flags = MTD_WRITEABLE,
68    }, {
69        .name = "soft_config",
70        .offset = RB_SOFT_CFG_OFFSET,
71        .size = RB_SOFT_CFG_SIZE,
72    }
73};
74
75static struct mtd_partition rb2011_nand_partitions[] = {
76    {
77        .name = "booter",
78        .offset = 0,
79        .size = (256 * 1024),
80        .mask_flags = MTD_WRITEABLE,
81    },
82    {
83        .name = "kernel",
84        .offset = (256 * 1024),
85        .size = (4 * 1024 * 1024) - (256 * 1024),
86    },
87    {
88        .name = "rootfs",
89        .offset = MTDPART_OFS_NXTBLK,
90        .size = MTDPART_SIZ_FULL,
91    },
92};
93
94static struct flash_platform_data rb2011_spi_flash_data = {
95    .parts = rb2011_spi_partitions,
96    .nr_parts = ARRAY_SIZE(rb2011_spi_partitions),
97};
98
99static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = {
100    .mode = AR8327_PAD_MAC_RGMII,
101    .txclk_delay_en = true,
102    .rxclk_delay_en = true,
103    .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
104    .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
105};
106
107static struct ar8327_platform_data rb2011_ar8327_data = {
108    .pad0_cfg = &rb2011_ar8327_pad0_cfg,
109    .cpuport_cfg = {
110        .force_link = 1,
111        .speed = AR8327_PORT_SPEED_1000,
112        .duplex = 1,
113        .txpause = 1,
114        .rxpause = 1,
115    }
116};
117
118static struct mdio_board_info rb2011_mdio0_info[] = {
119    {
120        .bus_id = "ag71xx-mdio.0",
121        .phy_addr = 0,
122        .platform_data = &rb2011_ar8327_data,
123    },
124};
125
126static void __init rb2011_gmac_setup(void)
127{
128    void __iomem *base;
129    u32 t;
130
131    base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
132
133    t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
134    t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
135        AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
136    t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
137
138    __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
139
140    iounmap(base);
141}
142
143static void __init rb2011_wlan_init(void)
144{
145    u8 *hard_cfg = (u8 *) KSEG1ADDR(0x1f000000 + RB_HARD_CFG_OFFSET);
146    u16 tag_len;
147    u8 *tag;
148    char *art_buf;
149    u8 wlan_mac[ETH_ALEN];
150    int err;
151
152    err = routerboot_find_tag(hard_cfg, RB_HARD_CFG_SIZE, RB_ID_WLAN_DATA,
153                  &tag, &tag_len);
154    if (err) {
155        pr_err("no calibration data found\n");
156        return;
157    }
158
159    art_buf = kmalloc(RB_ART_SIZE, GFP_KERNEL);
160    if (art_buf == NULL) {
161        pr_err("no memory for calibration data\n");
162        return;
163    }
164
165    err = rle_decode((char *) tag, tag_len, art_buf, RB_ART_SIZE,
166             NULL, NULL);
167    if (err) {
168        pr_err("unable to decode calibration data\n");
169        goto free;
170    }
171
172    ath79_init_mac(wlan_mac, ath79_mac_base, 11);
173    ath79_register_wmac(art_buf + 0x1000, wlan_mac);
174
175free:
176    kfree(art_buf);
177}
178
179static void rb2011_nand_select_chip(int chip_no)
180{
181    switch (chip_no) {
182    case 0:
183        gpio_set_value(RB2011_GPIO_NAND_NCE, 0);
184        break;
185    default:
186        gpio_set_value(RB2011_GPIO_NAND_NCE, 1);
187        break;
188    }
189    ndelay(500);
190}
191
192static struct nand_ecclayout rb2011_nand_ecclayout = {
193    .eccbytes = 6,
194    .eccpos = { 8, 9, 10, 13, 14, 15 },
195    .oobavail = 9,
196    .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
197};
198
199static int rb2011_nand_scan_fixup(struct mtd_info *mtd)
200{
201    struct nand_chip *chip = mtd->priv;
202
203    if (mtd->writesize == 512) {
204        /*
205         * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
206         * will not be able to find the kernel that we load.
207         */
208        chip->ecc.layout = &rb2011_nand_ecclayout;
209    }
210
211    return 0;
212}
213
214static void __init rb2011_nand_init(void)
215{
216    ath79_nfc_set_scan_fixup(rb2011_nand_scan_fixup);
217    ath79_nfc_set_parts(rb2011_nand_partitions,
218                ARRAY_SIZE(rb2011_nand_partitions));
219    ath79_nfc_set_select_chip(rb2011_nand_select_chip);
220    ath79_register_nfc();
221}
222
223static void __init rb2011_gpio_init(void)
224{
225    gpio_request_one(RB2011_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
226}
227
228static void __init rb2011_setup(void)
229{
230    rb2011_gpio_init();
231
232    ath79_register_m25p80(&rb2011_spi_flash_data);
233    rb2011_nand_init();
234
235    rb2011_gmac_setup();
236
237    ath79_register_mdio(1, 0x0);
238    ath79_register_mdio(0, 0x0);
239
240    mdiobus_register_board_info(rb2011_mdio0_info,
241                    ARRAY_SIZE(rb2011_mdio0_info));
242
243    /* GMAC0 is connected to an ar8327 switch */
244    ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
245    ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
246    ath79_eth0_data.phy_mask = BIT(0);
247    ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
248    ath79_eth0_pll_data.pll_1000 = 0x06000000;
249
250    ath79_register_eth(0);
251
252    /* GMAC1 is connected to the internal switch */
253    ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5);
254    ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
255    ath79_eth1_data.speed = SPEED_1000;
256    ath79_eth1_data.duplex = DUPLEX_FULL;
257
258    ath79_register_eth(1);
259}
260
261MIPS_MACHINE(ATH79_MACH_RB_2011L, "2011L", "MikroTik RouterBOARD 2011L",
262         rb2011_setup);
263
264static void __init rb2011g_setup(void)
265{
266    rb2011_setup();
267    rb2011_wlan_init();
268}
269
270MIPS_MACHINE(ATH79_MACH_RB_2011G, "2011G", "MikroTik RouterBOARD 2011UAS-2HnD",
271         rb2011g_setup);
272

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