Root/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch

1From 4921cb7d9f6997b6f7aefd37c7cfd50324e8fd75 Mon Sep 17 00:00:00 2001
2From: Gabor Juhos <juhosg@openwrt.org>
3Date: Wed, 14 Mar 2012 20:39:35 +0100
4Subject: [PATCH 36/47] MIPS: ath79: add initial support for the Atheros DB120 board
5
6Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
8Cc: linux-mips@linux-mips.org
9Cc: mcgrof@infradead.org
10Patchwork: https://patchwork.linux-mips.org/patch/3517/
11Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
12---
13 arch/mips/ath79/Kconfig | 12 ++++
14 arch/mips/ath79/Makefile | 1 +
15 arch/mips/ath79/mach-db120.c | 134 ++++++++++++++++++++++++++++++++++++++++++
16 arch/mips/ath79/machtypes.h | 1 +
17 4 files changed, 148 insertions(+), 0 deletions(-)
18 create mode 100644 arch/mips/ath79/mach-db120.c
19
20--- a/arch/mips/ath79/Kconfig
21+++ b/arch/mips/ath79/Kconfig
22@@ -26,6 +26,18 @@ config ATH79_MACH_AP81
23       Say 'Y' here if you want your kernel to support the
24       Atheros AP81 reference board.
25 
26+config ATH79_MACH_DB120
27+ bool "Atheros DB120 reference board"
28+ select SOC_AR934X
29+ select ATH79_DEV_GPIO_BUTTONS
30+ select ATH79_DEV_LEDS_GPIO
31+ select ATH79_DEV_SPI
32+ select ATH79_DEV_USB
33+ select ATH79_DEV_WMAC
34+ help
35+ Say 'Y' here if you want your kernel to support the
36+ Atheros DB120 reference board.
37+
38 config ATH79_MACH_PB44
39     bool "Atheros PB44 reference board"
40     select SOC_AR71XX
41--- a/arch/mips/ath79/Makefile
42+++ b/arch/mips/ath79/Makefile
43@@ -28,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma
44 #
45 obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
46 obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
47+obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
48 obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
49 obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
50--- /dev/null
51+++ b/arch/mips/ath79/mach-db120.c
52@@ -0,0 +1,134 @@
53+/*
54+ * Atheros DB120 reference board support
55+ *
56+ * Copyright (c) 2011 Qualcomm Atheros
57+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
58+ *
59+ * Permission to use, copy, modify, and/or distribute this software for any
60+ * purpose with or without fee is hereby granted, provided that the above
61+ * copyright notice and this permission notice appear in all copies.
62+ *
63+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
64+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
65+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
66+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
67+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
68+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
69+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
70+ *
71+ */
72+
73+#include <linux/pci.h>
74+#include <linux/ath9k_platform.h>
75+
76+#include "machtypes.h"
77+#include "dev-gpio-buttons.h"
78+#include "dev-leds-gpio.h"
79+#include "dev-spi.h"
80+#include "dev-wmac.h"
81+#include "pci.h"
82+
83+#define DB120_GPIO_LED_WLAN_5G 12
84+#define DB120_GPIO_LED_WLAN_2G 13
85+#define DB120_GPIO_LED_STATUS 14
86+#define DB120_GPIO_LED_WPS 15
87+
88+#define DB120_GPIO_BTN_WPS 16
89+
90+#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
91+#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
92+
93+#define DB120_WMAC_CALDATA_OFFSET 0x1000
94+#define DB120_PCIE_CALDATA_OFFSET 0x5000
95+
96+static struct gpio_led db120_leds_gpio[] __initdata = {
97+ {
98+ .name = "db120:green:status",
99+ .gpio = DB120_GPIO_LED_STATUS,
100+ .active_low = 1,
101+ },
102+ {
103+ .name = "db120:green:wps",
104+ .gpio = DB120_GPIO_LED_WPS,
105+ .active_low = 1,
106+ },
107+ {
108+ .name = "db120:green:wlan-5g",
109+ .gpio = DB120_GPIO_LED_WLAN_5G,
110+ .active_low = 1,
111+ },
112+ {
113+ .name = "db120:green:wlan-2g",
114+ .gpio = DB120_GPIO_LED_WLAN_2G,
115+ .active_low = 1,
116+ },
117+};
118+
119+static struct gpio_keys_button db120_gpio_keys[] __initdata = {
120+ {
121+ .desc = "WPS button",
122+ .type = EV_KEY,
123+ .code = KEY_WPS_BUTTON,
124+ .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
125+ .gpio = DB120_GPIO_BTN_WPS,
126+ .active_low = 1,
127+ },
128+};
129+
130+static struct spi_board_info db120_spi_info[] = {
131+ {
132+ .bus_num = 0,
133+ .chip_select = 0,
134+ .max_speed_hz = 25000000,
135+ .modalias = "s25sl064a",
136+ }
137+};
138+
139+static struct ath79_spi_platform_data db120_spi_data = {
140+ .bus_num = 0,
141+ .num_chipselect = 1,
142+};
143+
144+#ifdef CONFIG_PCI
145+static struct ath9k_platform_data db120_ath9k_data;
146+
147+static int db120_pci_plat_dev_init(struct pci_dev *dev)
148+{
149+ switch (PCI_SLOT(dev->devfn)) {
150+ case 0:
151+ dev->dev.platform_data = &db120_ath9k_data;
152+ break;
153+ }
154+
155+ return 0;
156+}
157+
158+static void __init db120_pci_init(u8 *eeprom)
159+{
160+ memcpy(db120_ath9k_data.eeprom_data, eeprom,
161+ sizeof(db120_ath9k_data.eeprom_data));
162+
163+ ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
164+ ath79_register_pci();
165+}
166+#else
167+static inline void db120_pci_init(void) {}
168+#endif /* CONFIG_PCI */
169+
170+static void __init db120_setup(void)
171+{
172+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
173+
174+ ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
175+ db120_leds_gpio);
176+ ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
177+ ARRAY_SIZE(db120_gpio_keys),
178+ db120_gpio_keys);
179+ ath79_register_spi(&db120_spi_data, db120_spi_info,
180+ ARRAY_SIZE(db120_spi_info));
181+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
182+ db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
183+}
184+
185+MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
186+ db120_setup);
187--- a/arch/mips/ath79/machtypes.h
188+++ b/arch/mips/ath79/machtypes.h
189@@ -18,6 +18,7 @@ enum ath79_mach_type {
190     ATH79_MACH_GENERIC = 0,
191     ATH79_MACH_AP121, /* Atheros AP121 reference board */
192     ATH79_MACH_AP81, /* Atheros AP81 reference board */
193+ ATH79_MACH_DB120, /* Atheros DB120 reference board */
194     ATH79_MACH_PB44, /* Atheros PB44 reference board */
195     ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
196 };
197

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