Root/target/linux/brcm47xx/patches-3.3/030-bcm47xx-bcma-nandflash.patch

1--- a/arch/mips/bcm47xx/Kconfig
2+++ b/arch/mips/bcm47xx/Kconfig
3@@ -25,6 +25,7 @@ config BCM47XX_BCMA
4     select BCMA_HOST_PCI if PCI
5     select BCMA_DRIVER_PCI_HOSTMODE if PCI
6     select BCMA_SFLASH
7+ select BCMA_NFLASH
8     default y
9     help
10      Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.
11--- a/arch/mips/bcm47xx/bus.c
12+++ b/arch/mips/bcm47xx/bus.c
13@@ -2,6 +2,7 @@
14  * BCM947xx nvram variable access
15  *
16  * Copyright (C) 2011 Hauke Mehrtens <hauke@hauke-m.de>
17+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
18  *
19  * This program is free software; you can redistribute it and/or modify it
20  * under the terms of the GNU General Public License as published by the
21@@ -46,6 +47,12 @@ void bcm47xx_sflash_struct_bcma_init(str
22     sflash->numblocks = bcc->sflash.numblocks;
23     sflash->size = bcc->sflash.size;
24 }
25+
26+void bcm47xx_nflash_struct_bcma_init(struct bcm47xx_nflash *nflash, struct bcma_drv_cc *bcc)
27+{
28+ nflash->nflash_type = BCM47XX_BUS_TYPE_BCMA;
29+ nflash->bcc = bcc;
30+}
31 #endif
32 
33 #ifdef CONFIG_BCM47XX_SSB
34--- a/arch/mips/bcm47xx/nvram.c
35+++ b/arch/mips/bcm47xx/nvram.c
36@@ -4,6 +4,7 @@
37  * Copyright (C) 2005 Broadcom Corporation
38  * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
39  * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
40+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
41  *
42  * This program is free software; you can redistribute it and/or modify it
43  * under the terms of the GNU General Public License as published by the
44@@ -21,6 +22,7 @@
45 #include <asm/mach-bcm47xx/nvram.h>
46 #include <asm/mach-bcm47xx/bcm47xx.h>
47 #include <asm/mach-bcm47xx/bus.h>
48+#include <linux/mtd/bcm47xx_nand.h>
49 
50 static char nvram_buf[NVRAM_SPACE];
51 
52@@ -160,6 +162,51 @@ static void early_nvram_init_ssb(void)
53 #endif
54 
55 #ifdef CONFIG_BCM47XX_BCMA
56+static int early_nvram_init_nflash(void)
57+{
58+ struct nvram_header *header;
59+ u32 off;
60+ int ret;
61+ int len;
62+ u32 flash_size = bcm47xx_nflash.size;
63+ u8 tmpbuf[NFL_SECTOR_SIZE];
64+ int i;
65+ u32 *src, *dst;
66+
67+ /* check if the struct is already initilized */
68+ if (!flash_size)
69+ return -1;
70+
71+ cfe_env = 0;
72+
73+ off = FLASH_MIN;
74+ while (off <= flash_size) {
75+ ret = bcma_nflash_read(bcm47xx_nflash.bcc, off, NFL_SECTOR_SIZE, tmpbuf);
76+ if (ret != NFL_SECTOR_SIZE)
77+ goto done;
78+ header = (struct nvram_header *)tmpbuf;
79+ if (header->magic == NVRAM_HEADER)
80+ goto found;
81+ off <<= 1;
82+ }
83+
84+ ret = -1;
85+ goto done;
86+
87+found:
88+ len = header->len;
89+ header = (struct nvram_header *) KSEG1ADDR(NAND_FLASH1 + off);
90+ src = (u32 *) header;
91+ dst = (u32 *) nvram_buf;
92+ for (i = 0; i < sizeof(struct nvram_header); i += 4)
93+ *dst++ = *src++;
94+ for (; i < len && i < NVRAM_SPACE; i += 4)
95+ *dst++ = *src++;
96+ ret = 0;
97+done:
98+ return ret;
99+}
100+
101 static void early_nvram_init_bcma(void)
102 {
103     int err;
104@@ -173,6 +220,11 @@ static void early_nvram_init_bcma(void)
105         if (err < 0)
106             printk(KERN_WARNING "can not read from flash: %i\n", err);
107         break;
108+ case BCMA_NFLASH:
109+ err = early_nvram_init_nflash();
110+ if (err < 0)
111+ printk(KERN_WARNING "can not read from nflash: %i\n", err);
112+ break;
113     default:
114         printk(KERN_WARNING "unknow flash type\n");
115     }
116--- a/arch/mips/bcm47xx/setup.c
117+++ b/arch/mips/bcm47xx/setup.c
118@@ -4,6 +4,7 @@
119  * Copyright (C) 2006 Michael Buesch <m@bues.ch>
120  * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
121  * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
122+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
123  *
124  * This program is free software; you can redistribute it and/or modify it
125  * under the terms of the GNU General Public License as published by the
126@@ -234,6 +235,21 @@ static int bcm47xx_get_sprom_bcma(struct
127     }
128 }
129 
130+struct bcm47xx_nflash bcm47xx_nflash;
131+
132+static struct resource bcm47xx_nflash_resource = {
133+ .name = "bcm47xx_nflash",
134+ .start = 0,
135+ .end = 0,
136+ .flags = 0,
137+};
138+
139+static struct platform_device bcm47xx_nflash_dev = {
140+ .name = "bcm47xx_nflash",
141+ .resource = &bcm47xx_nflash_resource,
142+ .num_resources = 1,
143+};
144+
145 static void __init bcm47xx_register_bcma(void)
146 {
147     int err;
148@@ -248,6 +264,9 @@ static void __init bcm47xx_register_bcma
149 
150     if (bcm47xx_bus.bcma.bus.drv_cc.flash_type == BCMA_SFLASH)
151         bcm47xx_sflash_struct_bcma_init(&bcm47xx_sflash, &bcm47xx_bus.bcma.bus.drv_cc);
152+
153+ if (bcm47xx_bus.bcma.bus.drv_cc.flash_type == BCMA_NFLASH)
154+ bcm47xx_nflash_struct_bcma_init(&bcm47xx_nflash, &bcm47xx_bus.bcma.bus.drv_cc);
155 
156     bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
157 }
158@@ -264,6 +283,9 @@ static int __init bcm47xx_register_flash
159     case BCMA_SFLASH:
160         bcm47xx_sflash_dev.dev.platform_data = &bcm47xx_sflash;
161         return platform_device_register(&bcm47xx_sflash_dev);
162+ case BCMA_NFLASH:
163+ bcm47xx_nflash_dev.dev.platform_data = &bcm47xx_nflash;
164+ return platform_device_register(&bcm47xx_nflash_dev);
165     default:
166         printk(KERN_ERR "No flash device found\n");
167         return -1;
168--- a/arch/mips/include/asm/mach-bcm47xx/bus.h
169+++ b/arch/mips/include/asm/mach-bcm47xx/bus.h
170@@ -2,6 +2,7 @@
171  * BCM947xx nvram variable access
172  *
173  * Copyright (C) 2011 Hauke Mehrtens <hauke@hauke-m.de>
174+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
175  *
176  * This program is free software; you can redistribute it and/or modify it
177  * under the terms of the GNU General Public License as published by the
178@@ -12,6 +13,7 @@
179 #include <linux/ssb/ssb.h>
180 #include <linux/bcma/bcma.h>
181 #include <bcm47xx.h>
182+#include <linux/mtd/nand.h>
183 
184 struct bcm47xx_sflash {
185     enum bcm47xx_bus_type sflash_type;
186@@ -34,3 +36,18 @@ void bcm47xx_sflash_struct_bcma_init(str
187 void bcm47xx_sflash_struct_ssb_init(struct bcm47xx_sflash *sflash, struct ssb_chipcommon *scc);
188 
189 extern struct bcm47xx_sflash bcm47xx_sflash;
190+
191+struct bcm47xx_nflash {
192+ enum bcm47xx_bus_type nflash_type;
193+ struct bcma_drv_cc *bcc;
194+
195+ u32 size; /* Total size in bytes */
196+ u32 next_opcode; /* Next expected command from upper NAND layer */
197+
198+ struct mtd_info mtd;
199+ struct nand_chip nand;
200+};
201+
202+void bcm47xx_nflash_struct_bcma_init(struct bcm47xx_nflash *nflash, struct bcma_drv_cc *bcc);
203+
204+extern struct bcm47xx_nflash bcm47xx_nflash;
205--- a/drivers/bcma/Kconfig
206+++ b/drivers/bcma/Kconfig
207@@ -43,6 +43,11 @@ config BCMA_SFLASH
208     depends on BCMA_DRIVER_MIPS
209     default y
210 
211+config BCMA_NFLASH
212+ bool
213+ depends on BCMA_DRIVER_MIPS
214+ default y
215+
216 config BCMA_DRIVER_MIPS
217     bool "BCMA Broadcom MIPS core driver"
218     depends on BCMA && MIPS
219--- a/drivers/bcma/Makefile
220+++ b/drivers/bcma/Makefile
221@@ -1,6 +1,7 @@
222 bcma-y += main.o scan.o core.o sprom.o
223 bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
224 bcma-$(CONFIG_BCMA_SFLASH) += driver_chipcommon_sflash.o
225+bcma-$(CONFIG_BCMA_NFLASH) += driver_chipcommon_nflash.o
226 bcma-y += driver_pci.o
227 bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
228 bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
229--- a/drivers/bcma/bcma_private.h
230+++ b/drivers/bcma/bcma_private.h
231@@ -56,6 +56,11 @@ u32 bcma_pmu_get_clockcpu(struct bcma_dr
232 int bcma_sflash_init(struct bcma_drv_cc *cc);
233 #endif /* CONFIG_BCMA_SFLASH */
234 
235+#ifdef CONFIG_BCMA_NFLASH
236+/* driver_chipcommon_nflash.c */
237+int bcma_nflash_init(struct bcma_drv_cc *cc);
238+#endif /* CONFIG_BCMA_NFLASH */
239+
240 #ifdef CONFIG_BCMA_HOST_PCI
241 /* host_pci.c */
242 extern int __init bcma_host_pci_init(void);
243--- /dev/null
244+++ b/drivers/bcma/driver_chipcommon_nflash.c
245@@ -0,0 +1,154 @@
246+/*
247+ * BCMA nand flash interface
248+ *
249+ * Copyright 2011, Tathagata Das <tathagata@alumnux.com>
250+ * Copyright 2010, Broadcom Corporation
251+ *
252+ * Licensed under the GNU/GPL. See COPYING for details.
253+ */
254+
255+#include <linux/bcma/bcma.h>
256+#include <linux/bcma/bcma_driver_chipcommon.h>
257+#include <linux/delay.h>
258+#include <linux/mtd/bcm47xx_nand.h>
259+#include <linux/mtd/nand.h>
260+
261+#include "bcma_private.h"
262+
263+/* Issue a nand flash command */
264+static inline void bcma_nflash_cmd(struct bcma_drv_cc *cc, u32 opcode)
265+{
266+ bcma_cc_write32(cc, NAND_CMD_START, opcode);
267+ bcma_cc_read32(cc, NAND_CMD_START);
268+}
269+
270+/* Check offset and length */
271+static int bcma_nflash_offset_is_valid(struct bcma_drv_cc *cc, u32 offset, u32 len, u32 mask)
272+{
273+ if ((offset & mask) != 0 || (len & mask) != 0) {
274+ pr_err("%s(): Address is not aligned. offset: %x, len: %x, mask: %x\n", __func__, offset, len, mask);
275+ return 1;
276+ }
277+
278+ if ((((offset + len) >> 20) >= cc->nflash.size) &&
279+ (((offset + len) & ((1 << 20) - 1)) != 0)) {
280+ pr_err("%s(): Address is outside Flash memory region. offset: %x, len: %x, mask: %x\n", __func__, offset, len, mask);
281+ return 1;
282+ }
283+
284+ return 0;
285+}
286+
287+/* Read len bytes starting at offset into buf. Returns number of bytes read. */
288+int bcma_nflash_read(struct bcma_drv_cc *cc, u32 offset, u32 len, u8 *buf)
289+{
290+ u32 mask;
291+ int i;
292+ u32 *to, val, res;
293+
294+ mask = NFL_SECTOR_SIZE - 1;
295+ if (bcma_nflash_offset_is_valid(cc, offset, len, mask))
296+ return 0;
297+
298+ to = (u32 *)buf;
299+ res = len;
300+ while (res > 0) {
301+ bcma_cc_write32(cc, NAND_CMD_ADDR, offset);
302+ bcma_nflash_cmd(cc, NCMD_PAGE_RD);
303+ if (bcma_nflash_poll(cc) < 0)
304+ break;
305+ val = bcma_cc_read32(cc, NAND_INTFC_STATUS);
306+ if ((val & NIST_CACHE_VALID) == 0)
307+ break;
308+ bcma_cc_write32(cc, NAND_CACHE_ADDR, 0);
309+ for (i = 0; i < NFL_SECTOR_SIZE; i += 4, to++) {
310+ *to = bcma_cc_read32(cc, NAND_CACHE_DATA);
311+ }
312+ res -= NFL_SECTOR_SIZE;
313+ offset += NFL_SECTOR_SIZE;
314+ }
315+ return (len - res);
316+}
317+
318+#define NF_RETRIES 1000000
319+
320+/* Poll for command completion. Returns zero when complete. */
321+int bcma_nflash_poll(struct bcma_drv_cc *cc)
322+{
323+ u32 retries = NF_RETRIES;
324+ u32 pollmask = NIST_CTRL_READY|NIST_FLASH_READY;
325+ u32 mask;
326+
327+ while (retries--) {
328+ mask = bcma_cc_read32(cc, NAND_INTFC_STATUS) & pollmask;
329+ if (mask == pollmask)
330+ return 0;
331+ cpu_relax();
332+ }
333+
334+ if (!retries) {
335+ pr_err("bcma_nflash_poll: not ready\n");
336+ return -1;
337+ }
338+
339+ return 0;
340+}
341+
342+/* Write len bytes starting at offset into buf. Returns success (0) or failure (!0).
343+ * Should poll for completion.
344+ */
345+int bcma_nflash_write(struct bcma_drv_cc *cc, u32 offset, u32 len,
346+ const u8 *buf)
347+{
348+ u32 mask;
349+ int i;
350+ u32 *from, res, reg;
351+
352+ mask = cc->nflash.pagesize - 1;
353+ if (bcma_nflash_offset_is_valid(cc, offset, len, mask))
354+ return 1;
355+
356+ /* disable partial page enable */
357+ reg = bcma_cc_read32(cc, NAND_ACC_CONTROL);
358+ reg &= ~NAC_PARTIAL_PAGE_EN;
359+ bcma_cc_write32(cc, NAND_ACC_CONTROL, reg);
360+
361+ from = (u32 *)buf;
362+ res = len;
363+ while (res > 0) {
364+ bcma_cc_write32(cc, NAND_CACHE_ADDR, 0);
365+ for (i = 0; i < cc->nflash.pagesize; i += 4, from++) {
366+ if (i % 512 == 0)
367+ bcma_cc_write32(cc, NAND_CMD_ADDR, i);
368+ bcma_cc_write32(cc, NAND_CACHE_DATA, *from);
369+ }
370+ bcma_cc_write32(cc, NAND_CMD_ADDR, offset + cc->nflash.pagesize - 512);
371+ bcma_nflash_cmd(cc, NCMD_PAGE_PROG);
372+ if (bcma_nflash_poll(cc) < 0)
373+ break;
374+ res -= cc->nflash.pagesize;
375+ offset += cc->nflash.pagesize;
376+ }
377+
378+ if (res <= 0)
379+ return 0;
380+ else
381+ return (len - res);
382+}
383+
384+/* Erase a region. Returns success (0) or failure (-1).
385+ * Poll for completion.
386+ */
387+int bcma_nflash_erase(struct bcma_drv_cc *cc, u32 offset)
388+{
389+ if ((offset >> 20) >= cc->nflash.size)
390+ return -1;
391+ if ((offset & (cc->nflash.blocksize - 1)) != 0)
392+ return -1;
393+
394+ bcma_cc_write32(cc, NAND_CMD_ADDR, offset);
395+ bcma_nflash_cmd(cc, NCMD_BLOCK_ERASE);
396+ if (bcma_nflash_poll(cc) < 0)
397+ return -1;
398+ return 0;
399+}
400--- a/drivers/bcma/driver_mips.c
401+++ b/drivers/bcma/driver_mips.c
402@@ -6,6 +6,7 @@
403  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
404  * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
405  * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
406+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
407  *
408  * Licensed under the GNU/GPL. See COPYING for details.
409  */
410@@ -182,6 +183,17 @@ static void bcma_core_mips_flash_detect(
411 {
412     struct bcma_bus *bus = mcore->core->bus;
413 
414+ if (bus->drv_cc.core->id.rev == 38
415+ && (bus->drv_cc.status & (1 << 4)) != 0) {
416+#ifdef CONFIG_BCMA_NFLASH
417+ pr_info("found nand flash.\n");
418+ bus->drv_cc.flash_type = BCMA_NFLASH;
419+#else
420+ pr_info("NAND flash not supported.\n");
421+#endif
422+ return;
423+ }
424+
425     switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) {
426     case BCMA_CC_FLASHT_STSER:
427     case BCMA_CC_FLASHT_ATSER:
428--- a/drivers/mtd/nand/Kconfig
429+++ b/drivers/mtd/nand/Kconfig
430@@ -536,4 +536,12 @@ config MTD_NAND_FSMC
431       Enables support for NAND Flash chips on the ST Microelectronics
432       Flexible Static Memory Controller (FSMC)
433 
434+config MTD_NAND_BCM47XX
435+ tristate "bcm47xx nand flash support"
436+ default y
437+ depends on BCM47XX && BCMA_NFLASH
438+ select MTD_PARTITIONS
439+ help
440+ Support for bcm47xx nand flash
441+
442 endif # MTD_NAND
443--- a/drivers/mtd/nand/Makefile
444+++ b/drivers/mtd/nand/Makefile
445@@ -49,5 +49,6 @@ obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mp
446 obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
447 obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
448 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
449+obj-$(CONFIG_MTD_NAND_BCM47XX) += bcm47xx_nand.o
450 
451 nand-objs := nand_base.o nand_bbt.o
452--- /dev/null
453+++ b/drivers/mtd/nand/bcm47xx_nand.c
454@@ -0,0 +1,506 @@
455+/*
456+ * BCMA nand flash interface
457+ *
458+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
459+ * Copyright 2010, Broadcom Corporation
460+ *
461+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
462+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
463+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
464+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
465+ *
466+ */
467+
468+#define pr_fmt(fmt) "bcm47xx_nflash: " fmt
469+#include <linux/module.h>
470+#include <linux/slab.h>
471+#include <linux/ioport.h>
472+#include <linux/sched.h>
473+#include <linux/mtd/mtd.h>
474+#include <linux/mtd/map.h>
475+#include <linux/mtd/partitions.h>
476+#include <linux/errno.h>
477+#include <linux/delay.h>
478+#include <linux/platform_device.h>
479+#include <bcm47xx.h>
480+#include <bus.h>
481+#include <linux/cramfs_fs.h>
482+#include <linux/romfs_fs.h>
483+#include <linux/magic.h>
484+#include <linux/byteorder/generic.h>
485+#include <linux/mtd/bcm47xx_nand.h>
486+#include <linux/mtd/nand.h>
487+
488+static int bcm47xx_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip);
489+static int bcm47xx_erase(struct mtd_info *mtd, unsigned int addr, unsigned int len);
490+
491+/* Private Global variable */
492+static u32 read_offset = 0;
493+static u32 write_offset;
494+
495+static int
496+nflash_mtd_poll(struct bcm47xx_nflash *nflash, unsigned int offset, int timeout)
497+{
498+ unsigned long now = jiffies;
499+ int ret = 0;
500+
501+ for (;;) {
502+ if (!bcma_nflash_poll(nflash->bcc)) {
503+ ret = 0;
504+ break;
505+ }
506+ if (time_after(jiffies, now + timeout)) {
507+ pr_err("timeout while polling\n");
508+ ret = -ETIMEDOUT;
509+ break;
510+ }
511+ udelay(1);
512+ }
513+
514+ return ret;
515+}
516+
517+static int
518+bcm47xx_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
519+{
520+ struct nand_chip *nchip = (struct nand_chip *)mtd->priv;
521+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
522+ int bytes, ret = 0;
523+ u32 extra = 0;
524+ u8 *tmpbuf = NULL;
525+ int size;
526+ u32 offset, blocksize, mask, off;
527+ u32 skip_bytes = 0;
528+ int need_copy = 0;
529+ u8 *ptr = NULL;
530+
531+ /* Check address range */
532+ if (!len)
533+ return 0;
534+ if ((from + len) > mtd->size)
535+ return -EINVAL;
536+ offset = from;
537+ if ((offset & (NFL_SECTOR_SIZE - 1)) != 0) {
538+ extra = offset & (NFL_SECTOR_SIZE - 1);
539+ offset -= extra;
540+ len += extra;
541+ need_copy = 1;
542+ }
543+ size = (len + (NFL_SECTOR_SIZE - 1)) & ~(NFL_SECTOR_SIZE - 1);
544+ if (size != len) {
545+ need_copy = 1;
546+ }
547+ if (!need_copy) {
548+ ptr = buf;
549+ } else {
550+ tmpbuf = (u8 *)kmalloc(size, GFP_KERNEL);
551+ ptr = tmpbuf;
552+ }
553+
554+ blocksize = mtd->erasesize;
555+ mask = blocksize - 1;
556+ *retlen = 0;
557+ while (len > 0) {
558+ off = offset + skip_bytes;
559+ if ((bytes = bcma_nflash_read(nflash->bcc, off, NFL_SECTOR_SIZE, ptr)) < 0) {
560+ ret = bytes;
561+ goto done;
562+ }
563+ if (bytes > len)
564+ bytes = len;
565+ offset += bytes;
566+ len -= bytes;
567+ ptr += bytes;
568+ *retlen += bytes;
569+ }
570+
571+done:
572+ if (tmpbuf) {
573+ *retlen -= extra;
574+ memcpy(buf, tmpbuf+extra, *retlen);
575+ kfree(tmpbuf);
576+ }
577+
578+ return ret;
579+}
580+
581+static void bcm47xx_write(struct mtd_info *mtd, u32 to, const u_char *buf, u32 len)
582+{
583+ struct nand_chip *nchip = (struct nand_chip *)mtd->priv;
584+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
585+ u32 offset, blocksize, mask, off;
586+ int read_len;
587+ u32 copy_len, write_len, from;
588+ u_char *write_ptr, *block;
589+ const u_char *ptr;
590+ int ret, bytes;
591+
592+ /* Check address range */
593+ if (!len) {
594+ pr_err("Error: Attempted to write too small data\n");
595+ return;
596+ }
597+
598+ if (!to)
599+ return;
600+
601+ if ((to + len) > mtd->size) {
602+ pr_err("Error: Attempted to write too large data\n");
603+ return;
604+ }
605+
606+ ptr = buf;
607+ block = NULL;
608+ offset = to;
609+ blocksize = mtd->erasesize;
610+ if (!(block = kmalloc(blocksize, GFP_KERNEL)))
611+ return;
612+ mask = blocksize - 1;
613+ while (len) {
614+ /* Align offset */
615+ from = offset & ~mask;
616+ /* Copy existing data into holding block if necessary */
617+ if (((offset & (blocksize-1)) != 0) || (len < blocksize)) {
618+ if ((ret = bcm47xx_read(mtd, from, blocksize, &read_len, block)))
619+ goto done;
620+ if (read_len != blocksize) {
621+ ret = -EINVAL;
622+ goto done;
623+ }
624+ }
625+
626+ /* Copy input data into holding block */
627+ copy_len = min(len, blocksize - (offset & mask));
628+ memcpy(block + (offset & mask), ptr, copy_len);
629+ off = (uint) from;
630+ /* Erase block */
631+ if ((ret = bcm47xx_erase(mtd, off, blocksize)) < 0)
632+ goto done;
633+ /* Write holding block */
634+ write_ptr = block;
635+ write_len = blocksize;
636+ if ((bytes = bcma_nflash_write(nflash->bcc, (uint)from, (uint)write_len, (u8 *) write_ptr)) != 0) {
637+ ret = bytes;
638+ goto done;
639+ }
640+ offset += copy_len;
641+ if (len < copy_len)
642+ len = 0;
643+ else
644+ len -= copy_len;
645+ ptr += copy_len;
646+ }
647+
648+done:
649+ if (block)
650+ kfree(block);
651+ return;
652+}
653+
654+static int bcm47xx_erase(struct mtd_info *mtd, unsigned int addr, unsigned int len)
655+{
656+ struct nand_chip *nchip = (struct nand_chip *)mtd->priv;
657+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
658+
659+ /* Check address range */
660+ if (!len)
661+ return 1;
662+ if ((addr + len) > mtd->size)
663+ return 1;
664+
665+ if (bcma_nflash_erase(nflash->bcc, addr)) {
666+ pr_err("ERASE: nflash erase error\n");
667+ return 1;
668+ }
669+
670+ if (nflash_mtd_poll(nflash, addr, 10 * HZ)) {
671+ pr_err("ERASE: nflash_mtd_poll error\n");
672+ return 1;
673+ }
674+
675+ return 0;
676+}
677+
678+/* This functions is used by upper layer to checks if device is ready */
679+static int bcm47xx_dev_ready(struct mtd_info *mtd)
680+{
681+ return 1;
682+}
683+
684+/* Issue a nand flash command */
685+static inline void bcm47xx_nflash_cmd(struct bcma_drv_cc *cc, u32 opcode)
686+{
687+ bcma_cc_write32(cc, NAND_CMD_START, opcode);
688+ bcma_cc_read32(cc, NAND_CMD_START);
689+}
690+
691+static void bcm47xx_command(struct mtd_info *mtd, unsigned command,
692+ int column, int page_addr)
693+{
694+ struct nand_chip *nchip = (struct nand_chip *)mtd->priv;
695+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
696+ u32 pagesize = 1 << nchip->page_shift;
697+
698+ /* Command pre-processing step */
699+ switch (command) {
700+ case NAND_CMD_RESET:
701+ bcm47xx_nflash_cmd(nflash->bcc, NCMD_FLASH_RESET);
702+ break;
703+
704+ case NAND_CMD_STATUS:
705+ nflash->next_opcode = NAND_CMD_STATUS;
706+ read_offset = 0;
707+ write_offset = 0;
708+ break;
709+
710+ case NAND_CMD_READ0:
711+ read_offset = page_addr * pagesize;
712+ nflash->next_opcode = 0;
713+ break;
714+
715+ case NAND_CMD_READOOB:
716+ read_offset = page_addr * pagesize;
717+ nflash->next_opcode = 0;
718+ break;
719+
720+ case NAND_CMD_SEQIN:
721+ write_offset = page_addr * pagesize;
722+ nflash->next_opcode = 0;
723+ break;
724+
725+ case NAND_CMD_PAGEPROG:
726+ nflash->next_opcode = 0;
727+ break;
728+
729+ case NAND_CMD_READID:
730+ read_offset = column;
731+ bcm47xx_nflash_cmd(nflash->bcc, NCMD_ID_RD);
732+ nflash->next_opcode = NAND_DEVID;
733+ break;
734+
735+ case NAND_CMD_ERASE1:
736+ nflash->next_opcode = 0;
737+ bcm47xx_erase(mtd, page_addr*pagesize, pagesize);
738+ break;
739+
740+ case NAND_CMD_ERASE2:
741+ break;
742+
743+ case NAND_CMD_RNDOUT:
744+ if (column > mtd->writesize)
745+ read_offset += (column - mtd->writesize);
746+ else
747+ read_offset += column;
748+ break;
749+
750+ default:
751+ pr_err("COMMAND not supported %x\n", command);
752+ nflash->next_opcode = 0;
753+ break;
754+ }
755+}
756+
757+/* This function is used by upper layer for select and
758+ * deselect of the NAND chip.
759+ * It is dummy function. */
760+static void bcm47xx_select_chip(struct mtd_info *mtd, int chip)
761+{
762+}
763+
764+static u_char bcm47xx_read_byte(struct mtd_info *mtd)
765+{
766+ struct nand_chip *nchip = mtd->priv;
767+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
768+ uint8_t ret = 0;
769+ static u32 id;
770+
771+ if (nflash->next_opcode == 0)
772+ return ret;
773+
774+ if (nflash->next_opcode == NAND_CMD_STATUS)
775+ return NAND_STATUS_WP;
776+
777+ id = bcma_cc_read32(nflash->bcc, nflash->next_opcode);
778+
779+ if (nflash->next_opcode == NAND_DEVID) {
780+ ret = (id >> (8*read_offset)) & 0xff;
781+ read_offset++;
782+ }
783+
784+ return ret;
785+}
786+
787+static uint16_t bcm47xx_read_word(struct mtd_info *mtd)
788+{
789+ loff_t from = read_offset;
790+ uint16_t buf = 0;
791+ int bytes;
792+
793+ bcm47xx_read(mtd, from, sizeof(buf), &bytes, (u_char *)&buf);
794+ return buf;
795+}
796+
797+/* Write data of length len to buffer buf. The data to be
798+ * written on NAND Flash is first copied to RAMbuffer. After the Data Input
799+ * Operation by the NFC, the data is written to NAND Flash */
800+static void bcm47xx_write_buf(struct mtd_info *mtd,
801+ const u_char *buf, int len)
802+{
803+ bcm47xx_write(mtd, write_offset, buf, len);
804+}
805+
806+/* Read the data buffer from the NAND Flash. To read the data from NAND
807+ * Flash first the data output cycle is initiated by the NFC, which copies
808+ * the data to RAMbuffer. This data of length len is then copied to buffer buf.
809+ */
810+static void bcm47xx_read_buf(struct mtd_info *mtd, u_char *buf, int len)
811+{
812+ loff_t from = read_offset;
813+ int bytes;
814+
815+ bcm47xx_read(mtd, from, len, &bytes, buf);
816+}
817+
818+/* Used by the upper layer to verify the data in NAND Flash
819+ * with the data in the buf. */
820+static int bcm47xx_verify_buf(struct mtd_info *mtd,
821+ const u_char *buf, int len)
822+{
823+ return -EFAULT;
824+}
825+
826+static int bcm47xx_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
827+{
828+ struct nand_chip *nchip = mtd->priv;
829+ struct bcm47xx_nflash *nflash = (struct bcm47xx_nflash *)nchip->priv;
830+ int i;
831+ uint off;
832+ u32 pagesize = 1 << nchip->page_shift;
833+ u32 blocksize = mtd->erasesize;
834+
835+ if ((ofs >> 20) >= nflash->size)
836+ return 1;
837+ if ((ofs & (blocksize - 1)) != 0)
838+ return 1;
839+
840+ for (i = 0; i < 2; i++) {
841+ off = ofs + pagesize;
842+ bcma_cc_write32(nflash->bcc, NAND_CMD_ADDR, off);
843+ bcm47xx_nflash_cmd(nflash->bcc, NCMD_SPARE_RD);
844+ if (bcma_nflash_poll(nflash->bcc) < 0)
845+ break;
846+ if ((bcma_cc_read32(nflash->bcc, NAND_INTFC_STATUS) & NIST_SPARE_VALID) != NIST_SPARE_VALID)
847+ return 1;
848+ if ((bcma_cc_read32(nflash->bcc, NAND_SPARE_RD0) & 0xff) != 0xff)
849+ return 1;
850+ }
851+ return 0;
852+}
853+
854+const char *part_probes[] = { "cmdlinepart", NULL };
855+static int bcm47xx_probe(struct platform_device *pdev)
856+{
857+ struct nand_chip *nchip;
858+ struct mtd_info *mtd;
859+ struct bcm47xx_nflash *nflash = dev_get_platdata(&pdev->dev);
860+ int ret = 0;
861+
862+ mtd = &nflash->mtd;
863+ nchip = &nflash->nand;
864+
865+ /* Register with MTD */
866+ mtd->priv = nchip;
867+ mtd->owner = THIS_MODULE;
868+ mtd->dev.parent = &pdev->dev;
869+
870+ /* 50 us command delay time */
871+ nchip->chip_delay = 50;
872+
873+ nchip->priv = nflash;
874+ nchip->dev_ready = bcm47xx_dev_ready;
875+ nchip->cmdfunc = bcm47xx_command;
876+ nchip->select_chip = bcm47xx_select_chip;
877+ nchip->read_byte = bcm47xx_read_byte;
878+ nchip->read_word = bcm47xx_read_word;
879+ nchip->write_buf = bcm47xx_write_buf;
880+ nchip->read_buf = bcm47xx_read_buf;
881+ nchip->verify_buf = bcm47xx_verify_buf;
882+ nchip->block_bad = bcm47xx_block_bad;
883+ nchip->options = NAND_SKIP_BBTSCAN;
884+
885+ /* Not known */
886+ nchip->ecc.mode = NAND_ECC_NONE;
887+
888+ /* first scan to find the device and get the page size */
889+ if (nand_scan_ident(mtd, 1, NULL)) {
890+ pr_err("nand_scan_ident failed\n");
891+ ret = -ENXIO;
892+ goto done;
893+ }
894+ nflash->bcc->nflash.size = mtd->size;
895+ nflash->bcc->nflash.pagesize = 1 << nchip->page_shift;
896+ nflash->bcc->nflash.blocksize = mtd->erasesize;
897+ bcm47xx_nflash.size = mtd->size;
898+
899+ /* second phase scan */
900+ if (nand_scan_tail(mtd)) {
901+ pr_err("nand_scan_tail failed\n");
902+ ret = -ENXIO;
903+ goto done;
904+ }
905+
906+ mtd->name = "bcm47xx-nflash";
907+ mtd->flags |= MTD_WRITEABLE;
908+ ret = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
909+
910+ if (ret) {
911+ pr_err("mtd_device_register failed\n");
912+ return ret;
913+ }
914+
915+ return 0;
916+
917+done:
918+ return ret;
919+}
920+
921+static int __devexit bcm47xx_remove(struct platform_device *pdev)
922+{
923+ struct bcm47xx_nflash *nflash = dev_get_platdata(&pdev->dev);
924+ struct mtd_info *mtd = &nflash->mtd;
925+
926+ if (nflash) {
927+ /* Release resources, unregister device */
928+ nand_release(mtd);
929+ }
930+
931+ return 0;
932+}
933+
934+static struct platform_driver bcm47xx_driver = {
935+ .remove = __devexit_p(bcm47xx_remove),
936+ .driver = {
937+ .name = "bcm47xx_nflash",
938+ .owner = THIS_MODULE,
939+ },
940+};
941+
942+static int __init init_bcm47xx_nflash(void)
943+{
944+ int ret = platform_driver_probe(&bcm47xx_driver, bcm47xx_probe);
945+
946+ if (ret)
947+ pr_err("error registering platform driver: %i\n", ret);
948+ return ret;
949+}
950+
951+static void __exit exit_bcm47xx_nflash(void)
952+{
953+ platform_driver_unregister(&bcm47xx_driver);
954+}
955+
956+module_init(init_bcm47xx_nflash);
957+module_exit(exit_bcm47xx_nflash);
958+
959+MODULE_LICENSE("GPL");
960+MODULE_DESCRIPTION("BCM47XX NAND flash driver");
961--- a/include/linux/bcma/bcma_driver_chipcommon.h
962+++ b/include/linux/bcma/bcma_driver_chipcommon.h
963@@ -436,6 +436,7 @@ struct bcma_chipcommon_pmu {
964 enum bcma_flash_type {
965     BCMA_PFLASH,
966     BCMA_SFLASH,
967+ BCMA_NFLASH,
968 };
969 
970 struct bcma_pflash {
971@@ -452,6 +453,14 @@ struct bcma_sflash {
972 };
973 #endif /* CONFIG_BCMA_SFLASH */
974 
975+#ifdef CONFIG_BCMA_NFLASH
976+struct bcma_nflash {
977+ u32 blocksize; /* Block size */
978+ u32 pagesize; /* Page size */
979+ u32 size; /* Total size in bytes */
980+};
981+#endif
982+
983 struct bcma_serial_port {
984     void *regs;
985     unsigned long clockspeed;
986@@ -477,6 +486,9 @@ struct bcma_drv_cc {
987 #ifdef CONFIG_BCMA_SFLASH
988         struct bcma_sflash sflash;
989 #endif /* CONFIG_BCMA_SFLASH */
990+#ifdef CONFIG_BCMA_NFLASH
991+ struct bcma_nflash nflash;
992+#endif
993     };
994 
995     int nr_serial_ports;
996@@ -542,4 +554,13 @@ int bcma_sflash_write(struct bcma_drv_cc
997 int bcma_sflash_erase(struct bcma_drv_cc *cc, u32 offset);
998 #endif /* CONFIG_BCMA_SFLASH */
999 
1000+#ifdef CONFIG_BCMA_NFLASH
1001+/* Chipcommon nflash support. */
1002+int bcma_nflash_read(struct bcma_drv_cc *cc, u32 offset, u32 len, u8 *buf);
1003+int bcma_nflash_poll(struct bcma_drv_cc *cc);
1004+int bcma_nflash_write(struct bcma_drv_cc *cc, u32 offset, u32 len, const u8 *buf);
1005+int bcma_nflash_erase(struct bcma_drv_cc *cc, u32 offset);
1006+int bcma_nflash_commit(struct bcma_drv_cc *cc, u32 offset, u32 len, const u8 *buf);
1007+#endif
1008+
1009 #endif /* LINUX_BCMA_DRIVER_CC_H_ */
1010--- /dev/null
1011+++ b/include/linux/mtd/bcm47xx_nand.h
1012@@ -0,0 +1,134 @@
1013+/*
1014+ * Broadcom chipcommon NAND flash interface
1015+ *
1016+ * Copyright (C) 2011-2012 Tathagata Das <tathagata@alumnux.com>
1017+ * Copyright (C) 2009, Broadcom Corporation
1018+ * All Rights Reserved.
1019+ *
1020+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1021+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1022+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1023+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1024+ *
1025+ */
1026+
1027+#ifndef _nflash_h_
1028+#define _nflash_h_
1029+
1030+#define NAND_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */
1031+
1032+/* nand_cmd_start commands */
1033+#define NCMD_NULL 0
1034+#define NCMD_PAGE_RD 1
1035+#define NCMD_SPARE_RD 2
1036+#define NCMD_STATUS_RD 3
1037+#define NCMD_PAGE_PROG 4
1038+#define NCMD_SPARE_PROG 5
1039+#define NCMD_COPY_BACK 6
1040+#define NCMD_ID_RD 7
1041+#define NCMD_BLOCK_ERASE 8
1042+#define NCMD_FLASH_RESET 9
1043+#define NCMD_LOCK 0xa
1044+#define NCMD_LOCK_DOWN 0xb
1045+#define NCMD_UNLOCK 0xc
1046+#define NCMD_LOCK_STATUS 0xd
1047+
1048+/* nand_acc_control */
1049+#define NAC_RD_ECC_EN 0x80000000
1050+#define NAC_WR_ECC_EN 0x40000000
1051+#define NAC_RD_ECC_BLK0_EN 0x20000000
1052+#define NAC_FAST_PGM_RDIN 0x10000000
1053+#define NAC_RD_ERASED_ECC_EN 0x08000000
1054+#define NAC_PARTIAL_PAGE_EN 0x04000000
1055+#define NAC_PAGE_HIT_EN 0x01000000
1056+#define NAC_ECC_LEVEL0 0x00f00000
1057+#define NAC_ECC_LEVEL 0x000f0000
1058+#define NAC_SPARE_SIZE0 0x00003f00
1059+#define NAC_SPARE_SIZE 0x0000003f
1060+
1061+/* nand_config */
1062+#define NCF_CONFIG_LOCK 0x80000000
1063+#define NCF_BLOCK_SIZE_MASK 0x70000000
1064+#define NCF_BLOCK_SIZE_SHIFT 28
1065+#define NCF_DEVICE_SIZE_MASK 0x0f000000
1066+#define NCF_DEVICE_SIZE_SHIFT 24
1067+#define NCF_DEVICE_WIDTH 0x00800000
1068+#define NCF_PAGE_SIZE_MASK 0x00300000
1069+#define NCF_PAGE_SIZE_SHIFT 20
1070+#define NCF_FULL_ADDR_BYTES_MASK 0x00070000
1071+#define NCF_FULL_ADDR_BYTES_SHIFT 16
1072+#define NCF_COL_ADDR_BYTES_MASK 0x00007000
1073+#define NCF_COL_ADDR_BYTES_SHIFT 12
1074+#define NCF_BLK_ADDR_BYTES_MASK 0x00000700
1075+#define NCF_BLK_ADDR_BYTES_SHIFT 8
1076+
1077+/* nand_intfc_status */
1078+#define NIST_CTRL_READY 0x80000000
1079+#define NIST_FLASH_READY 0x40000000
1080+#define NIST_CACHE_VALID 0x20000000
1081+#define NIST_SPARE_VALID 0x10000000
1082+#define NIST_ERASED 0x08000000
1083+#define NIST_STATUS 0x000000ff
1084+
1085+#define NFL_SECTOR_SIZE 512
1086+
1087+#define NFL_TABLE_END 0xffffffff
1088+#define NFL_BOOT_SIZE 0x200000
1089+#define NFL_BOOT_OS_SIZE 0x2000000
1090+
1091+/* Nand flash MLC controller registers (corerev >= 38) */
1092+#define NAND_REVISION 0xC00
1093+#define NAND_CMD_START 0xC04
1094+#define NAND_CMD_ADDR_X 0xC08
1095+#define NAND_CMD_ADDR 0xC0C
1096+#define NAND_CMD_END_ADDR 0xC10
1097+#define NAND_CS_NAND_SELECT 0xC14
1098+#define NAND_CS_NAND_XOR 0xC18
1099+#define NAND_SPARE_RD0 0xC20
1100+#define NAND_SPARE_RD4 0xC24
1101+#define NAND_SPARE_RD8 0xC28
1102+#define NAND_SPARE_RD12 0xC2C
1103+#define NAND_SPARE_WR0 0xC30
1104+#define NAND_SPARE_WR4 0xC34
1105+#define NAND_SPARE_WR8 0xC38
1106+#define NAND_SPARE_WR12 0xC3C
1107+#define NAND_ACC_CONTROL 0xC40
1108+#define NAND_CONFIG 0xC48
1109+#define NAND_TIMING_1 0xC50
1110+#define NAND_TIMING_2 0xC54
1111+#define NAND_SEMAPHORE 0xC58
1112+#define NAND_DEVID 0xC60
1113+#define NAND_DEVID_X 0xC64
1114+#define NAND_BLOCK_LOCK_STATUS 0xC68
1115+#define NAND_INTFC_STATUS 0xC6C
1116+#define NAND_ECC_CORR_ADDR_X 0xC70
1117+#define NAND_ECC_CORR_ADDR 0xC74
1118+#define NAND_ECC_UNC_ADDR_X 0xC78
1119+#define NAND_ECC_UNC_ADDR 0xC7C
1120+#define NAND_READ_ERROR_COUNT 0xC80
1121+#define NAND_CORR_STAT_THRESHOLD 0xC84
1122+#define NAND_READ_ADDR_X 0xC90
1123+#define NAND_READ_ADDR 0xC94
1124+#define NAND_PAGE_PROGRAM_ADDR_X 0xC98
1125+#define NAND_PAGE_PROGRAM_ADDR 0xC9C
1126+#define NAND_COPY_BACK_ADDR_X 0xCA0
1127+#define NAND_COPY_BACK_ADDR 0xCA4
1128+#define NAND_BLOCK_ERASE_ADDR_X 0xCA8
1129+#define NAND_BLOCK_ERASE_ADDR 0xCAC
1130+#define NAND_INV_READ_ADDR_X 0xCB0
1131+#define NAND_INV_READ_ADDR 0xCB4
1132+#define NAND_BLK_WR_PROTECT 0xCC0
1133+#define NAND_ACC_CONTROL_CS1 0xCD0
1134+#define NAND_CONFIG_CS1 0xCD4
1135+#define NAND_TIMING_1_CS1 0xCD8
1136+#define NAND_TIMING_2_CS1 0xCDC
1137+#define NAND_SPARE_RD16 0xD30
1138+#define NAND_SPARE_RD20 0xD34
1139+#define NAND_SPARE_RD24 0xD38
1140+#define NAND_SPARE_RD28 0xD3C
1141+#define NAND_CACHE_ADDR 0xD40
1142+#define NAND_CACHE_DATA 0xD44
1143+#define NAND_CTRL_CONFIG 0xD48
1144+#define NAND_CTRL_STATUS 0xD4C
1145+
1146+#endif /* _nflash_h_ */
1147

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