| 1 | From bf9d506bd144b95f8bb4127350ab2db5fba9c12e Mon Sep 17 00:00:00 2001 |
| 2 | From: Jonas Gorski <jonas.gorski@gmail.com> |
| 3 | Date: Sun, 8 Jul 2012 21:07:12 +0200 |
| 4 | Subject: [PATCH 60/84] MIPS: BCM63XX: enable enetsw for BCM6362 |
| 5 | |
| 6 | --- |
| 7 | arch/mips/bcm63xx/clk.c | 7 ++++++- |
| 8 | arch/mips/bcm63xx/dev-enet.c | 6 ++++-- |
| 9 | .../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 1 + |
| 10 | 3 files changed, 11 insertions(+), 3 deletions(-) |
| 11 | |
| 12 | --- a/arch/mips/bcm63xx/clk.c |
| 13 | +++ b/arch/mips/bcm63xx/clk.c |
| 14 | @@ -120,11 +120,13 @@ static void enetsw_set(struct clk *clk, |
| 15 | { |
| 16 | u32 mask; |
| 17 | |
| 18 | - if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) |
| 19 | + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) |
| 20 | return; |
| 21 | |
| 22 | if (BCMCPU_IS_6328()) |
| 23 | mask = CKCTL_6328_ROBOSW_EN; |
| 24 | + else if (BCMCPU_IS_6362()) |
| 25 | + mask = CKCTL_6362_ROBOSW_EN; |
| 26 | else |
| 27 | mask = CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN | |
| 28 | CKCTL_6368_SWPKT_SAR_EN; |
| 29 | @@ -137,6 +139,9 @@ static void enetsw_set(struct clk *clk, |
| 30 | if (BCMCPU_IS_6328()) { |
| 31 | reg = PERF_SOFTRESET_6328_REG; |
| 32 | mask = SOFTRESET_6328_ENETSW_MASK; |
| 33 | + } else if (BCMCPU_IS_6362()) { |
| 34 | + reg = PERF_SOFTRESET_6362_REG; |
| 35 | + mask = SOFTRESET_6362_ENETSW_MASK; |
| 36 | } else { |
| 37 | reg = PERF_SOFTRESET_6368_REG; |
| 38 | mask = SOFTRESET_6368_ENETSW_MASK; |
| 39 | --- a/arch/mips/bcm63xx/dev-enet.c |
| 40 | +++ b/arch/mips/bcm63xx/dev-enet.c |
| 41 | @@ -141,7 +141,7 @@ static int __init register_shared(void) |
| 42 | shared_res[0].end = shared_res[0].start; |
| 43 | shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; |
| 44 | |
| 45 | - if (BCMCPU_IS_6328() || BCMCPU_IS_6368()) |
| 46 | + if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) |
| 47 | chan_count = 32; |
| 48 | else |
| 49 | chan_count = 16; |
| 50 | @@ -224,7 +224,7 @@ bcm63xx_enetsw_register(const struct bcm |
| 51 | { |
| 52 | int ret; |
| 53 | |
| 54 | - if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) |
| 55 | + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) |
| 56 | return -ENODEV; |
| 57 | |
| 58 | ret = register_shared(); |
| 59 | @@ -243,6 +243,8 @@ bcm63xx_enetsw_register(const struct bcm |
| 60 | |
| 61 | if (BCMCPU_IS_6328()) |
| 62 | enetsw_pd.num_ports = ENETSW_PORTS_6328; |
| 63 | + else if (BCMCPU_IS_6362()) |
| 64 | + enetsw_pd.num_ports = ENETSW_PORTS_6362; |
| 65 | else if (BCMCPU_IS_6368()) |
| 66 | enetsw_pd.num_ports = ENETSW_PORTS_6368; |
| 67 | |
| 68 | --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h |
| 69 | +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h |
| 70 | @@ -44,6 +44,7 @@ struct bcm63xx_enet_platform_data { |
| 71 | */ |
| 72 | #define ENETSW_MAX_PORT 6 |
| 73 | #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ |
| 74 | +#define ENETSW_PORTS_6362 6 /* 4 FE PHY + 2 RGMII */ |
| 75 | #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ |
| 76 | |
| 77 | #define ENETSW_RGMII_PORT0 4 |
| 78 | |
