Root/target/linux/coldfire/patches/001-Coldfire-architecture-support-in-Linux-2.6.38.patch

1From c462e1a613c8f84bb503189b0796d036dd1e5376 Mon Sep 17 00:00:00 2001
2From: Jason Jin <jason.jin@freescale.com>
3Date: Thu, 4 Aug 2011 09:59:35 +0800
4Subject: [PATCH 01/52] Coldfire architecture support in Linux 2.6.38
5
6Coldfire architecture support in Linux 2.6.38.
7
8Signed-off-by: Alison Wang <b18965@freescale.com>
9Signed-off-by: Jason Jin <jason.jin@freescale.com>
10---
11 arch/m68k/Kconfig | 279 +++++++++-
12 arch/m68k/Kconfig.debug | 9 +
13 arch/m68k/Makefile | 48 ++-
14 arch/m68k/boot/Makefile | 68 +++
15 arch/m68k/coldfire/Makefile | 10 +
16 arch/m68k/coldfire/common/Makefile | 7 +
17 arch/m68k/coldfire/common/cache.c | 45 ++
18 arch/m68k/coldfire/common/clk.c | 51 ++
19 arch/m68k/coldfire/common/entry.S | 745 ++++++++++++++++++++++++
20 arch/m68k/coldfire/common/head.S | 466 +++++++++++++++
21 arch/m68k/coldfire/common/ints.c | 544 ++++++++++++++++++
22 arch/m68k/coldfire/common/muldi3.S | 73 +++
23 arch/m68k/coldfire/common/signal.c | 991 ++++++++++++++++++++++++++++++++
24 arch/m68k/coldfire/common/traps.c | 457 +++++++++++++++
25 arch/m68k/include/asm/atomic.h | 33 +-
26 arch/m68k/include/asm/bitops_mm.h | 12 +-
27 arch/m68k/include/asm/bootinfo.h | 42 ++
28 arch/m68k/include/asm/cacheflush_mm.h | 14 +-
29 arch/m68k/include/asm/cf-sram.h | 21 +
30 arch/m68k/include/asm/cf_bitops.h | 443 ++++++++++++++
31 arch/m68k/include/asm/cf_cacheflush.h | 20 +
32 arch/m68k/include/asm/cf_entry.h | 153 +++++
33 arch/m68k/include/asm/cf_io.h | 185 ++++++
34 arch/m68k/include/asm/cf_pgalloc.h | 112 ++++
35 arch/m68k/include/asm/cf_pgtable.h | 364 ++++++++++++
36 arch/m68k/include/asm/cf_raw_io.h | 188 ++++++
37 arch/m68k/include/asm/cf_tlbflush.h | 66 +++
38 arch/m68k/include/asm/cf_uaccess.h | 262 +++++++++
39 arch/m68k/include/asm/cf_virtconvert.h | 63 ++
40 arch/m68k/include/asm/cfcache.h | 146 +++++
41 arch/m68k/include/asm/cfmmu.h | 112 ++++
42 arch/m68k/include/asm/coldfire.h | 70 ++-
43 arch/m68k/include/asm/delay_mm.h | 42 ++-
44 arch/m68k/include/asm/div64.h | 11 +-
45 arch/m68k/include/asm/dma.h | 109 ++++-
46 arch/m68k/include/asm/elf.h | 70 +++-
47 arch/m68k/include/asm/io_mm.h | 234 ++++++--
48 arch/m68k/include/asm/irq.h | 14 +-
49 arch/m68k/include/asm/machdep.h | 15 +-
50 arch/m68k/include/asm/mcfdspi.h | 59 ++
51 arch/m68k/include/asm/mcfsim.h | 121 ++++
52 arch/m68k/include/asm/mcfuart.h | 64 ++
53 arch/m68k/include/asm/mmu.h | 15 +-
54 arch/m68k/include/asm/mmu_context.h | 184 ++++++-
55 arch/m68k/include/asm/page.h | 10 +-
56 arch/m68k/include/asm/page_mm.h | 61 ++
57 arch/m68k/include/asm/page_offset.h | 21 +-
58 arch/m68k/include/asm/pgalloc.h | 12 +-
59 arch/m68k/include/asm/pgtable_mm.h | 36 ++-
60 arch/m68k/include/asm/processor.h | 45 ++-
61 arch/m68k/include/asm/ptrace.h | 48 ++-
62 arch/m68k/include/asm/raw_io.h | 15 +-
63 arch/m68k/include/asm/segment.h | 17 +
64 arch/m68k/include/asm/setup.h | 36 ++
65 arch/m68k/include/asm/signal.h | 10 +-
66 arch/m68k/include/asm/string.h | 20 +-
67 arch/m68k/include/asm/swab.h | 15 +-
68 arch/m68k/include/asm/system_mm.h | 23 +-
69 arch/m68k/include/asm/tlbflush.h | 24 +-
70 arch/m68k/include/asm/uaccess_mm.h | 80 ++--
71 arch/m68k/include/asm/unistd.h | 11 +-
72 arch/m68k/include/asm/virtconvert.h | 11 +
73 arch/m68k/kernel/Makefile | 23 +-
74 arch/m68k/kernel/asm-offsets.c | 28 +
75 arch/m68k/kernel/dma.c | 47 ++-
76 arch/m68k/kernel/process.c | 66 +++
77 arch/m68k/kernel/setup.c | 72 ++-
78 arch/m68k/kernel/sys_m68k.c | 80 +++
79 arch/m68k/kernel/time.c | 142 +++++-
80 arch/m68k/kernel/vmlinux-cf.lds | 142 +++++
81 arch/m68k/kernel/vmlinux.lds.S | 12 +-
82 arch/m68k/lib/checksum.c | 129 +++++
83 arch/m68k/lib/muldi3.c | 13 +
84 arch/m68k/lib/string.c | 68 +++
85 arch/m68k/lib/uaccess.c | 247 ++++++++
86 arch/m68k/mm/Makefile | 2 +
87 arch/m68k/mm/cache.c | 19 +
88 arch/m68k/mm/cf-mmu.c | 311 ++++++++++
89 arch/m68k/mm/cf-sram.c | 80 +++
90 arch/m68k/mm/hwtest.c | 10 +
91 arch/m68k/mm/init.c | 15 +-
92 arch/m68k/mm/kmap.c | 82 +++-
93 arch/m68k/mm/memory.c | 17 +
94 fs/namespace.c | 8 +
95 include/linux/fsl_devices.h | 14 +-
96 85 files changed, 8962 insertions(+), 197 deletions(-)
97 create mode 100644 arch/m68k/boot/Makefile
98 create mode 100644 arch/m68k/coldfire/Makefile
99 create mode 100644 arch/m68k/coldfire/common/Makefile
100 create mode 100644 arch/m68k/coldfire/common/cache.c
101 create mode 100644 arch/m68k/coldfire/common/clk.c
102 create mode 100644 arch/m68k/coldfire/common/entry.S
103 create mode 100644 arch/m68k/coldfire/common/head.S
104 create mode 100644 arch/m68k/coldfire/common/ints.c
105 create mode 100644 arch/m68k/coldfire/common/muldi3.S
106 create mode 100644 arch/m68k/coldfire/common/signal.c
107 create mode 100644 arch/m68k/coldfire/common/traps.c
108 create mode 100644 arch/m68k/include/asm/cf-sram.h
109 create mode 100644 arch/m68k/include/asm/cf_bitops.h
110 create mode 100644 arch/m68k/include/asm/cf_cacheflush.h
111 create mode 100644 arch/m68k/include/asm/cf_entry.h
112 create mode 100644 arch/m68k/include/asm/cf_io.h
113 create mode 100644 arch/m68k/include/asm/cf_pgalloc.h
114 create mode 100644 arch/m68k/include/asm/cf_pgtable.h
115 create mode 100644 arch/m68k/include/asm/cf_raw_io.h
116 create mode 100644 arch/m68k/include/asm/cf_tlbflush.h
117 create mode 100644 arch/m68k/include/asm/cf_uaccess.h
118 create mode 100644 arch/m68k/include/asm/cf_virtconvert.h
119 create mode 100644 arch/m68k/include/asm/cfcache.h
120 create mode 100644 arch/m68k/include/asm/cfmmu.h
121 create mode 100644 arch/m68k/include/asm/mcfdspi.h
122 create mode 100644 arch/m68k/kernel/vmlinux-cf.lds
123 create mode 100644 arch/m68k/mm/cf-mmu.c
124 create mode 100644 arch/m68k/mm/cf-sram.c
125
126--- a/arch/m68k/Kconfig
127+++ b/arch/m68k/Kconfig
128@@ -9,6 +9,14 @@ config MMU
129     bool
130     default y
131 
132+config GENERIC_TIME
133+ bool "Enable generic timer"
134+ default n
135+
136+config GENERIC_CLOCKEVENTS
137+ bool "Enable generic clockevents"
138+ default n
139+
140 config RWSEM_GENERIC_SPINLOCK
141     bool
142     default y
143@@ -34,7 +42,7 @@ config GENERIC_CALIBRATE_DELAY
144 
145 config TIME_LOW_RES
146     bool
147- default y
148+ default n
149 
150 config GENERIC_IOMAP
151     bool
152@@ -46,7 +54,7 @@ config ARCH_MAY_HAVE_PC_FDC
153     default y
154 
155 config NO_IOPORT
156- def_bool y
157+ def_bool !(M5445X || M547X_8X || M5441X)
158 
159 config NO_DMA
160     def_bool SUN3
161@@ -105,6 +113,35 @@ config PCMCIA
162       To compile this driver as modules, choose M here: the
163       modules will be called pcmcia_core and ds.
164 
165+config COLDFIRE
166+ bool "ColdFire V4e support"
167+ default y
168+ select CFV4E
169+ help
170+ Say Y if you want to build a kernel to run on one of the ColdFire
171+ V4e boards.
172+
173+config CFV4E
174+ bool
175+ depends on COLDFIRE
176+ select MMU_CFV4E if MMU
177+ default y
178+
179+config FPU
180+ bool "ColdFire V4e FPU support"
181+ default n
182+ help
183+ This enables support for CFV4E FPU feature.
184+
185+config MCD_DMA
186+ bool "ColdFire MCD DMA support"
187+ depends on M547X_8X
188+ default y
189+ help
190+ This enables support for the ColdFire 547x/548x family
191+ multichannel DMA support. Many drivers need it.
192+ If you want it, say Y
193+
194 config AMIGA
195     bool "Amiga support"
196     select MMU_MOTOROLA if MMU
197@@ -122,6 +159,16 @@ config ATARI
198       this kernel on an Atari, say Y here and browse the material
199       available in <file:Documentation/m68k>; otherwise say N.
200 
201+config PCI
202+ bool "PCI bus support"
203+ depends on M54455 || M547X_8X
204+ default n
205+ help
206+ Find out whether you have a PCI motherboard. PCI is the name of a
207+ bus system, i.e. the way the CPU talks to the other stuff inside
208+ your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
209+ VESA. If you have PCI, say Y, otherwise N.
210+
211 config MAC
212     bool "Macintosh support"
213     select MMU_MOTOROLA if MMU
214@@ -276,6 +323,147 @@ config M68060
215       If you anticipate running this kernel on a computer with a MC68060
216       processor, say Y. Otherwise, say N.
217 
218+config M5445X
219+ bool "MCF5445x support"
220+ depends on COLDFIRE
221+ select GENERIC_TIME
222+ select USB_EHCI_FSL
223+ select HAVE_FSL_USB_DR
224+ help
225+ This option will add support for the MCF544x processor with mmu.
226+
227+config M54451
228+ bool
229+ depends on M5445X
230+ default n
231+
232+config M54455
233+ bool
234+ depends on M5445X
235+ default n
236+
237+choice
238+ prompt "Model"
239+ depends on M5445X
240+ default M54451EVB
241+ config M54451EVB
242+ bool "M54451EVB"
243+ select M54451
244+ config M54455EVB
245+ bool "M54455EVB"
246+ select M54455
247+endchoice
248+
249+config HAVE_FSL_USB_DR
250+ bool
251+ default n
252+
253+config M547X_8X
254+ bool "MCF547x/MCF548x support"
255+ depends on COLDFIRE
256+ help
257+ This option will add support for the MCF547x/MCF548x processor with mmu.
258+
259+config M547X
260+ bool
261+ depends on M547X_8X
262+ default n
263+
264+config M548X
265+ bool
266+ depends on M547X_8X
267+ default n
268+
269+choice
270+ prompt "Model"
271+ depends on M547X_8X
272+ default M5485CFE
273+
274+config M5474LITE
275+ bool "MCF5474LITE"
276+ select M547X
277+config M5475AFE
278+ bool "MCF5475AFE"
279+ select M547X
280+config M5475BFE
281+ bool "MCF5475BFE"
282+ select M547X
283+config M5475CFE
284+ bool "MCF5475CFE"
285+ select M547X
286+config M5475DFE
287+ bool "MCF5475DFE"
288+ select M547X
289+config M5475EFE
290+ bool "MCF5475EFE"
291+ select M547X
292+config M5475FFE
293+ bool "MCF5475FFE"
294+ select M547X
295+config M5484LITE
296+ bool "MCF5484LITE"
297+ select M548X
298+config M5485AFE
299+ bool "MCF5485AFE"
300+ select M548X
301+config M5485BFE
302+ bool "MCF5485BFE"
303+ select M548X
304+config M5485CFE
305+ bool "MCF5485CFE"
306+ select M548X
307+config M5485DFE
308+ bool "MCF5485DFE"
309+ select M548X
310+config M5485EFE
311+ bool "MCF5485EFE"
312+ select M548X
313+config M5485FFE
314+ bool "MCF5485FFE"
315+ select M548X
316+
317+endchoice
318+
319+config M5441X
320+ bool "MCF5441x support"
321+ depends on COLDFIRE
322+ select GENERIC_TIME
323+ select USB_EHCI_FSL
324+ select HAVE_FSL_USB_DR
325+ help
326+ This option will add support for the MCF5441x processor with mmu.
327+
328+config M54418
329+ bool
330+ depends on M5441X
331+ default n
332+choice
333+ prompt "Model"
334+ depends on M5441X
335+ default M54418EVB
336+ config M54418EVB
337+ bool "M54418EVB"
338+ select M54418
339+endchoice
340+
341+config MCFCLK
342+ int
343+ default 240000000 if M54451EVB
344+ default 266666666 if M54455EVB
345+ default 266000000 if M547X
346+ default 200000000 if M548X
347+ default 250000000 if M54418EVB && !USB_M5441X_PLLCLK
348+ default 150000000 if M54418EVB && USB_M5441X_PLLCLK
349+ help
350+ Coldfire System clock.
351+
352+config MCF_USER_HALT
353+ bool "Coldfire User Halt Enable"
354+ depends on M5445X || M547X_8X || M5441X
355+ default n
356+ help
357+ Enables the HALT instruction in User Mode.
358+
359 config MMU_MOTOROLA
360     bool
361 
362@@ -283,6 +471,81 @@ config MMU_SUN3
363     bool
364     depends on MMU && !MMU_MOTOROLA
365 
366+config MMU_CFV4E
367+ bool
368+
369+config SDRAM_BASE
370+ hex
371+ depends on COLDFIRE
372+ default 0x40000000 if M5445X
373+ default 0x00000000 if M547X_8X
374+ default 0x40000000 if M5441X
375+
376+config SDRAM_SIZE
377+ hex
378+ depends on COLDFIRE
379+ default 0x08000000 if M54451EVB
380+ default 0x10000000 if M54455EVB
381+ default 0x04000000 if M547X_8X
382+ default 0x08000000 if M54418EVB
383+
384+config NOR_FLASH_BASE
385+ hex "NOR Flash Base Address"
386+ depends on COLDFIRE
387+ default 0x00000000 if M54451EVB
388+ default 0x00000000 if M54455EVB
389+ default 0xE0000000 if M5475CFE
390+ default 0xE0000000 if M5485CFE
391+ default 0xFF800000 if M5484LITE
392+ default 0xFF800000 if M5474LITE
393+ default 0x00000000 if M54418EVB
394+
395+config DMA_BASE
396+ hex
397+ depends on COLDFIRE
398+ default 0xef000000 if M5445X
399+ default 0xef000000 if M547X_8X
400+ default 0xdf000000 if M5441X
401+
402+config DMA_SIZE
403+ hex
404+ depends on COLDFIRE
405+ default 0x1000000 if M5445X
406+ default 0x800000 if M547X_8X
407+ default 0x1000000 if M5441X
408+
409+config SRAM
410+ bool "SRAM allocation APIs support on mcfv4 platform"
411+ depends on COLDFIRE && (M5445X || M5441X)
412+ default y
413+ select GENERIC_ALLOCATOR
414+
415+config SRAM_BASE
416+ hex
417+ depends on COLDFIRE && SRAM
418+ default 0x8ff00000 if M5445X
419+ default 0x8ff00000 if M5441X
420+
421+config SRAM_SIZE
422+ hex
423+ depends on COLDFIRE && SRAM
424+ default 0x8000 if M5445X
425+ default 0x10000 if M5441X
426+
427+config SRAM_ALLOC_GRANULARITY
428+ hex
429+ depends on SRAM
430+ default 0x200 if (M5445X || M5441X)
431+
432+config VDSO
433+ bool "Support VDSO page"
434+ depends on MMU
435+ default n
436+ help
437+ This will enable support for the kernel mapping a vDSO page
438+ in process space, and subsequently handing down the entry point
439+ to the libc through the ELF auxiliary vector.
440+
441 config M68KFPU_EMU
442     bool "Math emulation support (EXPERIMENTAL)"
443     depends on EXPERIMENTAL
444@@ -449,6 +712,14 @@ config ZONE_DMA
445 source "drivers/pci/Kconfig"
446 
447 source "drivers/zorro/Kconfig"
448+endmenu
449+
450+menu "Power management options"
451+
452+config PM
453+ bool "Power Management support"
454+ help
455+ Support processor power management modes
456 
457 endmenu
458 
459@@ -583,7 +854,7 @@ config DN_SERIAL
460 
461 config SERIAL_CONSOLE
462     bool "Support for serial port console"
463- depends on (AMIGA || ATARI || SUN3 || SUN3X || VME || APOLLO) && (ATARI_MFPSER=y || ATARI_MIDI=y || AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y || SERIAL=y || MVME147_SCC || SERIAL167 || MVME162_SCC || BVME6000_SCC || DN_SERIAL)
464+ depends on (AMIGA || ATARI || SUN3 || SUN3X || VME || APOLLO || COLDFIRE) && (ATARI_MFPSER=y || ATARI_MIDI=y || AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y || SERIAL=y || MVME147_SCC || SERIAL167 || MVME162_SCC || BVME6000_SCC || DN_SERIAL || SERIAL_COLDFIRE)
465     ---help---
466       If you say Y here, it will be possible to use a serial port as the
467       system console (the system console is the device which receives all
468@@ -606,6 +877,8 @@ config SERIAL_CONSOLE
469 
470 endmenu
471 
472+source "kernel/time/Kconfig"
473+
474 source "fs/Kconfig"
475 
476 source "arch/m68k/Kconfig.debug"
477--- a/arch/m68k/Kconfig.debug
478+++ b/arch/m68k/Kconfig.debug
479@@ -2,4 +2,13 @@ menu "Kernel hacking"
480 
481 source "lib/Kconfig.debug"
482 
483+config BOOTPARAM
484+ bool 'Compiled-in Kernel Boot Parameter'
485+ depends on COLDFIRE
486+
487+config BOOTPARAM_STRING
488+ string 'Kernel Boot Parameter'
489+ default 'console=ttyS0,115200'
490+ depends on BOOTPARAM
491+
492 endmenu
493--- a/arch/m68k/Makefile
494+++ b/arch/m68k/Makefile
495@@ -1,6 +1,8 @@
496 #
497 # m68k/Makefile
498 #
499+# Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
500+#
501 # This file is included by the global makefile so that you can add your own
502 # architecture-specific flags and dependencies. Remember to do have actions
503 # for "archclean" and "archdep" for cleaning up and making dependencies for
504@@ -10,13 +12,13 @@
505 # License. See the file "COPYING" in the main directory of this archive
506 # for more details.
507 #
508-# Copyright (C) 1994 by Hamish Macdonald
509-#
510 
511-KBUILD_DEFCONFIG := multi_defconfig
512+KBUILD_DEFCONFIG := amiga_defconfig#multi_defconfig
513 
514 # override top level makefile
515+ifndef CONFIG_COLDFIRE
516 AS += -m68020
517+endif
518 LDFLAGS := -m m68kelf
519 KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
520 ifneq ($(SUBARCH),$(ARCH))
521@@ -30,12 +32,18 @@ ifdef CONFIG_SUN3
522 LDFLAGS_vmlinux = -N
523 endif
524 
525+ifdef CONFIG_COLDFIRE
526+OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -S
527+# LDFLAGS_vmlinux = --verbose
528+endif
529+
530 CHECKFLAGS += -D__mc68000__
531 
532 # without -fno-strength-reduce the 53c7xx.c driver fails ;-(
533 KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
534 
535 # enable processor switch if compiled only for a single cpu
536+ifndef CONFIG_COLDFIRE
537 ifndef CONFIG_M68020
538 ifndef CONFIG_M68030
539 
540@@ -49,6 +57,22 @@ endif
541 
542 endif
543 endif
544+endif
545+
546+ifdef CONFIG_M5445X
547+KBUILD_CFLAGS += -march=isac -mcpu=54455 -msoft-float -g
548+KBUILD_AFLAGS += -march=isac -mcpu=54455 -msoft-float
549+endif
550+
551+ifdef CONFIG_M547X_8X
552+KBUILD_CFLAGS += -mcfv4e -g
553+KBUILD_AFLAGS += -mcfv4e
554+endif
555+
556+ifdef CONFIG_M5441X
557+KBUILD_CFLAGS += -march=isac -mcpu=54418 -msoft-float -g
558+KBUILD_AFLAGS += -march=isac -mcpu=54418 -msoft-float
559+endif
560 
561 ifdef CONFIG_KGDB
562 # If configured for kgdb support, include debugging infos and keep the
563@@ -57,8 +81,12 @@ KBUILD_CFLAGS := $(subst -fomit-frame-po
564 endif
565 
566 ifndef CONFIG_SUN3
567+ifndef CONFIG_COLDFIRE
568 head-y := arch/m68k/kernel/head.o
569 else
570+head-y := arch/m68k/coldfire/common/head.o
571+endif
572+else
573 head-y := arch/m68k/kernel/sun3-head.o
574 endif
575 
576@@ -79,7 +107,20 @@ core-$(CONFIG_SUN3) += arch/m68k/sun3/
577 core-$(CONFIG_M68040) += arch/m68k/fpsp040/
578 core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
579 core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
580+core-$(CONFIG_COLDFIRE) += arch/m68k/coldfire/
581+
582+ifdef CONFIG_COLDFIRE
583+boot := arch/m68k/boot
584+
585+all: uImage
586 
587+zImage zImage.srec uImage uImage.srec vmlinux.srec: vmlinux
588+ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
589+
590+archclean:
591+ $(Q)$(MAKE) $(clean)=$(boot)
592+
593+else
594 all: zImage
595 
596 lilo: vmlinux
597@@ -117,6 +158,7 @@ endif
598 
599 archclean:
600     rm -f vmlinux.gz vmlinux.bz2
601+endif
602 
603 install:
604     sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
605--- /dev/null
606+++ b/arch/m68k/boot/Makefile
607@@ -0,0 +1,68 @@
608+#
609+# arch/m68k/boot/Makefile
610+#
611+# Based on arch/sh/boot/Makefile by Stuart Menefy
612+#
613+# Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
614+# by Kurt Mahan <kmahan@freescale.com>
615+#
616+# This file is subject to the terms and conditions of the GNU General Public
617+# License. See the file "COPYING" in the main directory of this archive
618+# for more details.
619+#
620+
621+MKIMAGE := $(srctree)/scripts/mkuboot.sh
622+
623+#
624+# Assign safe dummy values if these variables are not defined,
625+# in order to suppress error message.
626+#
627+CONFIG_SDRAM_BASE ?= 0x40000000
628+CONFIG_IMG_START ?= 0x00020000
629+
630+export CONFIG_SDRAM_BASE CONFIG_IMG_START
631+
632+targets := zImage zImage.srec vmlinux.srec uImage uImage.srec
633+
634+$(obj)/zImage: $(obj)/vmlinux.bin FORCE
635+ $(call if_changed,gzip)
636+ @echo ' Image $@ is ready'
637+
638+OBJCOPYFLAGS_zImage.srec := -I binary -O srec
639+$(obj)/zImage.srec: $(obj)/zImage
640+ $(call if_changed,objcopy)
641+
642+KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
643+ $$[$(CONFIG_SDRAM_BASE) + \
644+ $(CONFIG_IMG_START)]')
645+
646+KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
647+ $$[$(CONFIG_SDRAM_BASE) + \
648+ $(CONFIG_IMG_START)]')
649+
650+quiet_cmd_uimage = UIMAGE $@
651+ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A m68k -O linux -T kernel \
652+ -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
653+ -n 'Linux-$(KERNELRELEASE)' -d $< $@
654+
655+$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
656+ $(call if_changed,uimage)
657+ @echo ' Image $@ is ready'
658+
659+$(obj)/vmlinux.bin: vmlinux FORCE
660+ $(call if_changed,objcopy)
661+
662+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
663+ $(call if_changed,gzip)
664+
665+OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
666+$(obj)/vmlinux.srec: $(obj)/vmlinux.bin
667+ $(call if_changed,objcopy)
668+
669+OBJCOPYFLAGS_uImage.srec := -I binary -O srec
670+$(obj)/uImage.srec: $(obj)/uImage
671+ $(call if_changed,objcopy)
672+
673+clean-files += uImage uImage.srec \
674+ zImage zImage.srec \
675+ vmlinux.srec vmlinux.bin vmlinux.bin.gz
676--- /dev/null
677+++ b/arch/m68k/coldfire/Makefile
678@@ -0,0 +1,10 @@
679+#
680+# Makefile for Linux arch/m68k/coldfire source directory
681+#
682+
683+obj-y += common/
684+obj-$(CONFIG_VDSO) += vdso/
685+
686+obj-$(CONFIG_M5445X) += m5445x/
687+obj-$(CONFIG_M547X_8X) += m547x/
688+obj-$(CONFIG_M5441X) += m5441x/
689--- /dev/null
690+++ b/arch/m68k/coldfire/common/Makefile
691@@ -0,0 +1,7 @@
692+#
693+# Makefile for Linux arch/m68k/coldfire/common source directory
694+#
695+
696+obj-y:= entry.o cache.o signal.o muldi3.o traps.o ints.o clk.o
697+extra-y:= head.o
698+
699--- /dev/null
700+++ b/arch/m68k/coldfire/common/cache.c
701@@ -0,0 +1,45 @@
702+/*
703+ * linux/arch/m68k/coldfire/cache.c
704+ *
705+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
706+ * Matt Waddel Matt.Waddel@freescale.com
707+ * Kurt Mahan kmahan@freescale.com
708+ * Jason Jin Jason.Jin@freescale.com
709+ * Shrek Wu B16972@freescale.com
710+ *
711+ * This program is free software; you can redistribute it and/or modify
712+ * it under the terms of the GNU General Public License as published by
713+ * the Free Software Foundation; either version 2 of the License, or
714+ * (at your option) any later version.
715+ */
716+
717+#include <linux/interrupt.h>
718+#include <asm/cfcache.h>
719+#include <asm/coldfire.h>
720+#include <asm/system.h>
721+
722+/* Cache Control Reg shadow reg */
723+unsigned long shadow_cacr;
724+
725+/**
726+ * cacr_set - Set the Cache Control Register
727+ * @x Value to set
728+ */
729+void cacr_set(unsigned long x)
730+{
731+ shadow_cacr = x;
732+
733+ __asm__ __volatile__ ("movec %0, %%cacr"
734+ : /* no outputs */
735+ : "r" (shadow_cacr));
736+}
737+
738+/**
739+ * cacr_get - Get the current value of the Cache Control Register
740+ *
741+ * @return CACR value
742+ */
743+unsigned long cacr_get(void)
744+{
745+ return shadow_cacr;
746+}
747--- /dev/null
748+++ b/arch/m68k/coldfire/common/clk.c
749@@ -0,0 +1,51 @@
750+/***************************************************************************/
751+
752+/*
753+ * clk.c -- general ColdFire CPU kernel clk handling
754+ *
755+ * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
756+ * Copyright (C) 2011 Freescale Semiconductore, Inc. All Rights Reserved.
757+ *
758+ * This program is free software; you can redistribute it and/or modify
759+ * it under the terms of the GNU General Public License as published by
760+ * the Free Software Foundation; either version 2 of the License, or
761+ * (at your option) any later version.
762+*/
763+
764+/***************************************************************************/
765+
766+#include <linux/kernel.h>
767+#include <linux/module.h>
768+#include <linux/clk.h>
769+#include <asm/coldfire.h>
770+
771+/***************************************************************************/
772+
773+struct clk *clk_get(struct device *dev, const char *id)
774+{
775+ return NULL;
776+}
777+EXPORT_SYMBOL(clk_get);
778+
779+int clk_enable(struct clk *clk)
780+{
781+ return 0;
782+}
783+EXPORT_SYMBOL(clk_enable);
784+
785+void clk_disable(struct clk *clk)
786+{
787+}
788+EXPORT_SYMBOL(clk_disable);
789+
790+void clk_put(struct clk *clk)
791+{
792+}
793+EXPORT_SYMBOL(clk_put);
794+
795+unsigned long clk_get_rate(struct clk *clk)
796+{
797+ return MCF_CLK;
798+}
799+EXPORT_SYMBOL(clk_get_rate);
800+/***************************************************************************/
801--- /dev/null
802+++ b/arch/m68k/coldfire/common/entry.S
803@@ -0,0 +1,745 @@
804+/*
805+ * arch/m68k/coldfire/entry.S
806+ *
807+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
808+ * Matt Waddel Matt.Waddel@freescale.com
809+ * Kurt Mahan kmahan@freescale.com
810+ * Jason Jin Jason.Jin@freescale.com
811+ * Shrek Wu B16972@freescale.com
812+ *
813+ * Based on:
814+ *
815+ * arch/m68knommu/platform/5307/entry.S &
816+ * arch/m68k/kernel/entry.S
817+ *
818+ * This file is subject to the terms and conditions of the GNU General Public
819+ * License. See the file README.legal in the main directory of this archive
820+ * for more details.
821+ */
822+
823+#include <linux/sys.h>
824+#include <linux/linkage.h>
825+#include <asm/cf_entry.h>
826+#include <asm/errno.h>
827+#include <asm/setup.h>
828+#include <asm/segment.h>
829+#include <asm/traps.h>
830+#include <asm/unistd.h>
831+#include <asm/asm-offsets.h>
832+
833+/*
834+ * TASK_INFO:
835+ *
836+ * - TINFO_PREEMPT (struct thread_info / preempt_count)
837+ * Used to keep track of preemptability
838+ * - TINFO_FLAGS (struct thread_info / flags - include/asm-m68k/thread_info.h)
839+ * Various bit flags that are checked for scheduling/tracing
840+ * Bits 0-7 are checked every exception exit
841+ * 8-15 are checked every syscall exit
842+ *
843+ * TIF_SIGPENDING 6
844+ * TIF_NEED_RESCHED 7
845+ * TIF_DELAYED_TRACE 14
846+ * TIF_SYSCALL_TRACE 15
847+ * TIF_MEMDIE 16 (never checked here)
848+ */
849+
850+.bss
851+
852+sw_ksp:
853+.long 0
854+
855+sw_usp:
856+.long 0
857+
858+.text
859+
860+.globl system_call
861+.globl buserr
862+.globl trap
863+.globl resume
864+.globl ret_from_exception
865+.globl ret_from_signal
866+.globl sys_call_table
867+.globl ret_from_interrupt
868+.globl inthandler
869+
870+ENTRY(buserr)
871+#ifdef CONFIG_COLDFIRE_FOO
872+ movew #0x2700,%sr /* lock interrupts */
873+#endif
874+ SAVE_ALL_INT
875+#ifdef CONFIG_COLDFIRE_FOO
876+ movew PT_0FF_SR(%sp),%d3 /* get original %sr */
877+ oril #0x2000,%d3 /* set supervisor mode in it */
878+ movew %d3,%sr /* recover irq state */
879+#endif
880+ GET_CURRENT(%d0)
881+ movel %sp,%sp@- /* stack frame pointer argument */
882+ jsr buserr_c
883+ addql #4,%sp
884+ jra .Lret_from_exception
885+
886+ENTRY(trap)
887+ SAVE_ALL_INT
888+ GET_CURRENT(%d0)
889+ movel %sp,%sp@- /* stack frame pointer argument */
890+ jsr trap_c
891+ addql #4,%sp
892+ jra .Lret_from_exception
893+
894+ /* After a fork we jump here directly from resume,
895+ %d1 contains the previous task schedule_tail */
896+ENTRY(ret_from_fork)
897+ movel %d1,%sp@-
898+ jsr schedule_tail
899+ addql #4,%sp
900+ jra .Lret_from_exception
901+
902+do_trace_entry:
903+ movel #-ENOSYS,%d1 /* needed for strace */
904+ movel %d1,%sp@(PT_OFF_D0)
905+ subql #4,%sp
906+ SAVE_SWITCH_STACK
907+ jbsr syscall_trace
908+ RESTORE_SWITCH_STACK
909+ addql #4,%sp
910+ movel %sp@(PT_OFF_ORIG_D0),%d0
911+ cmpl #NR_syscalls,%d0
912+ jcs syscall
913+badsys:
914+ movel #-ENOSYS,%d1
915+ movel %d1,%sp@(PT_OFF_D0)
916+ jra ret_from_exception
917+
918+do_trace_exit:
919+ subql #4,%sp
920+ SAVE_SWITCH_STACK
921+ jbsr syscall_trace
922+ RESTORE_SWITCH_STACK
923+ addql #4,%sp
924+ jra .Lret_from_exception
925+
926+ENTRY(ret_from_signal)
927+ RESTORE_SWITCH_STACK
928+ addql #4,%sp
929+ jra .Lret_from_exception
930+
931+ENTRY(system_call)
932+ SAVE_ALL_SYS
933+
934+ GET_CURRENT(%d1)
935+ /* save top of frame */
936+ movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
937+
938+ /* syscall trace */
939+ tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
940+ jmi do_trace_entry /* SYSCALL_TRACE is set */
941+ cmpl #NR_syscalls,%d0
942+ jcc badsys
943+syscall:
944+ movel #sys_call_table,%a0
945+ asll #2,%d0
946+ addl %d0,%a0
947+ movel %a0@,%a0
948+ jsr %a0@
949+ movel %d0,%sp@(PT_OFF_D0) /* save the return value */
950+ret_from_syscall:
951+ movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
952+ jne syscall_exit_work /* flags set so process */
953+1: RESTORE_ALL
954+
955+syscall_exit_work:
956+ btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel */
957+ bnes 1b /* if so, skip resched, signals */
958+
959+ btstl #15,%d0 /* check if SYSCALL_TRACE */
960+ jne do_trace_exit
961+ btstl #14,%d0 /* check if DELAYED_TRACE */
962+ jne do_delayed_trace
963+ btstl #6,%d0 /* check if SIGPENDING */
964+ jne do_signal_return
965+ pea resume_userspace
966+ jra schedule
967+
968+ENTRY(ret_from_exception)
969+.Lret_from_exception:
970+ btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel */
971+ bnes 1f /* if so, skip resched, signals */
972+ movel %d0,%sp@- /* Only allow interrupts when we are */
973+ move %sr,%d0 /* last one on the kernel stack, */
974+ andl #ALLOWINT,%d0 /* otherwise stack overflow can occur */
975+ move %d0,%sr /* during heavy interrupt load. */
976+ movel %sp@+,%d0
977+
978+resume_userspace:
979+ moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
980+ jne exit_work /* SIGPENDING and/or NEED_RESCHED set */
981+1: RESTORE_ALL
982+
983+exit_work:
984+ /* save top of frame */
985+ movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
986+ btstl #6,%d0 /* check for SIGPENDING in flags */
987+ jne do_signal_return
988+ pea resume_userspace
989+ jra schedule
990+
991+do_signal_return:
992+ subql #4,%sp /* dummy return address */
993+ SAVE_SWITCH_STACK
994+ pea %sp@(SWITCH_STACK_SIZE)
995+ clrl %sp@-
996+ bsrl do_signal
997+ addql #8,%sp
998+ RESTORE_SWITCH_STACK
999+ addql #4,%sp
1000+ jbra resume_userspace
1001+
1002+do_delayed_trace:
1003+ bclr #7,%sp@(PT_OFF_SR) /* clear trace bit in SR */
1004+ pea 1 /* send SIGTRAP */
1005+ movel %curptr,%sp@-
1006+ pea LSIGTRAP
1007+ jbsr send_sig
1008+ addql #8,%sp
1009+ addql #4,%sp
1010+ jbra resume_userspace
1011+
1012+/*
1013+ * This is the interrupt handler (for all hardware interrupt
1014+ * sources). It figures out the vector number and calls the appropriate
1015+ * interrupt service routine directly.
1016+ */
1017+ENTRY(inthandler)
1018+ SAVE_ALL_INT
1019+ GET_CURRENT(%d0)
1020+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1021+ addil #0x10000,%d0
1022+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1023+ /* put exception # in d0 */
1024+ movel %sp@(PT_VECTOR),%d0
1025+ swap %d0 /* extract bits 25:18 */
1026+ lsrl #2,%d0
1027+ andl #0x0ff,%d0
1028+
1029+ movel %sp,%sp@-
1030+ movel %d0,%sp@- /* put vector # on stack */
1031+auto_irqhandler_fixup = . + 2
1032+ jbsr process_int /* process the IRQ */
1033+ addql #8,%sp /* pop parameters off stack */
1034+
1035+ret_from_interrupt:
1036+
1037+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1038+ subil #0x10000,%d0
1039+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1040+ jeq ret_from_last_interrupt
1041+2: RESTORE_ALL
1042+
1043+ ALIGN
1044+ret_from_last_interrupt:
1045+ moveb %sp@(PT_OFF_SR),%d0
1046+ andl #(~ALLOWINT>>8)&0xff,%d0
1047+ jne 2b
1048+
1049+ /* check if we need to do software interrupts */
1050+ tstl irq_stat+CPUSTAT_SOFTIRQ_PENDING
1051+ jeq .Lret_from_exception
1052+ pea ret_from_exception
1053+ jra do_softirq
1054+
1055+ENTRY(user_inthandler)
1056+ SAVE_ALL_INT
1057+ GET_CURRENT(%d0)
1058+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1059+ addil #0x10000,%d0
1060+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1061+ /* put exception # in d0 */
1062+ movel %sp@(PT_VECTOR),%d0
1063+user_irqvec_fixup = . + 2
1064+ swap %d0 /* extract bits 25:18 */
1065+ lsrl #2,%d0
1066+ andl #0x0ff,%d0
1067+
1068+ movel %sp,%sp@-
1069+ movel %d0,%sp@- /* put vector # on stack */
1070+user_irqhandler_fixup = . + 2
1071+ jbsr process_int /* process the IRQ */
1072+ addql #8,%sp /* pop parameters off stack */
1073+
1074+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1075+ subil #0x10000,%d0
1076+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1077+ jeq ret_from_last_interrupt
1078+ RESTORE_ALL
1079+
1080+/* Handler for uninitialized and spurious interrupts */
1081+
1082+ENTRY(bad_inthandler)
1083+ SAVE_ALL_INT
1084+ GET_CURRENT(%d0)
1085+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1086+ addil #0x10000,%d0
1087+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1088+
1089+ movel %sp,%sp@-
1090+ jsr handle_badint
1091+ addql #4,%sp
1092+
1093+ movel %curptr@(TASK_INFO+TINFO_PREEMPT),%d0
1094+ subil #0x10000,%d0
1095+ movel %d0,%curptr@(TASK_INFO+TINFO_PREEMPT)
1096+ jeq ret_from_last_interrupt
1097+ RESTORE_ALL
1098+
1099+ENTRY(sys_fork)
1100+ SAVE_SWITCH_STACK
1101+ pea %sp@(SWITCH_STACK_SIZE)
1102+ jbsr m68k_fork
1103+ addql #4,%sp
1104+ RESTORE_SWITCH_STACK
1105+ rts
1106+
1107+ENTRY(sys_clone)
1108+ SAVE_SWITCH_STACK
1109+ pea %sp@(SWITCH_STACK_SIZE)
1110+ jbsr m68k_clone
1111+ addql #4,%sp
1112+ RESTORE_SWITCH_STACK
1113+ rts
1114+
1115+ENTRY(sys_vfork)
1116+ SAVE_SWITCH_STACK
1117+ pea %sp@(SWITCH_STACK_SIZE)
1118+ jbsr m68k_vfork
1119+ addql #4,%sp
1120+ RESTORE_SWITCH_STACK
1121+ rts
1122+
1123+ENTRY(sys_sigsuspend)
1124+ SAVE_SWITCH_STACK
1125+ pea %sp@(SWITCH_STACK_SIZE)
1126+ jbsr do_sigsuspend
1127+ addql #4,%sp
1128+ RESTORE_SWITCH_STACK
1129+ rts
1130+
1131+ENTRY(sys_sigreturn)
1132+ SAVE_SWITCH_STACK
1133+ jbsr do_sigreturn
1134+ RESTORE_SWITCH_STACK
1135+ rts
1136+
1137+ENTRY(sys_rt_sigreturn)
1138+ SAVE_SWITCH_STACK
1139+ jbsr do_rt_sigreturn
1140+ RESTORE_SWITCH_STACK
1141+ rts
1142+
1143+resume:
1144+ /*
1145+ * Beware - when entering resume, prev (the current task) is
1146+ * in a0, next (the new task) is in a1,so don't change these
1147+ * registers until their contents are no longer needed.
1148+ */
1149+
1150+ /* save sr */
1151+ movew %sr,%d0
1152+ movew %d0,%a0@(TASK_THREAD+THREAD_SR)
1153+
1154+ /* save usp */
1155+ /* Save USP via %a1 (which is saved/restored from %d0) */
1156+ movel %a1,%d0
1157+ movel %usp,%a1
1158+ movel %a1,%a0@(TASK_THREAD+THREAD_USP)
1159+ movel %d0,%a1
1160+
1161+ /* save non-scratch registers on stack */
1162+ SAVE_SWITCH_STACK
1163+
1164+ /* save current kernel stack pointer */
1165+ movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
1166+#ifdef CONFIG_FPU
1167+ /* save floating point context */
1168+ fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
1169+
1170+1: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
1171+ jeq 3f
1172+2:
1173+ fmovemd %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
1174+3:
1175+#endif
1176+ /* Return previous task in %d1 */
1177+ movel %curptr,%d1
1178+
1179+ /* switch to new task (a1 contains new task) */
1180+ movel %a1,%curptr
1181+#ifdef CONFIG_FPU
1182+ /* restore floating point context */
1183+1: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
1184+ jeq 3f
1185+2:
1186+ fmovemd %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
1187+/* frestore %a1@(TASK_THREAD+THREAD_FPCNTL)*/
1188+3: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
1189+#endif
1190+ /* restore the kernel stack pointer */
1191+ movel %a1@(TASK_THREAD+THREAD_KSP),%sp
1192+
1193+ /* restore non-scratch registers */
1194+ RESTORE_SWITCH_STACK
1195+
1196+ /* restore user stack pointer */
1197+ movel %a1@(TASK_THREAD+THREAD_USP),%a0
1198+ movel %a0,%usp
1199+
1200+ /* restore status register */
1201+ movew %a1@(TASK_THREAD+THREAD_SR),%d0
1202+ movew %d0,%sr
1203+
1204+ rts
1205+
1206+.data
1207+ALIGN
1208+sys_call_table:
1209+ .long sys_ni_syscall /* 0 - old "setup()" system call*/
1210+ .long sys_exit
1211+ .long sys_fork
1212+ .long sys_read
1213+ .long sys_write
1214+ .long sys_open /* 5 */
1215+ .long sys_close
1216+ .long sys_waitpid
1217+ .long sys_creat
1218+ .long sys_link
1219+ .long sys_unlink /* 10 */
1220+ .long sys_execve
1221+ .long sys_chdir
1222+ .long sys_time
1223+ .long sys_mknod
1224+ .long sys_chmod /* 15 */
1225+ .long sys_chown16
1226+ .long sys_ni_syscall /* old break syscall holder */
1227+ .long sys_stat
1228+ .long sys_lseek
1229+ .long sys_getpid /* 20 */
1230+ .long sys_mount
1231+ .long sys_oldumount
1232+ .long sys_setuid16
1233+ .long sys_getuid16
1234+ .long sys_stime /* 25 */
1235+ .long sys_ptrace
1236+ .long sys_alarm
1237+ .long sys_fstat
1238+ .long sys_pause
1239+ .long sys_utime /* 30 */
1240+ .long sys_ni_syscall /* old stty syscall holder */
1241+ .long sys_ni_syscall /* old gtty syscall holder */
1242+ .long sys_access
1243+ .long sys_nice
1244+ .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
1245+ .long sys_sync
1246+ .long sys_kill
1247+ .long sys_rename
1248+ .long sys_mkdir
1249+ .long sys_rmdir /* 40 */
1250+ .long sys_dup
1251+ .long sys_pipe
1252+ .long sys_times
1253+ .long sys_ni_syscall /* old prof syscall holder */
1254+ .long sys_brk /* 45 */
1255+ .long sys_setgid16
1256+ .long sys_getgid16
1257+ .long sys_signal
1258+ .long sys_geteuid16
1259+ .long sys_getegid16 /* 50 */
1260+ .long sys_acct
1261+ .long sys_umount /* recycled never used phys() */
1262+ .long sys_ni_syscall /* old lock syscall holder */
1263+ .long sys_ioctl
1264+ .long sys_fcntl /* 55 */
1265+ .long sys_ni_syscall /* old mpx syscall holder */
1266+ .long sys_setpgid
1267+ .long sys_ni_syscall /* old ulimit syscall holder */
1268+ .long sys_ni_syscall
1269+ .long sys_umask /* 60 */
1270+ .long sys_chroot
1271+ .long sys_ustat
1272+ .long sys_dup2
1273+ .long sys_getppid
1274+ .long sys_getpgrp /* 65 */
1275+ .long sys_setsid
1276+ .long sys_sigaction
1277+ .long sys_sgetmask
1278+ .long sys_ssetmask
1279+ .long sys_setreuid16 /* 70 */
1280+ .long sys_setregid16
1281+ .long sys_sigsuspend
1282+ .long sys_sigpending
1283+ .long sys_sethostname
1284+ .long sys_setrlimit /* 75 */
1285+ .long sys_old_getrlimit
1286+ .long sys_getrusage
1287+ .long sys_gettimeofday
1288+ .long sys_settimeofday
1289+ .long sys_getgroups16 /* 80 */
1290+ .long sys_setgroups16
1291+ .long old_select
1292+ .long sys_symlink
1293+ .long sys_lstat
1294+ .long sys_readlink /* 85 */
1295+ .long sys_uselib
1296+ .long sys_swapon
1297+ .long sys_reboot
1298+ .long sys_old_readdir
1299+ .long old_mmap /* 90 */
1300+ .long sys_munmap
1301+ .long sys_truncate
1302+ .long sys_ftruncate
1303+ .long sys_fchmod
1304+ .long sys_fchown16 /* 95 */
1305+ .long sys_getpriority
1306+ .long sys_setpriority
1307+ .long sys_ni_syscall /* old profil syscall holder */
1308+ .long sys_statfs
1309+ .long sys_fstatfs /* 100 */
1310+ .long sys_ni_syscall /* ioperm for i386 */
1311+ .long sys_socketcall
1312+ .long sys_syslog
1313+ .long sys_setitimer
1314+ .long sys_getitimer /* 105 */
1315+ .long sys_newstat
1316+ .long sys_newlstat
1317+ .long sys_newfstat
1318+ .long sys_ni_syscall
1319+ .long sys_ni_syscall /* 110 */ /* iopl for i386 */
1320+ .long sys_vhangup
1321+ .long sys_ni_syscall /* obsolete idle() syscall */
1322+ .long sys_ni_syscall /* vm86old for i386 */
1323+ .long sys_wait4
1324+ .long sys_swapoff /* 115 */
1325+ .long sys_sysinfo
1326+ .long sys_ipc
1327+ .long sys_fsync
1328+ .long sys_sigreturn
1329+ .long sys_clone /* 120 */
1330+ .long sys_setdomainname
1331+ .long sys_newuname
1332+ .long sys_cacheflush /* modify_ldt for i386 */
1333+ .long sys_adjtimex
1334+ .long sys_mprotect /* 125 */
1335+ .long sys_sigprocmask
1336+ .long sys_ni_syscall /* old "create_module" */
1337+ .long sys_init_module
1338+ .long sys_delete_module
1339+ .long sys_ni_syscall /* 130 - old "get_kernel_syms" */
1340+ .long sys_quotactl
1341+ .long sys_getpgid
1342+ .long sys_fchdir
1343+ .long sys_bdflush
1344+ .long sys_sysfs /* 135 */
1345+ .long sys_personality
1346+ .long sys_ni_syscall /* for afs_syscall */
1347+ .long sys_setfsuid16
1348+ .long sys_setfsgid16
1349+ .long sys_llseek /* 140 */
1350+ .long sys_getdents
1351+ .long sys_select
1352+ .long sys_flock
1353+ .long sys_msync
1354+ .long sys_readv /* 145 */
1355+ .long sys_writev
1356+ .long sys_getsid
1357+ .long sys_fdatasync
1358+ .long sys_sysctl
1359+ .long sys_mlock /* 150 */
1360+ .long sys_munlock
1361+ .long sys_mlockall
1362+ .long sys_munlockall
1363+ .long sys_sched_setparam
1364+ .long sys_sched_getparam /* 155 */
1365+ .long sys_sched_setscheduler
1366+ .long sys_sched_getscheduler
1367+ .long sys_sched_yield
1368+ .long sys_sched_get_priority_max
1369+ .long sys_sched_get_priority_min /* 160 */
1370+ .long sys_sched_rr_get_interval
1371+ .long sys_nanosleep
1372+ .long sys_mremap
1373+ .long sys_setresuid16
1374+ .long sys_getresuid16 /* 165 */
1375+ .long sys_getpagesize
1376+ .long sys_ni_syscall /* old sys_query_module */
1377+ .long sys_poll
1378+ .long sys_nfsservctl
1379+ .long sys_setresgid16 /* 170 */
1380+ .long sys_getresgid16
1381+ .long sys_prctl
1382+ .long sys_rt_sigreturn
1383+ .long sys_rt_sigaction
1384+ .long sys_rt_sigprocmask /* 175 */
1385+ .long sys_rt_sigpending
1386+ .long sys_rt_sigtimedwait
1387+ .long sys_rt_sigqueueinfo
1388+ .long sys_rt_sigsuspend
1389+ .long sys_pread64 /* 180 */
1390+ .long sys_pwrite64
1391+ .long sys_lchown16;
1392+ .long sys_getcwd
1393+ .long sys_capget
1394+ .long sys_capset /* 185 */
1395+ .long sys_sigaltstack
1396+ .long sys_sendfile
1397+ .long sys_ni_syscall /* streams1 */
1398+ .long sys_ni_syscall /* streams2 */
1399+ .long sys_vfork /* 190 */
1400+ .long sys_getrlimit
1401+ .long sys_mmap2
1402+ .long sys_truncate64
1403+ .long sys_ftruncate64
1404+ .long sys_stat64 /* 195 */
1405+ .long sys_lstat64
1406+ .long sys_fstat64
1407+ .long sys_chown
1408+ .long sys_getuid
1409+ .long sys_getgid /* 200 */
1410+ .long sys_geteuid
1411+ .long sys_getegid
1412+ .long sys_setreuid
1413+ .long sys_setregid
1414+ .long sys_getgroups /* 205 */
1415+ .long sys_setgroups
1416+ .long sys_fchown
1417+ .long sys_setresuid
1418+ .long sys_getresuid
1419+ .long sys_setresgid /* 210 */
1420+ .long sys_getresgid
1421+ .long sys_lchown
1422+ .long sys_setuid
1423+ .long sys_setgid
1424+ .long sys_setfsuid /* 215 */
1425+ .long sys_setfsgid
1426+ .long sys_pivot_root
1427+ .long sys_ni_syscall
1428+ .long sys_ni_syscall
1429+ .long sys_getdents64 /* 220 */
1430+ .long sys_gettid
1431+ .long sys_tkill
1432+ .long sys_setxattr
1433+ .long sys_lsetxattr
1434+ .long sys_fsetxattr /* 225 */
1435+ .long sys_getxattr
1436+ .long sys_lgetxattr
1437+ .long sys_fgetxattr
1438+ .long sys_listxattr
1439+ .long sys_llistxattr /* 230 */
1440+ .long sys_flistxattr
1441+ .long sys_removexattr
1442+ .long sys_lremovexattr
1443+ .long sys_fremovexattr
1444+ .long sys_futex /* 235 */
1445+ .long sys_sendfile64
1446+ .long sys_mincore
1447+ .long sys_madvise
1448+ .long sys_fcntl64
1449+ .long sys_readahead /* 240 */
1450+ .long sys_io_setup
1451+ .long sys_io_destroy
1452+ .long sys_io_getevents
1453+ .long sys_io_submit
1454+ .long sys_io_cancel /* 245 */
1455+ .long sys_fadvise64
1456+ .long sys_exit_group
1457+ .long sys_lookup_dcookie
1458+ .long sys_epoll_create
1459+ .long sys_epoll_ctl /* 250 */
1460+ .long sys_epoll_wait
1461+ .long sys_remap_file_pages
1462+ .long sys_set_tid_address
1463+ .long sys_timer_create
1464+ .long sys_timer_settime /* 255 */
1465+ .long sys_timer_gettime
1466+ .long sys_timer_getoverrun
1467+ .long sys_timer_delete
1468+ .long sys_clock_settime
1469+ .long sys_clock_gettime /* 260 */
1470+ .long sys_clock_getres
1471+ .long sys_clock_nanosleep
1472+ .long sys_statfs64
1473+ .long sys_fstatfs64
1474+ .long sys_tgkill /* 265 */
1475+ .long sys_utimes
1476+ .long sys_fadvise64_64
1477+ .long sys_mbind
1478+ .long sys_get_mempolicy
1479+ .long sys_set_mempolicy /* 270 */
1480+ .long sys_mq_open
1481+ .long sys_mq_unlink
1482+ .long sys_mq_timedsend
1483+ .long sys_mq_timedreceive
1484+ .long sys_mq_notify /* 275 */
1485+ .long sys_mq_getsetattr
1486+ .long sys_waitid
1487+ .long sys_ni_syscall /* for sys_vserver */
1488+ .long sys_add_key
1489+ .long sys_request_key /* 280 */
1490+ .long sys_keyctl
1491+ .long sys_ioprio_set
1492+ .long sys_ioprio_get
1493+ .long sys_inotify_init
1494+ .long sys_inotify_add_watch /* 285 */
1495+ .long sys_inotify_rm_watch
1496+ .long sys_migrate_pages
1497+ .long sys_openat
1498+ .long sys_mkdirat
1499+ .long sys_mknodat /* 290 */
1500+ .long sys_fchownat
1501+ .long sys_futimesat
1502+ .long sys_fstatat64
1503+ .long sys_unlinkat
1504+ .long sys_renameat /* 295 */
1505+ .long sys_linkat
1506+ .long sys_symlinkat
1507+ .long sys_readlinkat
1508+ .long sys_fchmodat
1509+ .long sys_faccessat /* 300 */
1510+ .long sys_ni_syscall /* Reserved for pselect6 */
1511+ .long sys_ni_syscall /* Reserved for ppoll */
1512+ .long sys_unshare
1513+ .long sys_set_robust_list
1514+ .long sys_get_robust_list /* 305 */
1515+ .long sys_splice
1516+ .long sys_sync_file_range
1517+ .long sys_tee
1518+ .long sys_vmsplice
1519+ .long sys_move_pages /* 310 */
1520+ .long sys_sched_setaffinity
1521+ .long sys_sched_getaffinity
1522+ .long sys_kexec_load
1523+ .long sys_getcpu
1524+ .long sys_epoll_pwait /* 315 */
1525+ .long sys_utimensat
1526+ .long sys_signalfd
1527+ .long sys_timerfd_create
1528+ .long sys_eventfd
1529+ .long sys_fallocate /* 320 */
1530+ .long sys_timerfd_settime
1531+ .long sys_timerfd_gettime
1532+ .long sys_signalfd4
1533+ .long sys_eventfd2
1534+ .long sys_epoll_create1 /* 325 */
1535+ .long sys_dup3
1536+ .long sys_pipe2
1537+ .long sys_inotify_init1
1538+ .long sys_preadv
1539+ .long sys_pwritev /* 330 */
1540+ .long sys_rt_tgsigqueueinfo
1541+ .long sys_perf_event_open
1542+ .long sys_get_thread_area
1543+ .long sys_set_thread_area
1544+ .long sys_atomic_cmpxchg_32 /* 335 */
1545+ .long sys_atomic_barrier
1546+ .long sys_fanotify_init
1547+ .long sys_fanotify_mark
1548+ .long sys_prlimit64
1549--- /dev/null
1550+++ b/arch/m68k/coldfire/common/head.S
1551@@ -0,0 +1,466 @@
1552+/*
1553+ * head.S is the MMU enabled ColdFire specific initial boot code
1554+ *
1555+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
1556+ * Matt Waddel Matt.Waddel@freescale.com
1557+ * Kurt Mahan kmahan@freescale.com
1558+ * Jason Jin Jason.Jin@freescale.com
1559+ * Shrek Wu B16972@freescale.com
1560+ *
1561+ * This program is free software; you can redistribute it and/or modify
1562+ * it under the terms of the GNU General Public License as published by
1563+ * the Free Software Foundation; either version 2 of the License, or
1564+ * (at your option) any later version.
1565+ *
1566+ * Parts of this code came from arch/m68k/kernel/head.S
1567+ */
1568+#include <linux/linkage.h>
1569+#include <linux/init.h>
1570+#include <asm/bootinfo.h>
1571+#include <asm/setup.h>
1572+#include <asm/entry.h>
1573+#include <asm/pgtable.h>
1574+#include <asm/page.h>
1575+#include <asm/coldfire.h>
1576+#include <asm/cfcache.h>
1577+
1578+#define DEBUG
1579+
1580+.globl kernel_pg_dir
1581+.globl availmem
1582+.globl set_context
1583+.globl set_fpga
1584+
1585+#ifdef DEBUG
1586+/* When debugging use readable names for labels */
1587+#ifdef __STDC__
1588+#define L(name) .head.S.##name
1589+#else
1590+#define L(name) .head.S./**/name
1591+#endif
1592+#else
1593+#ifdef __STDC__
1594+#define L(name) .L##name
1595+#else
1596+#define L(name) .L/**/name
1597+#endif
1598+#endif
1599+
1600+/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
1601+#ifndef __INITDATA
1602+#define __INITDATA .data
1603+#define __FINIT .previous
1604+#endif
1605+
1606+/*
1607+ * Kernel mapped to physical ram address.
1608+ *
1609+ * M5445x:
1610+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
1611+ * Data[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
1612+ * Code[0]: Not Mapped
1613+ * Code[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
1614+ *
1615+ * M547x/M548x
1616+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
1617+ * Data[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - uncached
1618+ * Code[0]: Not Mapped
1619+ * Code[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - cached
1620+ *
1621+ * M5441X:
1622+ * Data[0]: 0xE0000000 -> 0xFFFFFFFF System regs
1623+ * Data[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
1624+ * Code[0]: Not Mapped
1625+ * Code[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
1626+ */
1627+#if defined(CONFIG_M5445X)
1628+#define ACR0_DEFAULT #0xF00FA048 /* System Regs uncached/precise */
1629+#define ACR1_DEFAULT #0x400FA028 /* SDRAM cached/copyback */
1630+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
1631+#define ACR3_DEFAULT #0x400FA028 /* SDRAM cached/copyback */
1632+#elif defined(CONFIG_M547X_8X)
1633+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
1634+#define ACR1_DEFAULT #0x000FA028 /* SDRAM cached/copy-back */
1635+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
1636+#define ACR3_DEFAULT #0x000FA028 /* Instruction cached/copy-back */
1637+#elif defined(CONFIG_M5441X)
1638+#define ACR0_DEFAULT #0xE01FA048 /* System Regs */
1639+#define ACR1_DEFAULT #0x400FA028 /* SDRAM cached/copyback */
1640+#define ACR4_DEFAULT #0x00000000 /* Not mapped */
1641+#define ACR5_DEFAULT #0x00000000 /* Not mapped */
1642+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
1643+#define ACR3_DEFAULT #0x400FA028 /* Instruction cached/copy-back */
1644+#define ACR6_DEFAULT #0x00000000 /* Not mapped */
1645+#define ACR7_DEFAULT #0x00000000 /* Not mapped */
1646+#endif
1647+
1648+/* ACR mapping for FPGA (maps 0) */
1649+#define ACR0_FPGA #0x000FA048 /* ACR0 enable FPGA */
1650+
1651+/* Several macros to make the writing of subroutines easier:
1652+ * - func_start marks the beginning of the routine which setups the frame
1653+ * register and saves the registers, it also defines another macro
1654+ * to automatically restore the registers again.
1655+ * - func_return marks the end of the routine and simply calls the prepared
1656+ * macro to restore registers and jump back to the caller.
1657+ * - func_define generates another macro to automatically put arguments
1658+ * onto the stack call the subroutine and cleanup the stack again.
1659+ */
1660+
1661+.macro load_symbol_address symbol,register
1662+ movel #\symbol,\register
1663+.endm
1664+
1665+.macro func_start name,saveregs,savesize,stack=0
1666+L(\name):
1667+ linkw %a6,#-\stack
1668+ subal #(\savesize),%sp
1669+ moveml \saveregs,%sp@
1670+.set stackstart,-\stack
1671+
1672+.macro func_return_\name
1673+ moveml %sp@,\saveregs
1674+ addal #(\savesize),%sp
1675+ unlk %a6
1676+ rts
1677+.endm
1678+.endm
1679+
1680+.macro func_return name
1681+ func_return_\name
1682+.endm
1683+
1684+.macro func_call name
1685+ jbsr L(\name)
1686+.endm
1687+
1688+.macro move_stack nr,arg1,arg2,arg3,arg4
1689+.if \nr
1690+ move_stack "(\nr-1)",\arg2,\arg3,\arg4
1691+ movel \arg1,%sp@-
1692+.endif
1693+.endm
1694+
1695+.macro func_define name,nr=0
1696+.macro \name arg1,arg2,arg3,arg4
1697+ move_stack \nr,\arg1,\arg2,\arg3,\arg4
1698+ func_call \name
1699+.if \nr
1700+ lea %sp@(\nr*4),%sp
1701+.endif
1702+.endm
1703+.endm
1704+
1705+func_define serial_putc,1
1706+
1707+.macro putc ch
1708+ pea \ch
1709+ func_call serial_putc
1710+ addql #4,%sp
1711+.endm
1712+
1713+.macro dputc ch
1714+#ifdef DEBUG
1715+ putc \ch
1716+#endif
1717+.endm
1718+
1719+func_define putn,1
1720+
1721+.macro dputn nr
1722+#ifdef DEBUG
1723+ putn \nr
1724+#endif
1725+.endm
1726+
1727+/*
1728+ mmu_map - creates a new TLB entry
1729+
1730+ virt_addr Must be on proper boundary
1731+ phys_addr Must be on proper boundary
1732+ itlb MMUOR_ITLB if instruction TLB or 0
1733+ asid address space ID
1734+ shared_global MMUTR_SG if shared between different ASIDs or 0
1735+ size_code MMUDR_SZ1M 1 MB
1736+ MMUDR_SZ4K 4 KB
1737+ MMUDR_SZ8K 8 KB
1738+ MMUDR_SZ16M 16 MB
1739+ cache_mode MMUDR_INC instruction non-cacheable
1740+ MMUDR_IC instruction cacheable
1741+ MMUDR_DWT data writethrough
1742+ MMUDR_DCB data copyback
1743+ MMUDR_DNCP data non-cacheable, precise
1744+ MMUDR_DNCIP data non-cacheable, imprecise
1745+ super_prot MMUDR_SP if user mode generates exception or 0
1746+ readable MMUDR_R if permits read access (data TLB) or 0
1747+ writable MMUDR_W if permits write access (data TLB) or 0
1748+ executable MMUDR_X if permits execute access (instruction TLB) or 0
1749+ locked MMUDR_LK prevents TLB entry from being replaced or 0
1750+ temp_data_reg a data register to use for temporary values
1751+*/
1752+.macro mmu_map virt_addr,phys_addr,itlb,asid,shared_global,size_code, \
1753+ cache_mode,super_prot,readable,writable,executable,locked,temp_data_reg
1754+ /* Set up search of TLB. */
1755+ movel #(\virt_addr+1), \temp_data_reg
1756+ movel \temp_data_reg, MMUAR
1757+ /* Search. */
1758+ movel #(MMUOR_STLB + MMUOR_ADR +\itlb), \temp_data_reg
1759+ movew \temp_data_reg, (MMUOR)
1760+ /* Set up tag value. */
1761+ movel #(\virt_addr + \asid + \shared_global + MMUTR_V), \temp_data_reg
1762+ movel \temp_data_reg, MMUTR
1763+ /* Set up data value. */
1764+ movel #(\phys_addr + \size_code + \cache_mode + \super_prot + \
1765+ \readable + \writable + \executable + \locked), \temp_data_reg
1766+ movel \temp_data_reg, MMUDR
1767+ /* Save it. */
1768+ movel #(MMUOR_ACC + MMUOR_UAA + \itlb), \temp_data_reg
1769+ movew \temp_data_reg, (MMUOR)
1770+.endm /* mmu_map */
1771+
1772+.macro mmu_unmap virt_addr,itlb,temp_data_reg
1773+ /* Set up search of TLB. */
1774+ movel #(\virt_addr+1), \temp_data_reg
1775+ movel \temp_data_reg, MMUAR
1776+ /* Search. */
1777+ movel #(MMUOR_STLB + MMUOR_ADR +\itlb), \temp_data_reg
1778+ movew \temp_data_reg, (MMUOR)
1779+ /* Test for hit. */
1780+ movel MMUSR,\temp_data_reg
1781+ btst #MMUSR_HITN,\temp_data_reg
1782+ beq 1f
1783+ /* Read the TLB. */
1784+ movel #(MMUOR_RW + MMUOR_ACC +\itlb), \temp_data_reg
1785+ movew \temp_data_reg, (MMUOR)
1786+ movel MMUSR,\temp_data_reg
1787+ /* Set up tag value. */
1788+ movel #0, \temp_data_reg
1789+ movel \temp_data_reg, MMUTR
1790+ /* Set up data value. */
1791+ movel #0, \temp_data_reg
1792+ movel \temp_data_reg, MMUDR
1793+ /* Save it. */
1794+ movel #(MMUOR_ACC + MMUOR_UAA + \itlb), \temp_data_reg
1795+ movew \temp_data_reg, (MMUOR)
1796+1:
1797+.endm /* mmu_unmap */
1798+
1799+/* .text */
1800+.section ".text.head","ax"
1801+ENTRY(_stext)
1802+/* Version numbers of the bootinfo interface -- if we later pass info
1803+ * from boot ROM we might want to put something real here.
1804+ *
1805+ * The area from _stext to _start will later be used as kernel pointer table
1806+ */
1807+ bras 1f /* Jump over bootinfo version numbers */
1808+
1809+ .long BOOTINFOV_MAGIC
1810+ .long 0
1811+1: jmp __start
1812+
1813+.equ kernel_pg_dir,_stext
1814+.equ .,_stext+0x1000
1815+
1816+ENTRY(_start)
1817+ jra __start
1818+__INIT
1819+ENTRY(__start)
1820+/* Save the location of u-boot info - cmd line, bd_info, etc. */
1821+ movel %a7,%a4 /* Don't use %a4 before cf_early_init */
1822+ addl #0x00000004,%a4 /* offset past top */
1823+ addl #(PAGE_OFFSET-CONFIG_SDRAM_BASE),%a4 /* high mem offset */
1824+
1825+/* Setup initial stack pointer */
1826+ movel #CONFIG_SDRAM_BASE+0x1000,%sp
1827+
1828+/* Setup usp */
1829+ subl %a0,%a0
1830+ movel %a0,%usp
1831+
1832+#if defined(CONFIG_M5445X) || defined(CONFIG_M5441X)
1833+#if defined(CONFIG_SRAM)
1834+ movel #(CONFIG_SRAM_BASE+0x221), %d0
1835+#else
1836+ movel #0x80000000, %d0
1837+#endif
1838+
1839+#ifdef CONFIG_M5441X
1840+ movec %d0, %rambar
1841+#else
1842+ movec %d0, %rambar1
1843+#endif
1844+#elif defined(CONFIG_M547X_8X)
1845+ movel #MCF_MBAR, %d0
1846+ movec %d0, %mbar
1847+ move.l #(MCF_RAMBAR0 + 0x21), %d0
1848+ movec %d0, %rambar0
1849+ move.l #(MCF_RAMBAR1 + 0x21), %d0
1850+ movec %d0, %rambar1
1851+#endif
1852+
1853+ movew #0x2700,%sr
1854+
1855+/* reset cache */
1856+ movel #(CF_CACR_ICINVA + CF_CACR_DCINVA),%d0
1857+ movecl %d0,%cacr
1858+
1859+ movel #(MMU_BASE+1),%d0
1860+ movecl %d0,%mmubar
1861+ movel #MMUOR_CA,%a0 /* Clear tlb entries */
1862+ movew %a0,(MMUOR)
1863+ movel #(MMUOR_CA + MMUOR_ITLB),%a0 /* Use ITLB for searches */
1864+ movew %a0,(MMUOR)
1865+ movel #0,%a0 /* Clear Addr Space User ID */
1866+ movecl %a0,%asid
1867+
1868+/* setup ACRs */
1869+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X) || defined(CONFIG_M5441X)
1870+ movel ACR0_DEFAULT, %d0 /* ACR0 (DATA) setup */
1871+ movec %d0, %acr0
1872+ nop
1873+ movel ACR1_DEFAULT, %d0 /* ACR1 (DATA) setup */
1874+ movec %d0, %acr1
1875+ nop
1876+ movel ACR2_DEFAULT, %d0 /* ACR2 (CODE) setup */
1877+ movec %d0, %acr2
1878+ nop
1879+ movel ACR3_DEFAULT, %d0 /* ACR3 (CODE) setup */
1880+ movec %d0, %acr3
1881+ nop
1882+#endif
1883+ /* Turn on MMU */
1884+ movel #(MMUCR_EN),%a0
1885+ movel %a0,MMUCR
1886+ nop /* This synchs the pipeline after a write to MMUCR */
1887+
1888+ movel #__running_high,%a0 /* Get around PC-relative addressing. */
1889+ jmp %a0@
1890+
1891+ENTRY(__running_high)
1892+ load_symbol_address _stext,%sp
1893+ movel L(memory_start),%a0
1894+ movel %a0,availmem
1895+ load_symbol_address L(phys_kernel_start),%a0
1896+ load_symbol_address _stext,%a1
1897+ subl #_stext,%a1
1898+ addl #PAGE_OFFSET,%a1
1899+ movel %a1,%a0@
1900+
1901+/* zero bss */
1902+ lea _sbss,%a0
1903+ lea _ebss,%a1
1904+ clrl %d0
1905+_loop_bss:
1906+ movel %d0,(%a0)+
1907+ cmpl %a0,%a1
1908+ bne _loop_bss
1909+
1910+/* create dma memory mirror TLB mapping */
1911+#if defined(CONFIG_M5445X) || defined(CONFIG_M5441X)
1912+ mmu_map CONFIG_DMA_BASE, \
1913+ CONFIG_SDRAM_BASE, 0, 0, \
1914+ MMUTR_SG, MMUDR_SZ16M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, MMUDR_W, \
1915+ 0, MMUDR_LK, %d0
1916+#elif defined(CONFIG_M547X_8X)
1917+ mmu_map (CONFIG_DMA_BASE + 0*1024*1024), \
1918+ (CONFIG_SDRAM_BASE + 0*1024*1024), 0, 0, \
1919+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1920+ MMUDR_W, 0, MMUDR_LK, %d0
1921+ mmu_map (CONFIG_DMA_BASE + 1*1024*1024), \
1922+ (CONFIG_SDRAM_BASE + 1*1024*1024), 0, 0, \
1923+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1924+ MMUDR_W, 0, MMUDR_LK, %d0
1925+ mmu_map (CONFIG_DMA_BASE + 2*1024*1024), \
1926+ (CONFIG_SDRAM_BASE + 2*1024*1024), 0, 0, \
1927+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1928+ MMUDR_W, 0, MMUDR_LK, %d0
1929+ mmu_map (CONFIG_DMA_BASE + 3*1024*1024), \
1930+ (CONFIG_SDRAM_BASE + 3*1024*1024), 0, 0, \
1931+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1932+ MMUDR_W, 0, MMUDR_LK, %d0
1933+ mmu_map (CONFIG_DMA_BASE + 4*1024*1024), \
1934+ (CONFIG_SDRAM_BASE + 4*1024*1024), 0, 0, \
1935+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1936+ MMUDR_W, 0, MMUDR_LK, %d0
1937+ mmu_map (CONFIG_DMA_BASE + 5*1024*1024), \
1938+ (CONFIG_SDRAM_BASE + 5*1024*1024), 0, 0, \
1939+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1940+ MMUDR_W, 0, MMUDR_LK, %d0
1941+ mmu_map (CONFIG_DMA_BASE + 6*1024*1024), \
1942+ (CONFIG_SDRAM_BASE + 6*1024*1024), 0, 0, \
1943+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1944+ MMUDR_W, 0, MMUDR_LK, %d0
1945+ mmu_map (CONFIG_DMA_BASE + 7*1024*1024), \
1946+ (CONFIG_SDRAM_BASE + 7*1024*1024), 0, 0, \
1947+ MMUTR_SG, MMUDR_SZ1M, MMUDR_DNCP, MMUDR_SP, MMUDR_R, \
1948+ MMUDR_W, 0, MMUDR_LK, %d0
1949+#endif
1950+
1951+/* Setup initial stack pointer */
1952+ lea init_task,%a2
1953+ lea init_thread_union+THREAD_SIZE,%sp
1954+ subl %a6,%a6 /* clear a6 for gdb */
1955+
1956+#ifdef CONFIG_MCF_USER_HALT
1957+/* Setup debug control reg to allow halts from user space */
1958+ lea wdbg_uhe,%a0
1959+ wdebug (%a0)
1960+#endif
1961+
1962+ movel %a4,uboot_info_stk /* save uboot info to variable */
1963+ jsr cf_early_init
1964+ jmp start_kernel
1965+
1966+.section ".text.head","ax"
1967+set_context:
1968+func_start set_context,%d0,(1*4)
1969+ movel 12(%sp),%d0
1970+ movec %d0,%asid
1971+func_return set_context
1972+
1973+#ifdef CONFIG_M54455
1974+/*
1975+ * set_fpga(addr,val) on the M5445X
1976+ *
1977+ * Map in 0x00000000 -> 0x0fffffff and then do the write.
1978+ */
1979+set_fpga:
1980+ movew %sr,%d1
1981+ movew #0x2700,%sr
1982+ movel ACR0_FPGA, %d0
1983+ movec %d0, %acr0
1984+ nop
1985+ moveal 4(%sp),%a0
1986+ movel 8(%sp),%a0@
1987+ movel ACR0_DEFAULT, %d0
1988+ movec %d0, %acr0
1989+ nop
1990+ movew %d1,%sr
1991+ rts
1992+#endif
1993+
1994+ .data
1995+ .align 4
1996+
1997+availmem:
1998+ .long 0
1999+L(phys_kernel_start):
2000+ .long PAGE_OFFSET
2001+L(kernel_end):
2002+ .long 0
2003+L(memory_start):
2004+ .long PAGE_OFFSET_RAW
2005+
2006+#ifdef CONFIG_MCF_USER_HALT
2007+/*
2008+ * Enable User Halt Enable in the debug control register.
2009+ */
2010+wdbg_uhe:
2011+ .word 0x2c80 /* DR0 */
2012+ .word 0x00b0 /* 31:16 */
2013+ .word 0x0400 /* 15:0 -- enable UHE */
2014+ .word 0x0000 /* unused */
2015+#endif
2016+
2017+
2018--- /dev/null
2019+++ b/arch/m68k/coldfire/common/ints.c
2020@@ -0,0 +1,544 @@
2021+/*
2022+ * linux/arch/m68k/coldfire/ints.c -- General interrupt handling code
2023+ *
2024+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
2025+ * Matt Waddel Matt.Waddel@freescale.com
2026+ * Kurt Mahan kmahan@freescale.com
2027+ * Jason Jin Jason.Jin@freescale.com
2028+ * Shrek Wu B16972@freescale.com
2029+ *
2030+ * Based on:
2031+ * linux/arch/m68k/kernel/ints.c &
2032+ * linux/arch/m68knommu/5307/ints.c
2033+ *
2034+ * This file is subject to the terms and conditions of the GNU General Public
2035+ * License. See the file COPYING in the main directory of this archive
2036+ * for more details.
2037+ */
2038+
2039+#include <linux/module.h>
2040+#include <linux/types.h>
2041+#include <linux/init.h>
2042+#include <linux/sched.h>
2043+#include <linux/kernel_stat.h>
2044+#include <linux/errno.h>
2045+#include <linux/seq_file.h>
2046+#include <linux/interrupt.h>
2047+
2048+#include <asm/system.h>
2049+#include <asm/irq.h>
2050+#include <asm/traps.h>
2051+#include <asm/page.h>
2052+#include <asm/machdep.h>
2053+#include <asm/irq_regs.h>
2054+
2055+#include <asm/mcfsim.h>
2056+
2057+/*
2058+ * IRQ Handler lists.
2059+ */
2060+static struct irq_node *irq_list[SYS_IRQS];
2061+static struct irq_controller *irq_controller[SYS_IRQS];
2062+static int irq_depth[SYS_IRQS];
2063+
2064+#define POOL_SIZE SYS_IRQS
2065+static struct irq_node pool[POOL_SIZE];
2066+static struct irq_node *get_irq_node(void);
2067+
2068+/* The number of spurious interrupts */
2069+unsigned int num_spurious;
2070+asmlinkage void handle_badint(struct pt_regs *regs);
2071+
2072+/*
2073+ * process_int(unsigned long vec, struct pt_regs *fp)
2074+ *
2075+ * Process an interrupt. Called from entry.S.
2076+ */
2077+asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
2078+{
2079+ struct pt_regs *old_regs;
2080+ struct irq_node *node;
2081+ old_regs = set_irq_regs(fp);
2082+ kstat_cpu(0).irqs[vec]++;
2083+
2084+ node = irq_list[vec];
2085+ if (!node)
2086+ handle_badint(fp);
2087+ else {
2088+ do {
2089+ node->handler(vec, node->dev_id);
2090+ node = node->next;
2091+ } while (node);
2092+ }
2093+
2094+ set_irq_regs(old_regs);
2095+}
2096+
2097+/*
2098+ * show_interrupts( struct seq_file *p, void *v)
2099+ *
2100+ * Called to show all the current interrupt information.
2101+ */
2102+int show_interrupts(struct seq_file *p, void *v)
2103+{
2104+ struct irq_controller *contr;
2105+ struct irq_node *node;
2106+ int i = *(loff_t *) v;
2107+
2108+ if ((i < NR_IRQS) && (irq_list[i])) {
2109+ contr = irq_controller[i];
2110+ node = irq_list[i];
2111+ seq_printf(p, "%-8s %3u: %10u %s", contr->name, i,
2112+ kstat_cpu(0).irqs[i], node->devname);
2113+ while ((node = node->next))
2114+ seq_printf(p, ", %s", node->devname);
2115+
2116+ seq_printf(p, "\n");
2117+ }
2118+
2119+ return 0;
2120+}
2121+
2122+/*
2123+ * get_irq_node(void)
2124+ *
2125+ * Get an irq node from the pool.
2126+ */
2127+struct irq_node *get_irq_node(void)
2128+{
2129+ struct irq_node *p = pool;
2130+ int i;
2131+
2132+ for (i = 0; i < POOL_SIZE; i++, p++) {
2133+ if (!p->handler) {
2134+ memset(p, 0, sizeof(struct irq_node));
2135+ return p;
2136+ }
2137+ }
2138+ printk(KERN_INFO "%s(%s:%d): No more irq nodes, I suggest you \
2139+ increase POOL_SIZE", __func__, __FILE__, __LINE__);
2140+ return NULL;
2141+}
2142+
2143+void init_irq_proc(void)
2144+{
2145+ /* Insert /proc/irq driver here */
2146+}
2147+
2148+int setup_irq(unsigned int irq, struct irq_node *node)
2149+{
2150+ struct irq_controller *contr;
2151+ struct irq_node **prev;
2152+ unsigned long flags;
2153+
2154+ if (irq >= NR_IRQS || !irq_controller[irq]) {
2155+ printk("%s: Incorrect IRQ %d from %s\n",
2156+ __func__, irq, node->devname);
2157+ return -ENXIO;
2158+ }
2159+
2160+ contr = irq_controller[irq];
2161+ spin_lock_irqsave(&contr->lock, flags);
2162+
2163+ prev = irq_list + irq;
2164+ if (*prev) {
2165+ /* Can't share interrupts unless both agree to */
2166+ if (!((*prev)->flags & node->flags & IRQF_SHARED)) {
2167+ spin_unlock_irqrestore(&contr->lock, flags);
2168+ printk(KERN_INFO "%s: -BUSY-Incorrect IRQ %d\n",
2169+ __func__, irq);
2170+ return -EBUSY;
2171+ }
2172+ while (*prev)
2173+ prev = &(*prev)->next;
2174+ }
2175+
2176+ if (!irq_list[irq]) {
2177+ if (contr->startup)
2178+ contr->startup(irq);
2179+ else
2180+ contr->enable(irq);
2181+ }
2182+ node->next = NULL;
2183+ *prev = node;
2184+
2185+ spin_unlock_irqrestore(&contr->lock, flags);
2186+
2187+ return 0;
2188+}
2189+
2190+int request_irq(unsigned int irq,
2191+ irq_handler_t handler,
2192+ unsigned long flags, const char *devname, void *dev_id)
2193+{
2194+ struct irq_node *node = get_irq_node();
2195+ int res;
2196+
2197+ if (!node) {
2198+ printk(KERN_INFO "%s:get_irq_node error %x\n",
2199+ __func__, (unsigned int) node);
2200+ return -ENOMEM;
2201+ }
2202+ node->handler = handler;
2203+ node->flags = flags;
2204+ node->dev_id = dev_id;
2205+ node->devname = devname;
2206+
2207+ res = setup_irq(irq, node);
2208+ if (res)
2209+ node->handler = NULL;
2210+
2211+ return res;
2212+}
2213+EXPORT_SYMBOL(request_irq);
2214+
2215+void free_irq(unsigned int irq, void *dev_id)
2216+{
2217+ struct irq_controller *contr;
2218+ struct irq_node **p, *node;
2219+ unsigned long flags;
2220+
2221+ if (irq >= NR_IRQS || !irq_controller[irq]) {
2222+ printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __func__, irq);
2223+ return;
2224+ }
2225+
2226+ contr = irq_controller[irq];
2227+ spin_lock_irqsave(&contr->lock, flags);
2228+
2229+ p = irq_list + irq;
2230+ while ((node = *p)) {
2231+ if (node->dev_id == dev_id)
2232+ break;
2233+ p = &node->next;
2234+ }
2235+
2236+ if (node) {
2237+ *p = node->next;
2238+ node->handler = NULL;
2239+ } else
2240+ printk(KERN_DEBUG "%s: Removing probably wrong IRQ %d\n",
2241+ __func__, irq);
2242+
2243+ if (!irq_list[irq]) {
2244+ if (contr->shutdown)
2245+ contr->shutdown(irq);
2246+ else
2247+ contr->disable(irq);
2248+ }
2249+
2250+ spin_unlock_irqrestore(&contr->lock, flags);
2251+}
2252+EXPORT_SYMBOL(free_irq);
2253+
2254+void enable_irq(unsigned int irq)
2255+{
2256+ struct irq_controller *contr;
2257+ unsigned long flags;
2258+
2259+ if (irq >= NR_IRQS || !irq_controller[irq]) {
2260+ printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __func__, irq);
2261+ return;
2262+ }
2263+
2264+ contr = irq_controller[irq];
2265+ spin_lock_irqsave(&contr->lock, flags);
2266+ if (irq_depth[irq]) {
2267+ if (!--irq_depth[irq]) {
2268+ if (contr->enable)
2269+ contr->enable(irq);
2270+ }
2271+ } else
2272+ WARN_ON(1);
2273+ spin_unlock_irqrestore(&contr->lock, flags);
2274+}
2275+EXPORT_SYMBOL(enable_irq);
2276+
2277+void disable_irq(unsigned int irq)
2278+{
2279+ struct irq_controller *contr;
2280+ unsigned long flags;
2281+
2282+ if (irq >= NR_IRQS || !irq_controller[irq]) {
2283+ printk(KERN_DEBUG "%s: Incorrect IRQ %d\n", __func__, irq);
2284+ return;
2285+ }
2286+
2287+ contr = irq_controller[irq];
2288+ spin_lock_irqsave(&contr->lock, flags);
2289+ if (!irq_depth[irq]++) {
2290+ if (contr->disable)
2291+ contr->disable(irq);
2292+ }
2293+ spin_unlock_irqrestore(&contr->lock, flags);
2294+}
2295+EXPORT_SYMBOL(disable_irq);
2296+
2297+void disable_irq_nosync(unsigned int irq) __attribute__((alias("disable_irq")));
2298+EXPORT_SYMBOL(disable_irq_nosync);
2299+
2300+
2301+unsigned long probe_irq_on(void)
2302+{
2303+ return 0;
2304+}
2305+EXPORT_SYMBOL(probe_irq_on);
2306+
2307+int probe_irq_off(unsigned long irqs)
2308+{
2309+ return 0;
2310+}
2311+EXPORT_SYMBOL(probe_irq_off);
2312+
2313+asmlinkage void handle_badint(struct pt_regs *regs)
2314+{
2315+ kstat_cpu(0).irqs[0]++;
2316+ num_spurious++;
2317+ printk(KERN_DEBUG "unexpected interrupt from %u\n", regs->vector);
2318+}
2319+EXPORT_SYMBOL(handle_badint);
2320+
2321+unsigned int irq_canonicalize(unsigned int irq)
2322+{
2323+#ifdef CONFIG_Q40
2324+ if (MACH_IS_Q40 && irq == 11)
2325+ irq = 10;
2326+#endif
2327+ return irq;
2328+}
2329+EXPORT_SYMBOL(irq_canonicalize);
2330+
2331+#ifdef CONFIG_M5445X
2332+/*
2333+ * M5445X Implementation
2334+ */
2335+void m5445x_irq_enable(unsigned int irq)
2336+{
2337+ /* enable the interrupt hardware */
2338+ if (irq < 64)
2339+ return;
2340+
2341+ /* adjust past non-hardware ints */
2342+ irq -= 64;
2343+
2344+ /* check for eport */
2345+ if ((irq > 0) && (irq < 8)) {
2346+ /* enable eport */
2347+ MCF_EPORT_EPPAR &= ~(3 << (irq*2)); /* level */
2348+ MCF_EPORT_EPDDR &= ~(1 << irq); /* input */
2349+ MCF_EPORT_EPIER |= 1 << irq; /* irq enabled */
2350+ }
2351+
2352+ if (irq < 64) {
2353+ /* controller 0 */
2354+ MCF_INTC0_ICR(irq) = 0x02;
2355+ MCF_INTC0_CIMR = irq;
2356+ } else {
2357+ /* controller 1 */
2358+ irq -= 64;
2359+ MCF_INTC1_ICR(irq) = 0x02;
2360+ MCF_INTC1_CIMR = irq;
2361+ }
2362+}
2363+
2364+void m5445x_irq_disable(unsigned int irq)
2365+{
2366+ /* disable the interrupt hardware */
2367+ if (irq < 64)
2368+ return;
2369+
2370+ /* adjust past non-hardware ints */
2371+ irq -= 64;
2372+
2373+ /* check for eport */
2374+ if ((irq > 0) && (irq < 8)) {
2375+ /* disable eport */
2376+ MCF_EPORT_EPIER &= ~(1 << irq);
2377+ }
2378+
2379+ if (irq < 64) {
2380+ /* controller 0 */
2381+ MCF_INTC0_ICR(irq) = 0x00;
2382+ MCF_INTC0_SIMR = irq;
2383+ } else {
2384+ /* controller 1 */
2385+ irq -= 64;
2386+ MCF_INTC1_ICR(irq) = 0x00;
2387+ MCF_INTC1_SIMR = irq;
2388+ }
2389+}
2390+#elif defined(CONFIG_M547X_8X)
2391+/*
2392+ * M547X_8X Implementation
2393+ */
2394+void m547x_8x_irq_enable(unsigned int irq)
2395+{
2396+ /* enable the interrupt hardware */
2397+ if (irq < 64)
2398+ return;
2399+
2400+ /* adjust past non-hardware ints */
2401+ irq -= 64;
2402+
2403+ /* check for eport */
2404+ if ((irq > 0) && (irq < 8)) {
2405+ /* enable eport */
2406+ MCF_EPPAR &= ~(3 << (irq*2));
2407+ /* level */
2408+ MCF_EPDDR &= ~(1 << irq);
2409+ /* input */
2410+ MCF_EPIER |= 1 << irq;
2411+ /* irq enabled */
2412+ }
2413+
2414+ if (irq < 32) {
2415+ /* *grumble* don't set low bit of IMRL */
2416+ MCF_IMRL &= (~(1 << irq) & 0xfffffffe);
2417+ } else {
2418+ MCF_IMRH &= ~(1 << (irq - 32));
2419+ }
2420+}
2421+
2422+void m547x_8x_irq_disable(unsigned int irq)
2423+{
2424+ /* disable the interrupt hardware */
2425+ if (irq < 64)
2426+ return;
2427+
2428+ /* adjust past non-hardware ints */
2429+ irq -= 64;
2430+
2431+ /* check for eport */
2432+ if ((irq > 0) && (irq < 8)) {
2433+ /* disable eport */
2434+ MCF_EPIER &= ~(1 << irq);
2435+ }
2436+
2437+ if (irq < 32)
2438+ MCF_IMRL |= (1 << irq);
2439+ else
2440+ MCF_IMRH |= (1 << (irq - 32));
2441+}
2442+
2443+#elif defined(CONFIG_M5441X)
2444+/*
2445+ * M5441X Implementation
2446+ */
2447+void m5441x_irq_enable(unsigned int irq)
2448+{
2449+ /* enable the interrupt hardware */
2450+ if (irq < 64)
2451+ return;
2452+
2453+ /* adjust past non-hardware ints */
2454+ irq -= 64;
2455+
2456+ /* check for eport */
2457+ if ((irq > 0) && (irq < 8)) {
2458+ /* enable eport */
2459+ MCF_EPORT_EPPAR &= ~(3 << (irq*2)); /* level */
2460+ MCF_EPORT_EPIER |= 1 << irq; /* irq enabled */
2461+ }
2462+
2463+ if (irq < 64) {
2464+ /* controller 0 */
2465+ MCF_INTC0_ICR(irq) = 0x02;
2466+ MCF_INTC0_CIMR = irq;
2467+ } else if (irq >= 64 && irq < 128) {
2468+ /* controller 1 */
2469+ irq -= 64;
2470+ MCF_INTC1_ICR(irq) = 0x02;
2471+ MCF_INTC1_CIMR = irq;
2472+ } else if (irq >= 128 && irq < 192) {
2473+ /* controller 2 */
2474+ irq -= 128;
2475+ MCF_INTC2_ICR(irq) = 0x02;
2476+ MCF_INTC2_CIMR = irq;
2477+ } else {
2478+ /* invalid irq number */
2479+ return;
2480+ }
2481+}
2482+
2483+void m5441x_irq_disable(unsigned int irq)
2484+{
2485+ /* disable the interrupt hardware */
2486+ if (irq < 64)
2487+ return;
2488+
2489+ /* adjust past non-hardware ints */
2490+ irq -= 64;
2491+
2492+ /* check for eport */
2493+ if ((irq > 0) && (irq < 8)) {
2494+ /* disable eport */
2495+ MCF_EPORT_EPIER &= ~(1 << irq);
2496+ }
2497+
2498+ if (irq < 64) {
2499+ /* controller 0 */
2500+ MCF_INTC0_ICR(irq) = 0x00;
2501+ MCF_INTC0_SIMR = irq;
2502+ } else if (irq >= 64 && irq < 128) {
2503+ /* controller 1 */
2504+ irq -= 64;
2505+ MCF_INTC1_ICR(irq) = 0x00;
2506+ MCF_INTC1_SIMR = irq;
2507+ } else if (irq >= 128 && irq < 192) {
2508+ /* controller 2 */
2509+ irq -= 128;
2510+ MCF_INTC2_ICR(irq) = 0x00;
2511+ MCF_INTC2_SIMR = irq;
2512+ }
2513+}
2514+#endif
2515+
2516+/*
2517+ * IRQ Controller
2518+ */
2519+#if defined(CONFIG_M5445X)
2520+static struct irq_controller m5445x_irq_controller = {
2521+ .name = "M5445X",
2522+ .lock = __SPIN_LOCK_UNLOCKED(m5445x_irq_controller.lock),
2523+ .enable = m5445x_irq_enable,
2524+ .disable = m5445x_irq_disable,
2525+};
2526+#elif defined(CONFIG_M547X_8X)
2527+static struct irq_controller m547x_8x_irq_controller = {
2528+ .name = "M547X_8X",
2529+ .lock = __SPIN_LOCK_UNLOCKED(m547x_8x_irq_controller.lock),
2530+ .enable = m547x_8x_irq_enable,
2531+ .disable = m547x_8x_irq_disable,
2532+};
2533+#elif defined(CONFIG_M5441X)
2534+static struct irq_controller m5441x_irq_controller = {
2535+ .name = "M5441X",
2536+ .lock = __SPIN_LOCK_UNLOCKED(m5441x_irq_controller.lock),
2537+ .enable = m5441x_irq_enable,
2538+ .disable = m5441x_irq_disable,
2539+};
2540+#else
2541+# error No IRQ controller defined
2542+#endif
2543+
2544+/*
2545+ * void init_IRQ(void)
2546+ *
2547+ * This function should be called during kernel startup to initialize
2548+ * the IRQ handling routines.
2549+ */
2550+void __init init_IRQ(void)
2551+{
2552+ int i;
2553+
2554+#if defined(CONFIG_M5445X)
2555+ for (i = 0; i < SYS_IRQS; i++)
2556+ irq_controller[i] = &m5445x_irq_controller;
2557+#elif defined(CONFIG_M547X_8X)
2558+ for (i = 0; i < SYS_IRQS; i++)
2559+ irq_controller[i] = &m547x_8x_irq_controller;
2560+#elif defined(CONFIG_M5441X)
2561+ for (i = 0; i < SYS_IRQS; i++)
2562+ irq_controller[i] = &m5441x_irq_controller;
2563+#endif
2564+}
2565--- /dev/null
2566+++ b/arch/m68k/coldfire/common/muldi3.S
2567@@ -0,0 +1,73 @@
2568+/*
2569+ * Coldfire muldi3 assembly verion
2570+ *
2571+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
2572+ * Jason Jin Jason.Jin@freescale.com
2573+ * Shrek Wu B16972@freescale.com
2574+ *
2575+ * This program is free software; you can redistribute it and/or modify
2576+ * it under the terms of the GNU General Public License as published by
2577+ * the Free Software Foundation; either version 2 of the License, or
2578+ * (at your option) any later version.
2579+ */
2580+
2581+#include <linux/linkage.h>
2582+.globl __muldi3
2583+
2584+ENTRY(__muldi3)
2585+ linkw %fp,#0
2586+ lea %sp@(-32),%sp
2587+ moveml %d2-%d7/%a2-%a3,%sp@
2588+ moveal %fp@(8), %a2
2589+ moveal %fp@(12), %a3
2590+ moveal %fp@(16), %a0
2591+ moveal %fp@(20),%a1
2592+ movel %a3,%d2
2593+ andil #65535,%d2
2594+ movel %a3,%d3
2595+ clrw %d3
2596+ swap %d3
2597+ movel %a1,%d0
2598+ andil #65535,%d0
2599+ movel %a1,%d1
2600+ clrw %d1
2601+ swap %d1
2602+ movel %d2,%d7
2603+ mulsl %d0,%d7
2604+ movel %d2,%d4
2605+ mulsl %d1,%d4
2606+ movel %d3,%d2
2607+ mulsl %d0,%d2
2608+ mulsl %d1,%d3
2609+ movel %d7,%d0
2610+ clrw %d0
2611+ swap %d0
2612+ addl %d0,%d4
2613+ addl %d2,%d4
2614+ cmpl %d4,%d2
2615+ blss 1f
2616+ addil #65536,%d3
2617+1:
2618+ movel %d4,%d0
2619+ clrw %d0
2620+ swap %d0
2621+ movel %d3,%d5
2622+ addl %d0,%d5
2623+ movew %d4,%d6
2624+ swap %d6
2625+ movew %d7,%d6
2626+ movel %d5,%d0
2627+ movel %d6,%d1
2628+ movel %a3,%d2
2629+ movel %a0,%d3
2630+ mulsl %d3,%d2
2631+ movel %a2,%d3
2632+ movel %a1,%d4
2633+ mulsl %d4,%d3
2634+ addl %d3,%d2
2635+ movel %d2,%d0
2636+ addl %d5,%d0
2637+ moveml %sp@, %d2-%d7/%a2-%a3
2638+ lea %sp@(32),%sp
2639+ unlk %fp
2640+ rts
2641--- /dev/null
2642+++ b/arch/m68k/coldfire/common/signal.c
2643@@ -0,0 +1,991 @@
2644+/*
2645+ * linux/arch/m68k/kernel/signal.c
2646+ *
2647+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
2648+ * Matt Waddel Matt.Waddel@freescale.com
2649+ * Jason Jin Jason.Jin@freescale.com
2650+ * Shrek Wu B16972@freescale.com
2651+ *
2652+ * This file is subject to the terms and conditions of the GNU General Public
2653+ * License. See the file COPYING in the main directory of this archive
2654+ * for more details.
2655+ *
2656+ * Derived from m68k/kernel/signal.c and the original authors are credited
2657+ * there.
2658+ */
2659+
2660+#include <linux/sched.h>
2661+#include <linux/mm.h>
2662+#include <linux/kernel.h>
2663+#include <linux/signal.h>
2664+#include <linux/syscalls.h>
2665+#include <linux/errno.h>
2666+#include <linux/wait.h>
2667+#include <linux/ptrace.h>
2668+#include <linux/unistd.h>
2669+#include <linux/stddef.h>
2670+#include <linux/highuid.h>
2671+#include <linux/personality.h>
2672+#include <linux/tty.h>
2673+#include <linux/binfmts.h>
2674+
2675+#include <asm/setup.h>
2676+#include <asm/uaccess.h>
2677+#include <asm/cf_pgtable.h>
2678+#include <asm/traps.h>
2679+#include <asm/ucontext.h>
2680+#include <asm/cacheflush.h>
2681+
2682+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
2683+
2684+asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs);
2685+
2686+const int frame_extra_sizes[16] = {
2687+ [1] = -1,
2688+ [2] = -1,
2689+ [3] = -1,
2690+ [4] = 0,
2691+ [5] = 1,
2692+ [6] = 1,
2693+ [7] = 2,
2694+ [8] = 3,
2695+ [9] = -1,
2696+ [10] = -1,
2697+ [11] = -1,
2698+ [12] = -1,
2699+ [13] = -1,
2700+ [14] = -1,
2701+ [15] = -1,
2702+};
2703+
2704+/*
2705+ * Atomically swap in the new signal mask, and wait for a signal.
2706+ */
2707+asmlinkage int do_sigsuspend(struct pt_regs *regs)
2708+{
2709+ old_sigset_t mask = regs->d3;
2710+ sigset_t saveset;
2711+
2712+ mask &= _BLOCKABLE;
2713+ spin_lock_irq(&current->sighand->siglock);
2714+ saveset = current->blocked;
2715+ siginitset(&current->blocked, mask);
2716+ recalc_sigpending();
2717+ spin_unlock_irq(&current->sighand->siglock);
2718+
2719+ regs->d0 = -EINTR;
2720+ while (1) {
2721+ current->state = TASK_INTERRUPTIBLE;
2722+ schedule();
2723+ if (do_signal(&saveset, regs))
2724+ return -EINTR;
2725+ }
2726+}
2727+
2728+asmlinkage int
2729+do_rt_sigsuspend(struct pt_regs *regs)
2730+{
2731+ sigset_t __user *unewset = (sigset_t __user *)regs->d1;
2732+ size_t sigsetsize = (size_t)regs->d2;
2733+ sigset_t saveset, newset;
2734+
2735+ /* XXX: Don't preclude handling different sized sigset_t's. */
2736+ if (sigsetsize != sizeof(sigset_t))
2737+ return -EINVAL;
2738+
2739+ if (copy_from_user(&newset, unewset, sizeof(newset)))
2740+ return -EFAULT;
2741+ sigdelsetmask(&newset, ~_BLOCKABLE);
2742+
2743+ spin_lock_irq(&current->sighand->siglock);
2744+ saveset = current->blocked;
2745+ current->blocked = newset;
2746+ recalc_sigpending();
2747+ spin_unlock_irq(&current->sighand->siglock);
2748+
2749+ regs->d0 = -EINTR;
2750+ while (1) {
2751+ current->state = TASK_INTERRUPTIBLE;
2752+ schedule();
2753+ if (do_signal(&saveset, regs))
2754+ return -EINTR;
2755+ }
2756+}
2757+
2758+asmlinkage int
2759+sys_sigaction(int sig, const struct old_sigaction __user *act,
2760+ struct old_sigaction __user *oact)
2761+{
2762+ struct k_sigaction new_ka, old_ka;
2763+ int ret;
2764+
2765+ if (act) {
2766+ old_sigset_t mask;
2767+ if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
2768+ __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
2769+ __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
2770+ return -EFAULT;
2771+ __get_user(new_ka.sa.sa_flags, &act->sa_flags);
2772+ __get_user(mask, &act->sa_mask);
2773+ siginitset(&new_ka.sa.sa_mask, mask);
2774+ }
2775+
2776+ ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
2777+
2778+ if (!ret && oact) {
2779+ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
2780+ __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
2781+ __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
2782+ return -EFAULT;
2783+ __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
2784+ __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
2785+ }
2786+
2787+ return ret;
2788+}
2789+
2790+asmlinkage int
2791+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
2792+{
2793+ return do_sigaltstack(uss, uoss, rdusp());
2794+}
2795+
2796+
2797+/*
2798+ * Do a signal return; undo the signal stack.
2799+ *
2800+ * Keep the return code on the stack quadword aligned!
2801+ * That makes the cache flush below easier.
2802+ */
2803+
2804+struct sigframe {
2805+ char __user *pretcode;
2806+ int sig;
2807+ int code;
2808+ struct sigcontext __user *psc;
2809+ char retcode[8];
2810+ unsigned long extramask[_NSIG_WORDS-1];
2811+ struct sigcontext sc;
2812+};
2813+
2814+struct rt_sigframe {
2815+ char __user *pretcode;
2816+ int sig;
2817+ struct siginfo __user *pinfo;
2818+ void __user *puc;
2819+ char retcode[8];
2820+ struct siginfo info;
2821+ struct ucontext uc;
2822+};
2823+
2824+#define FPCONTEXT_SIZE 216
2825+#define uc_fpstate uc_filler[0]
2826+#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
2827+#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
2828+
2829+#ifdef CONFIG_FPU
2830+static unsigned char fpu_version; /* version num of fpu, set by setup_frame */
2831+
2832+static inline int restore_fpu_state(struct sigcontext *sc)
2833+{
2834+ int err = 1;
2835+
2836+ if (FPU_IS_EMU) {
2837+ /* restore registers */
2838+ memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
2839+ memcpy(current->thread.fp, sc->sc_fpregs, 24);
2840+ return 0;
2841+ }
2842+
2843+ if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
2844+ /* Verify the frame format. */
2845+ if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
2846+ goto out;
2847+ if (CPU_IS_020_OR_030) {
2848+ if (m68k_fputype & FPU_68881 &&
2849+ !(sc->sc_fpstate[1] == 0x18 ||
2850+ sc->sc_fpstate[1] == 0xb4))
2851+ goto out;
2852+ if (m68k_fputype & FPU_68882 &&
2853+ !(sc->sc_fpstate[1] == 0x38 ||
2854+ sc->sc_fpstate[1] == 0xd4))
2855+ goto out;
2856+ } else if (CPU_IS_040) {
2857+ if (!(sc->sc_fpstate[1] == 0x00 ||
2858+ sc->sc_fpstate[1] == 0x28 ||
2859+ sc->sc_fpstate[1] == 0x60))
2860+ goto out;
2861+ } else if (CPU_IS_060) {
2862+ if (!(sc->sc_fpstate[3] == 0x00 ||
2863+ sc->sc_fpstate[3] == 0x60 ||
2864+ sc->sc_fpstate[3] == 0xe0))
2865+ goto out;
2866+ } else if (CPU_IS_CFV4E) {
2867+ pr_debug("restore v4e fpu state at %s\n", __func__);
2868+ } else
2869+ goto out;
2870+#ifdef CONFIG_CFV4E
2871+ __asm__ volatile ("fmovem %0,%/fp0-%/fp1\n\t"
2872+ QCHIP_RESTORE_DIRECTIVE
2873+ : /* no outputs */
2874+ : "m" (sc->sc_fpregs[0][0])
2875+ : "memory");
2876+ __asm__ volatile ("fmovel %0,%/fpcr"
2877+ : : "m" (sc->sc_fpcntl[0])
2878+ : "memory");
2879+ __asm__ volatile ("fmovel %0,%/fpsr"
2880+ : : "m" (sc->sc_fpcntl[1])
2881+ : "memory");
2882+ __asm__ volatile ("fmovel %0,%/fpiar"
2883+ : : "m" (sc->sc_fpcntl[2])
2884+ : "memory");
2885+
2886+#endif
2887+ }
2888+
2889+#ifdef CONFIG_CFV4E
2890+ __asm__ volatile ("frestore %0\n\t"
2891+ QCHIP_RESTORE_DIRECTIVE : : "m" (*sc->sc_fpstate));
2892+#endif
2893+ err = 0;
2894+
2895+out:
2896+ return err;
2897+}
2898+
2899+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
2900+{
2901+ unsigned char fpstate[FPCONTEXT_SIZE];
2902+ int context_size = CPU_IS_060 ? 8 : 0;
2903+ fpregset_t fpregs;
2904+ int err = 1;
2905+
2906+ if (FPU_IS_EMU) {
2907+ /* restore fpu control register */
2908+ if (__copy_from_user(current->thread.fpcntl,
2909+ uc->uc_mcontext.fpregs.f_fpcntl, 12))
2910+ goto out;
2911+ /* restore all other fpu register */
2912+ if (__copy_from_user(current->thread.fp,
2913+ uc->uc_mcontext.fpregs.f_fpregs, 96))
2914+ goto out;
2915+ return 0;
2916+ }
2917+
2918+ if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
2919+ goto out;
2920+ if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
2921+ if (!CPU_IS_060)
2922+ context_size = fpstate[1];
2923+ /* Verify the frame format. */
2924+ if (!CPU_IS_060 && (fpstate[0] != fpu_version))
2925+ goto out;
2926+ if (CPU_IS_020_OR_030) {
2927+ if (m68k_fputype & FPU_68881 &&
2928+ !(context_size == 0x18 || context_size == 0xb4))
2929+ goto out;
2930+ if (m68k_fputype & FPU_68882 &&
2931+ !(context_size == 0x38 || context_size == 0xd4))
2932+ goto out;
2933+ } else if (CPU_IS_040) {
2934+ if (!(context_size == 0x00 ||
2935+ context_size == 0x28 ||
2936+ context_size == 0x60))
2937+ goto out;
2938+ } else if (CPU_IS_060) {
2939+ if (!(fpstate[3] == 0x00 ||
2940+ fpstate[3] == 0x60 ||
2941+ fpstate[3] == 0xe0))
2942+ goto out;
2943+ } else if (CPU_IS_CFV4E) {
2944+ pr_debug("restore coldfire rt v4e fpu"
2945+ " state at %s\n", __func__);
2946+ } else
2947+ goto out;
2948+ if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
2949+ sizeof(fpregs)))
2950+ goto out;
2951+#ifdef CONFIG_CFV4E
2952+ __asm__ volatile ("fmovem %0,%/fp0-%/fp7\n\t"
2953+ QCHIP_RESTORE_DIRECTIVE
2954+ : /* no outputs */
2955+ : "m" (fpregs.f_fpregs[0][0])
2956+ : "memory");
2957+ __asm__ volatile ("fmovel %0,%/fpcr"
2958+ : : "m" (fpregs.f_fpcntl[0])
2959+ : "memory");
2960+ __asm__ volatile ("fmovel %0,%/fpsr"
2961+ : : "m" (fpregs.f_fpcntl[1])
2962+ : "memory");
2963+ __asm__ volatile ("fmovel %0,%/fpiar"
2964+ : : "m" (fpregs.f_fpcntl[2])
2965+ : "memory");
2966+#endif
2967+ }
2968+ if (context_size &&
2969+ __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
2970+ context_size))
2971+ goto out;
2972+#ifdef CONFIG_CFV4E
2973+ __asm__ volatile ("frestore %0\n\t"
2974+ QCHIP_RESTORE_DIRECTIVE : : "m" (*fpstate));
2975+#endif
2976+ err = 0;
2977+
2978+out:
2979+ return err;
2980+}
2981+#endif
2982+
2983+static inline int
2984+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc,
2985+ void __user *fp, int *pd0)
2986+{
2987+ int fsize, formatvec;
2988+ struct sigcontext context;
2989+ int err = 0;
2990+
2991+ /* get previous context */
2992+ if (copy_from_user(&context, usc, sizeof(context)))
2993+ goto badframe;
2994+
2995+ /* restore passed registers */
2996+ regs->d1 = context.sc_d1;
2997+ regs->a0 = context.sc_a0;
2998+ regs->a1 = context.sc_a1;
2999+ regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
3000+ regs->pc = context.sc_pc;
3001+ regs->orig_d0 = -1; /* disable syscall checks */
3002+ wrusp(context.sc_usp);
3003+ formatvec = context.sc_formatvec;
3004+ regs->format = formatvec >> 12;
3005+ regs->vector = formatvec & 0xfff;
3006+
3007+#ifdef CONFIG_FPU
3008+ err = restore_fpu_state(&context);
3009+#endif
3010+
3011+ fsize = frame_extra_sizes[regs->format];
3012+ if (fsize < 0) {
3013+ /*
3014+ * user process trying to return with weird frame format
3015+ */
3016+#ifdef DEBUG
3017+ printk(KERN_DEBUG "user process returning with weird \
3018+ frame format\n");
3019+#endif
3020+ goto badframe;
3021+ }
3022+
3023+ /* OK. Make room on the supervisor stack for the extra junk,
3024+ * if necessary.
3025+ */
3026+
3027+ {
3028+ struct switch_stack *sw = (struct switch_stack *)regs - 1;
3029+ regs->d0 = context.sc_d0;
3030+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
3031+ __asm__ __volatile__
3032+ (" movel %0,%/sp\n\t"
3033+ " bra ret_from_signal\n"
3034+ "4:\n"
3035+ ".section __ex_table,\"a\"\n"
3036+ " .align 4\n"
3037+ " .long 2b,4b\n"
3038+ ".previous"
3039+ : /* no outputs, it doesn't ever return */
3040+ : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
3041+ "n" (frame_offset), "a" (fp)
3042+ : "a0");
3043+#undef frame_offset
3044+ /*
3045+ * If we ever get here an exception occurred while
3046+ * building the above stack-frame.
3047+ */
3048+ goto badframe;
3049+ }
3050+
3051+ *pd0 = context.sc_d0;
3052+ return err;
3053+
3054+badframe:
3055+ return 1;
3056+}
3057+
3058+static inline int
3059+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
3060+ struct ucontext __user *uc, int *pd0)
3061+{
3062+ int fsize, temp;
3063+ greg_t __user *gregs = uc->uc_mcontext.gregs;
3064+ unsigned long usp;
3065+ int err;
3066+
3067+ err = __get_user(temp, &uc->uc_mcontext.version);
3068+ if (temp != MCONTEXT_VERSION)
3069+ goto badframe;
3070+ /* restore passed registers */
3071+ err |= __get_user(regs->d0, &gregs[0]);
3072+ err |= __get_user(regs->d1, &gregs[1]);
3073+ err |= __get_user(regs->d2, &gregs[2]);
3074+ err |= __get_user(regs->d3, &gregs[3]);
3075+ err |= __get_user(regs->d4, &gregs[4]);
3076+ err |= __get_user(regs->d5, &gregs[5]);
3077+ err |= __get_user(sw->d6, &gregs[6]);
3078+ err |= __get_user(sw->d7, &gregs[7]);
3079+ err |= __get_user(regs->a0, &gregs[8]);
3080+ err |= __get_user(regs->a1, &gregs[9]);
3081+ err |= __get_user(regs->a2, &gregs[10]);
3082+ err |= __get_user(sw->a3, &gregs[11]);
3083+ err |= __get_user(sw->a4, &gregs[12]);
3084+ err |= __get_user(sw->a5, &gregs[13]);
3085+ err |= __get_user(sw->a6, &gregs[14]);
3086+ err |= __get_user(usp, &gregs[15]);
3087+ wrusp(usp);
3088+ err |= __get_user(regs->pc, &gregs[16]);
3089+ err |= __get_user(temp, &gregs[17]);
3090+ regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
3091+ regs->orig_d0 = -1; /* disable syscall checks */
3092+ err |= __get_user(temp, &uc->uc_formatvec);
3093+ regs->format = temp >> 12;
3094+ regs->vector = temp & 0xfff;
3095+
3096+#ifdef CONFIG_FPU
3097+ err |= rt_restore_fpu_state(uc);
3098+#endif
3099+
3100+ if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
3101+ goto badframe;
3102+
3103+ fsize = frame_extra_sizes[regs->format];
3104+ if (fsize < 0) {
3105+ /*
3106+ * user process trying to return with weird frame format
3107+ */
3108+#ifdef DEBUG
3109+ printk(KERN_DEBUG "user process returning with weird \
3110+ frame format\n");
3111+#endif
3112+ goto badframe;
3113+ }
3114+
3115+ /* OK. Make room on the supervisor stack for the extra junk,
3116+ * if necessary.
3117+ */
3118+
3119+ {
3120+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
3121+ __asm__ __volatile__
3122+ (" movel %0,%/sp\n\t"
3123+ " bra ret_from_signal\n"
3124+ "4:\n"
3125+ ".section __ex_table,\"a\"\n"
3126+ " .align 4\n"
3127+ " .long 2b,4b\n"
3128+ ".previous"
3129+ : /* no outputs, it doesn't ever return */
3130+ : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
3131+ "n" (frame_offset), "a" (&uc->uc_extra)
3132+ : "a0");
3133+#undef frame_offset
3134+ /*
3135+ * If we ever get here an exception occurred while
3136+ * building the above stack-frame.
3137+ */
3138+ goto badframe;
3139+ }
3140+
3141+ *pd0 = regs->d0;
3142+ return err;
3143+
3144+badframe:
3145+ return 1;
3146+}
3147+
3148+asmlinkage int do_sigreturn(unsigned long __unused)
3149+{
3150+ struct switch_stack *sw = (struct switch_stack *) &__unused;
3151+ struct pt_regs *regs = (struct pt_regs *) (sw + 1);
3152+ unsigned long usp = rdusp();
3153+ struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
3154+ sigset_t set;
3155+ int d0;
3156+
3157+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
3158+ goto badframe;
3159+ if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
3160+ (_NSIG_WORDS > 1 &&
3161+ __copy_from_user(&set.sig[1], &frame->extramask,
3162+ sizeof(frame->extramask))))
3163+ goto badframe;
3164+
3165+ sigdelsetmask(&set, ~_BLOCKABLE);
3166+ spin_lock_irq(&current->sighand->siglock);
3167+ current->blocked = set;
3168+ recalc_sigpending();
3169+ spin_unlock_irq(&current->sighand->siglock);
3170+
3171+ if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
3172+ goto badframe;
3173+ return d0;
3174+
3175+badframe:
3176+ force_sig(SIGSEGV, current);
3177+ return 0;
3178+}
3179+
3180+asmlinkage int do_rt_sigreturn(unsigned long __unused)
3181+{
3182+ struct switch_stack *sw = (struct switch_stack *) &__unused;
3183+ struct pt_regs *regs = (struct pt_regs *) (sw + 1);
3184+ unsigned long usp = rdusp();
3185+ struct rt_sigframe __user *frame =
3186+ (struct rt_sigframe __user *)(usp - 4);
3187+ sigset_t set;
3188+ int d0;
3189+
3190+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
3191+ goto badframe;
3192+ if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
3193+ goto badframe;
3194+
3195+ sigdelsetmask(&set, ~_BLOCKABLE);
3196+ spin_lock_irq(&current->sighand->siglock);
3197+ current->blocked = set;
3198+ recalc_sigpending();
3199+ spin_unlock_irq(&current->sighand->siglock);
3200+
3201+ if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
3202+ goto badframe;
3203+ return d0;
3204+
3205+badframe:
3206+ force_sig(SIGSEGV, current);
3207+ return 0;
3208+}
3209+
3210+#ifdef CONFIG_FPU
3211+/*
3212+ * Set up a signal frame.
3213+ */
3214+
3215+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
3216+{
3217+ if (FPU_IS_EMU) {
3218+ /* save registers */
3219+ memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
3220+ memcpy(sc->sc_fpregs, current->thread.fp, 24);
3221+ return;
3222+ }
3223+
3224+#ifdef CONFIG_CFV4E
3225+ __asm__ volatile ("fsave %0\n\t"
3226+ QCHIP_RESTORE_DIRECTIVE
3227+ : : "m" (*sc->sc_fpstate) : "memory");
3228+#endif
3229+
3230+ if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
3231+ fpu_version = sc->sc_fpstate[0];
3232+ if (CPU_IS_020_OR_030 &&
3233+ regs->vector >= (VEC_FPBRUC * 4) &&
3234+ regs->vector <= (VEC_FPNAN * 4)) {
3235+ /* Clear pending exception in 68882 idle frame */
3236+ if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
3237+ sc->sc_fpstate[0x38] |= 1 << 3;
3238+ }
3239+#ifdef CONFIG_CFV4E
3240+ __asm__ volatile ("fmovemd %/fp0-%/fp1,%0"
3241+ : : "m" (sc->sc_fpregs[0][0])
3242+ : "memory");
3243+ __asm__ volatile ("fmovel %/fpcr,%0"
3244+ : : "m" (sc->sc_fpcntl[0])
3245+ : "memory");
3246+ __asm__ volatile ("fmovel %/fpsr,%0"
3247+ : : "m" (sc->sc_fpcntl[1])
3248+ : "memory");
3249+ __asm__ volatile ("fmovel %/fpiar,%0"
3250+ : : "m" (sc->sc_fpcntl[2])
3251+ : "memory");
3252+
3253+#endif
3254+ }
3255+}
3256+
3257+static inline int rt_save_fpu_state(struct ucontext __user *uc,
3258+ struct pt_regs *regs)
3259+{
3260+ unsigned char fpstate[FPCONTEXT_SIZE];
3261+ int context_size = CPU_IS_060 ? 8 : 0;
3262+ int err = 0;
3263+
3264+ if (FPU_IS_EMU) {
3265+ /* save fpu control register */
3266+ err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
3267+ current->thread.fpcntl, 12);
3268+ /* save all other fpu register */
3269+ err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
3270+ current->thread.fp, 96);
3271+ return err;
3272+ }
3273+
3274+#ifdef CONFIG_CFV4E
3275+ __asm__ volatile ("fsave %0\n\t"
3276+ QCHIP_RESTORE_DIRECTIVE
3277+ : : "m" (*fpstate) : "memory");
3278+#endif
3279+ err |= __put_user(*(long *)fpstate, (long *)&uc->uc_fpstate);
3280+ if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
3281+ fpregset_t fpregs;
3282+ if (!CPU_IS_060)
3283+ context_size = fpstate[1];
3284+ fpu_version = fpstate[0];
3285+#ifdef CONFIG_CFV4E
3286+ __asm__ volatile ("fmovemd %/fp0-%/fp7,%0"
3287+ : : "m" (fpregs.f_fpregs[0][0])
3288+ : "memory");
3289+ __asm__ volatile ("fmovel %/fpcr,%0"
3290+ : : "m" (fpregs.f_fpcntl[0])
3291+ : "memory");
3292+ __asm__ volatile ("fmovel %/fpsr,%0"
3293+ : : "m" (fpregs.f_fpcntl[1])
3294+ : "memory");
3295+ __asm__ volatile ("fmovel %/fpiar,%0"
3296+ : : "m" (fpregs.f_fpcntl[2])
3297+ : "memory");
3298+#endif
3299+ err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
3300+ sizeof(fpregs));
3301+ }
3302+ if (context_size)
3303+ err |= copy_to_user((long *)&uc->uc_fpstate + 1, fpstate + 4,
3304+ context_size);
3305+ return err;
3306+
3307+
3308+ return err;
3309+}
3310+#endif
3311+
3312+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
3313+ unsigned long mask)
3314+{
3315+ sc->sc_mask = mask;
3316+ sc->sc_usp = rdusp();
3317+ sc->sc_d0 = regs->d0;
3318+ sc->sc_d1 = regs->d1;
3319+ sc->sc_a0 = regs->a0;
3320+ sc->sc_a1 = regs->a1;
3321+ sc->sc_sr = regs->sr;
3322+ sc->sc_pc = regs->pc;
3323+ sc->sc_formatvec = regs->format << 12 | regs->vector;
3324+#ifdef CONFIG_FPU
3325+ save_fpu_state(sc, regs);
3326+#endif
3327+}
3328+
3329+static inline int rt_setup_ucontext(struct ucontext __user *uc,
3330+ struct pt_regs *regs)
3331+{
3332+ struct switch_stack *sw = (struct switch_stack *)regs - 1;
3333+ greg_t __user *gregs = uc->uc_mcontext.gregs;
3334+ int err = 0;
3335+
3336+ err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
3337+ err |= __put_user(regs->d0, &gregs[0]);
3338+ err |= __put_user(regs->d1, &gregs[1]);
3339+ err |= __put_user(regs->d2, &gregs[2]);
3340+ err |= __put_user(regs->d3, &gregs[3]);
3341+ err |= __put_user(regs->d4, &gregs[4]);
3342+ err |= __put_user(regs->d5, &gregs[5]);
3343+ err |= __put_user(sw->d6, &gregs[6]);
3344+ err |= __put_user(sw->d7, &gregs[7]);
3345+ err |= __put_user(regs->a0, &gregs[8]);
3346+ err |= __put_user(regs->a1, &gregs[9]);
3347+ err |= __put_user(regs->a2, &gregs[10]);
3348+ err |= __put_user(sw->a3, &gregs[11]);
3349+ err |= __put_user(sw->a4, &gregs[12]);
3350+ err |= __put_user(sw->a5, &gregs[13]);
3351+ err |= __put_user(sw->a6, &gregs[14]);
3352+ err |= __put_user(rdusp(), &gregs[15]);
3353+ err |= __put_user(regs->pc, &gregs[16]);
3354+ err |= __put_user(regs->sr, &gregs[17]);
3355+ err |= __put_user((regs->format << 12) | regs->vector,
3356+ &uc->uc_formatvec);
3357+#ifdef CONFIG_FPU
3358+ err |= rt_save_fpu_state(uc, regs);
3359+#endif
3360+ return err;
3361+}
3362+
3363+static inline void push_cache(unsigned long vaddr)
3364+{
3365+#if defined(CONFIG_M5445X) || defined(CONFIG_M5441X)
3366+ pgd_t *pdir;
3367+ pmd_t *pmdp;
3368+ pte_t *ptep;
3369+ unsigned long paddr;
3370+
3371+ pdir = pgd_offset(current->mm, vaddr);
3372+ pmdp = pmd_offset(pdir, vaddr);
3373+ ptep = pte_offset_map(pmdp, vaddr);
3374+ paddr = ((pte_val(*ptep) & PAGE_MASK) | (vaddr & ~PAGE_MASK));
3375+ cf_icache_flush_range(paddr, paddr + 8);
3376+#elif defined(CONFIG_M547X_8X)
3377+ flush_icache_range(vaddr, vaddr + 8);
3378+#endif
3379+}
3380+
3381+static inline void __user *
3382+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
3383+{
3384+ unsigned long usp;
3385+
3386+ /* Default to using normal stack. */
3387+ usp = rdusp();
3388+
3389+ /* This is the X/Open sanctioned signal stack switching. */
3390+ if (ka->sa.sa_flags & SA_ONSTACK) {
3391+ if (!sas_ss_flags(usp))
3392+ usp = current->sas_ss_sp + current->sas_ss_size;
3393+ }
3394+ return (void __user *)((usp - frame_size) & -8UL);
3395+}
3396+
3397+static void setup_frame(int sig, struct k_sigaction *ka,
3398+ sigset_t *set, struct pt_regs *regs)
3399+{
3400+ struct sigframe __user *frame;
3401+ int fsize = frame_extra_sizes[regs->format];
3402+ struct sigcontext context;
3403+ int err = 0;
3404+
3405+ if (fsize < 0) {
3406+#ifdef DEBUG
3407+ printk(KERN_DEBUG "setup_frame: Unknown frame format %#x\n",
3408+ regs->format);
3409+#endif
3410+ goto give_sigsegv;
3411+ }
3412+
3413+ frame = get_sigframe(ka, regs, sizeof(*frame));
3414+
3415+ err |= __put_user((current_thread_info()->exec_domain
3416+ && current_thread_info()->exec_domain->signal_invmap
3417+ && sig < 32
3418+ ? current_thread_info()->exec_domain->signal_invmap[sig]
3419+ : sig),
3420+ &frame->sig);
3421+
3422+ err |= __put_user(regs->vector, &frame->code);
3423+ err |= __put_user(&frame->sc, &frame->psc);
3424+
3425+ if (_NSIG_WORDS > 1)
3426+ err |= copy_to_user(frame->extramask, &set->sig[1],
3427+ sizeof(frame->extramask));
3428+
3429+ setup_sigcontext(&context, regs, set->sig[0]);
3430+ err |= copy_to_user(&frame->sc, &context, sizeof(context));
3431+
3432+ /* Set up to return from userspace. */
3433+ err |= __put_user(frame->retcode, &frame->pretcode);
3434+ /* moveq #,d0; trap #0 */
3435+ err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
3436+ (long __user *)(frame->retcode));
3437+
3438+ if (err)
3439+ goto give_sigsegv;
3440+
3441+ push_cache((unsigned long) &frame->retcode);
3442+
3443+ /* Set up registers for signal handler */
3444+ wrusp((unsigned long) frame);
3445+ regs->pc = (unsigned long) ka->sa.sa_handler;
3446+
3447+adjust_stack:
3448+ /* Prepare to skip over the extra stuff in the exception frame. */
3449+ if (regs->stkadj) {
3450+ struct pt_regs *tregs =
3451+ (struct pt_regs *)((ulong)regs + regs->stkadj);
3452+#ifdef DEBUG
3453+ printk(KERN_DEBUG "Performing stackadjust=%04x\n",
3454+ regs->stkadj);
3455+#endif
3456+ /* This must be copied with decreasing addresses to
3457+ handle overlaps. */
3458+ tregs->vector = 0;
3459+ tregs->format = 0;
3460+ tregs->pc = regs->pc;
3461+ tregs->sr = regs->sr;
3462+ }
3463+ return;
3464+
3465+give_sigsegv:
3466+ force_sigsegv(sig, current);
3467+ goto adjust_stack;
3468+}
3469+
3470+static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
3471+ sigset_t *set, struct pt_regs *regs)
3472+{
3473+ struct rt_sigframe __user *frame;
3474+ int fsize = frame_extra_sizes[regs->format];
3475+ int err = 0;
3476+
3477+ if (fsize < 0) {
3478+#ifdef DEBUG
3479+ printk(KERN_DEBUG "setup_frame: Unknown frame format %#x\n",
3480+ regs->format);
3481+#endif
3482+ goto give_sigsegv;
3483+ }
3484+
3485+ frame = get_sigframe(ka, regs, sizeof(*frame));
3486+
3487+ if (fsize) {
3488+ err |= copy_to_user(&frame->uc.uc_extra, regs + 1, fsize);
3489+ regs->stkadj = fsize;
3490+ }
3491+
3492+ err |= __put_user((current_thread_info()->exec_domain
3493+ && current_thread_info()->exec_domain->signal_invmap
3494+ && sig < 32
3495+ ? current_thread_info()->exec_domain->signal_invmap[sig]
3496+ : sig),
3497+ &frame->sig);
3498+ err |= __put_user(&frame->info, &frame->pinfo);
3499+ err |= __put_user(&frame->uc, &frame->puc);
3500+ err |= copy_siginfo_to_user(&frame->info, info);
3501+
3502+ /* Create the ucontext. */
3503+ err |= __put_user(0, &frame->uc.uc_flags);
3504+ err |= __put_user(NULL, &frame->uc.uc_link);
3505+ err |= __put_user((void __user *)current->sas_ss_sp,
3506+ &frame->uc.uc_stack.ss_sp);
3507+ err |= __put_user(sas_ss_flags(rdusp()),
3508+ &frame->uc.uc_stack.ss_flags);
3509+ err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
3510+ err |= rt_setup_ucontext(&frame->uc, regs);
3511+ err |= copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
3512+
3513+ /* Set up to return from userspace. */
3514+ err |= __put_user(frame->retcode, &frame->pretcode);
3515+
3516+ /* movel #__NR_rt_sigreturn(0xAD),d0; trap #0 */
3517+ err |= __put_user(0x203c0000, (long *)(frame->retcode + 0));
3518+ err |= __put_user(0x00ad4e40, (long *)(frame->retcode + 4));
3519+
3520+ if (err)
3521+ goto give_sigsegv;
3522+
3523+ push_cache((unsigned long) &frame->retcode);
3524+
3525+ /* Set up registers for signal handler */
3526+ wrusp((unsigned long) frame);
3527+ regs->pc = (unsigned long) ka->sa.sa_handler;
3528+
3529+adjust_stack:
3530+ /* Prepare to skip over the extra stuff in the exception frame. */
3531+ if (regs->stkadj) {
3532+ struct pt_regs *tregs =
3533+ (struct pt_regs *)((ulong)regs + regs->stkadj);
3534+#ifdef DEBUG
3535+ printk(KERN_DEBUG "Performing stackadjust=%04x\n",
3536+ regs->stkadj);
3537+#endif
3538+ /* This must be copied with decreasing addresses to
3539+ handle overlaps. */
3540+ tregs->vector = 0;
3541+ tregs->format = 0;
3542+ tregs->pc = regs->pc;
3543+ tregs->sr = regs->sr;
3544+ }
3545+ return;
3546+
3547+give_sigsegv:
3548+ force_sigsegv(sig, current);
3549+ goto adjust_stack;
3550+}
3551+
3552+static inline void
3553+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
3554+{
3555+ switch (regs->d0) {
3556+ case -ERESTARTNOHAND:
3557+ if (!has_handler)
3558+ goto do_restart;
3559+ regs->d0 = -EINTR;
3560+ break;
3561+
3562+ case -ERESTARTSYS:
3563+ if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
3564+ regs->d0 = -EINTR;
3565+ break;
3566+ }
3567+ /* fallthrough */
3568+ case -ERESTARTNOINTR:
3569+do_restart:
3570+ regs->d0 = regs->orig_d0;
3571+ regs->pc -= 2;
3572+ break;
3573+ }
3574+}
3575+
3576+/*
3577+ * OK, we're invoking a handler
3578+ */
3579+static void
3580+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
3581+ sigset_t *oldset, struct pt_regs *regs)
3582+{
3583+ /* are we from a system call? */
3584+ if (regs->orig_d0 >= 0)
3585+ /* If so, check system call restarting.. */
3586+ handle_restart(regs, ka, 1);
3587+
3588+ /* set up the stack frame */
3589+ if (ka->sa.sa_flags & SA_SIGINFO)
3590+ setup_rt_frame(sig, ka, info, oldset, regs);
3591+ else
3592+ setup_frame(sig, ka, oldset, regs);
3593+
3594+ if (ka->sa.sa_flags & SA_ONESHOT)
3595+ ka->sa.sa_handler = SIG_DFL;
3596+
3597+ spin_lock_irq(&current->sighand->siglock);
3598+ sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
3599+ if (!(ka->sa.sa_flags & SA_NODEFER))
3600+ sigaddset(&current->blocked, sig);
3601+ recalc_sigpending();
3602+ spin_unlock_irq(&current->sighand->siglock);
3603+}
3604+
3605+/*
3606+ * Note that 'init' is a special process: it doesn't get signals it doesn't
3607+ * want to handle. Thus you cannot kill init even with a SIGKILL even by
3608+ * mistake.
3609+ */
3610+asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs)
3611+{
3612+ siginfo_t info;
3613+ struct k_sigaction ka;
3614+ int signr;
3615+
3616+ current->thread.esp0 = (unsigned long) regs;
3617+
3618+ if (!oldset)
3619+ oldset = &current->blocked;
3620+
3621+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
3622+ if (signr > 0) {
3623+ /* Whee! Actually deliver the signal. */
3624+ handle_signal(signr, &ka, &info, oldset, regs);
3625+ return 1;
3626+ }
3627+
3628+ /* Did we come from a system call? */
3629+ if (regs->orig_d0 >= 0)
3630+ /* Restart the system call - no handlers present */
3631+ handle_restart(regs, NULL, 0);
3632+
3633+ return 0;
3634+}
3635--- /dev/null
3636+++ b/arch/m68k/coldfire/common/traps.c
3637@@ -0,0 +1,457 @@
3638+/*
3639+ * linux/arch/m68knommu/kernel/traps.c
3640+ *
3641+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
3642+ * Jason Jin Jason.Jin@freescale.com
3643+ * Shrek Wu B16972@freescale.com
3644+ *
3645+ * This file is subject to the terms and conditions of the GNU General Public
3646+ * License. See the file COPYING in the main directory of this archive
3647+ * for more details.
3648+ */
3649+
3650+/*
3651+ * Sets up all exception vectors
3652+ */
3653+#include <linux/sched.h>
3654+#include <linux/signal.h>
3655+#include <linux/kernel.h>
3656+#include <linux/mm.h>
3657+#include <linux/module.h>
3658+#include <linux/types.h>
3659+#include <linux/a.out.h>
3660+#include <linux/user.h>
3661+#include <linux/string.h>
3662+#include <linux/linkage.h>
3663+#include <linux/init.h>
3664+#include <linux/ptrace.h>
3665+#include <linux/kallsyms.h>
3666+
3667+#include <asm/setup.h>
3668+#include <asm/fpu.h>
3669+#include <asm/system.h>
3670+#include <asm/uaccess.h>
3671+#include <asm/traps.h>
3672+#include <asm/pgtable.h>
3673+#include <asm/machdep.h>
3674+#include <asm/siginfo.h>
3675+
3676+static char const * const vec_names[] = {
3677+ "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
3678+ "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
3679+ "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
3680+ "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
3681+ "FORMAT ERROR", "UNINITIALIZED INTERRUPT",
3682+ "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
3683+ "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
3684+ "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
3685+ "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
3686+ "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
3687+ "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
3688+ "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
3689+ "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
3690+ "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
3691+ "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15",
3692+ "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW",
3693+ "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN",
3694+ "FPCP UNSUPPORTED OPERATION",
3695+ "MMU CONFIGURATION ERROR"
3696+};
3697+
3698+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
3699+ unsigned long error_code);
3700+asmlinkage void trap_c(struct frame *fp);
3701+extern void __init coldfire_trap_init(void);
3702+
3703+void __init trap_init(void)
3704+{
3705+ coldfire_trap_init();
3706+}
3707+
3708+/* The following table converts the FS encoding of a ColdFire
3709+ exception stack frame into the error_code value needed by
3710+ do_fault. */
3711+
3712+static const unsigned char fs_err_code[] = {
3713+ 0, /* 0000 */
3714+ 0, /* 0001 */
3715+ 0, /* 0010 */
3716+ 0, /* 0011 */
3717+ 1, /* 0100 */
3718+ 0, /* 0101 */
3719+ 0, /* 0110 */
3720+ 0, /* 0111 */
3721+ 2, /* 1000 */
3722+ 3, /* 1001 */
3723+ 2, /* 1010 */
3724+ 0, /* 1011 */
3725+ 1, /* 1100 */
3726+ 1, /* 1101 */
3727+ 0, /* 1110 */
3728+ 0 /* 1111 */
3729+};
3730+
3731+#ifdef DEBUG
3732+static const char *fs_err_msg[16] = {
3733+ "Normal",
3734+ "Reserved",
3735+ "Interrupt during debug service routine",
3736+ "Reserved",
3737+ "X Protection",
3738+ "TLB X miss (opword)",
3739+ "TLB X miss (ext. word)",
3740+ "IFP in emulator mode",
3741+ "W Protection",
3742+ "Write error",
3743+ "TLB W miss",
3744+ "Reserved",
3745+ "R Protection",
3746+ "R/RMW Protection",
3747+ "TLB R miss",
3748+ "OEP in emulator mode",
3749+};
3750+#endif
3751+
3752+static inline void access_errorCF(struct frame *fp)
3753+{
3754+ unsigned long int mmusr, complainingAddress;
3755+ unsigned int err_code, fs;
3756+ int need_page_fault;
3757+
3758+ mmusr = fp->ptregs.mmusr;
3759+ complainingAddress = fp->ptregs.mmuar;
3760+#ifdef DEBUG
3761+ printk(KERN_DEBUG "pc %#lx, mmusr %#lx, complainingAddress %#lx\n", \
3762+ fp->ptregs.pc, mmusr, complainingAddress);
3763+#endif
3764+
3765+ /*
3766+ * error_code:
3767+ * bit 0 == 0 means no page found, 1 means protection fault
3768+ * bit 1 == 0 means read, 1 means write
3769+ */
3770+
3771+ fs = (fp->ptregs.fs2 << 2) | fp->ptregs.fs1;
3772+ switch (fs) {
3773+ case 5: /* 0101 TLB opword X miss */
3774+ need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
3775+ complainingAddress = fp->ptregs.pc;
3776+ break;
3777+ case 6: /* 0110 TLB extension word X miss */
3778+ need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
3779+ complainingAddress = fp->ptregs.pc + sizeof(long);
3780+ break;
3781+ case 10: /* 1010 TLB W miss */
3782+ need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
3783+ break;
3784+ case 14: /* 1110 TLB R miss */
3785+ need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
3786+ break;
3787+ default:
3788+ /* 0000 Normal */
3789+ /* 0001 Reserved */
3790+ /* 0010 Interrupt during debug service routine */
3791+ /* 0011 Reserved */
3792+ /* 0100 X Protection */
3793+ /* 0111 IFP in emulator mode */
3794+ /* 1000 W Protection*/
3795+ /* 1001 Write error*/
3796+ /* 1011 Reserved*/
3797+ /* 1100 R Protection*/
3798+ /* 1101 R Protection*/
3799+ /* 1111 OEP in emulator mode*/
3800+ need_page_fault = 1;
3801+ break;
3802+ }
3803+
3804+ if (need_page_fault) {
3805+ err_code = fs_err_code[fs];
3806+ if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
3807+ err_code |= 2; /* bit1 - write, bit0 - protection */
3808+ do_page_fault(&fp->ptregs, complainingAddress, err_code);
3809+ }
3810+}
3811+
3812+void die_if_kernel(char *str, struct pt_regs *fp, int nr)
3813+{
3814+ if (!(fp->sr & PS_S))
3815+ return;
3816+
3817+ console_verbose();
3818+ printk(KERN_EMERG "%s: %08x\n", str, nr);
3819+ printk(KERN_EMERG "PC: [<%08lx>]", fp->pc);
3820+ print_symbol(" %s", fp->pc);
3821+ printk(KERN_EMERG "\nSR: %04x SP: %p a2: %08lx\n",
3822+ fp->sr, fp, fp->a2);
3823+ printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
3824+ fp->d0, fp->d1, fp->d2, fp->d3);
3825+ printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
3826+ fp->d4, fp->d5, fp->a0, fp->a1);
3827+
3828+ printk(KERN_EMERG "Process %s (pid: %d, stackpage=%08lx)\n",
3829+ current->comm, current->pid, PAGE_SIZE+(unsigned long)current);
3830+ show_stack(NULL, (unsigned long *)fp);
3831+ do_exit(SIGSEGV);
3832+}
3833+
3834+asmlinkage void buserr_c(struct frame *fp)
3835+{
3836+ unsigned int fs;
3837+
3838+ /* Only set esp0 if coming from user mode */
3839+ if (user_mode(&fp->ptregs))
3840+ current->thread.esp0 = (unsigned long) fp;
3841+
3842+ fs = (fp->ptregs.fs2 << 2) | fp->ptregs.fs1;
3843+#if defined(DEBUG)
3844+ printk(KERN_DEBUG "*** Bus Error *** (%x)%s\n", fs,
3845+ fs_err_msg[fs & 0xf]);
3846+#endif
3847+ switch (fs) {
3848+ case 0x5:
3849+ case 0x6:
3850+ case 0x7:
3851+ case 0x9:
3852+ case 0xa:
3853+ case 0xd:
3854+ case 0xe:
3855+ case 0xf:
3856+ access_errorCF(fp);
3857+ break;
3858+ default:
3859+ die_if_kernel("bad frame format", &fp->ptregs, 0);
3860+#if defined(DEBUG)
3861+ printk(KERN_DEBUG "Unknown SIGSEGV - 4\n");
3862+#endif
3863+ force_sig(SIGSEGV, current);
3864+ }
3865+}
3866+
3867+void show_trace(unsigned long *stack)
3868+{
3869+ unsigned long *endstack;
3870+ unsigned long addr;
3871+ int i;
3872+
3873+ printk(KERN_INFO "Call Trace:");
3874+ addr = (unsigned long)stack + THREAD_SIZE - 1;
3875+ endstack = (unsigned long *)(addr & -THREAD_SIZE);
3876+ i = 0;
3877+ while (stack + 1 <= endstack) {
3878+ addr = *stack++;
3879+ /*
3880+ * If the address is either in the text segment of the
3881+ * kernel, or in the region which contains vmalloc'ed
3882+ * memory, it *may* be the address of a calling
3883+ * routine; if so, print it so that someone tracing
3884+ * down the cause of the crash will be able to figure
3885+ * out the call path that was taken.
3886+ */
3887+ if (__kernel_text_address(addr)) {
3888+#ifndef CONFIG_KALLSYMS
3889+ if (i % 5 == 0)
3890+ printk("\n ");
3891+#endif
3892+ printk(" [<%08lx>] %pS\n", addr, (void *)addr);
3893+ i++;
3894+ }
3895+ }
3896+ printk(KERN_INFO "\n");
3897+}
3898+
3899+int kstack_depth_to_print = 48;
3900+void show_stack(struct task_struct *task, unsigned long *stack)
3901+{
3902+ unsigned long *p;
3903+ unsigned long *endstack;
3904+ int i;
3905+
3906+ if (!stack) {
3907+ if (task)
3908+ stack = (unsigned long *)task->thread.esp0;
3909+ else
3910+ stack = (unsigned long *)&stack;
3911+ }
3912+ endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1)
3913+ & -THREAD_SIZE);
3914+
3915+ printk(KERN_INFO "Stack from %08lx:", (unsigned long)stack);
3916+ p = stack;
3917+ for (i = 0; i < kstack_depth_to_print; i++) {
3918+ if (p + 1 > endstack)
3919+ break;
3920+ if (i % 8 == 0)
3921+ printk("\n ");
3922+ printk(" %08lx", *p++);
3923+ }
3924+ printk("\n");
3925+ show_trace(stack);
3926+}
3927+
3928+void bad_super_trap(struct frame *fp)
3929+{
3930+ console_verbose();
3931+ if (fp->ptregs.vector < sizeof(vec_names)/sizeof(vec_names[0]))
3932+ printk(KERN_WARNING "*** %s *** FORMAT=%X\n",
3933+ vec_names[fp->ptregs.vector],
3934+ fp->ptregs.format);
3935+ else
3936+ printk(KERN_WARNING "*** Exception %d *** FORMAT=%X\n",
3937+ fp->ptregs.vector,
3938+ fp->ptregs.format);
3939+ printk(KERN_WARNING "Current process id is %d\n", current->pid);
3940+ die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
3941+}
3942+
3943+asmlinkage void trap_c(struct frame *fp)
3944+{
3945+ int sig;
3946+ siginfo_t info;
3947+
3948+ if (fp->ptregs.sr & PS_S) {
3949+ if (fp->ptregs.vector == VEC_TRACE) {
3950+ /* traced a trapping instruction */
3951+ current->ptrace |= PT_DTRACE;
3952+ } else
3953+ bad_super_trap(fp);
3954+ return;
3955+ }
3956+
3957+ /* send the appropriate signal to the user program */
3958+ switch (fp->ptregs.vector) {
3959+ case VEC_ADDRERR:
3960+ info.si_code = BUS_ADRALN;
3961+ sig = SIGBUS;
3962+ break;
3963+ case VEC_ILLEGAL:
3964+ case VEC_LINE10:
3965+ case VEC_LINE11:
3966+ info.si_code = ILL_ILLOPC;
3967+ sig = SIGILL;
3968+ break;
3969+ case VEC_PRIV:
3970+ info.si_code = ILL_PRVOPC;
3971+ sig = SIGILL;
3972+ break;
3973+ case VEC_COPROC:
3974+ info.si_code = ILL_COPROC;
3975+ sig = SIGILL;
3976+ break;
3977+ case VEC_TRAP1: /* gdbserver breakpoint */
3978+ fp->ptregs.pc -= 2;
3979+ info.si_code = TRAP_TRACE;
3980+ sig = SIGTRAP;
3981+ break;
3982+ case VEC_TRAP2:
3983+ case VEC_TRAP3:
3984+ case VEC_TRAP4:
3985+ case VEC_TRAP5:
3986+ case VEC_TRAP6:
3987+ case VEC_TRAP7:
3988+ case VEC_TRAP8:
3989+ case VEC_TRAP9:
3990+ case VEC_TRAP10:
3991+ case VEC_TRAP11:
3992+ case VEC_TRAP12:
3993+ case VEC_TRAP13:
3994+ case VEC_TRAP14:
3995+ info.si_code = ILL_ILLTRP;
3996+ sig = SIGILL;
3997+ break;
3998+ case VEC_FPBRUC:
3999+ case VEC_FPOE:
4000+ case VEC_FPNAN:
4001+ info.si_code = FPE_FLTINV;
4002+ sig = SIGFPE;
4003+ break;
4004+ case VEC_FPIR:
4005+ info.si_code = FPE_FLTRES;
4006+ sig = SIGFPE;
4007+ break;
4008+ case VEC_FPDIVZ:
4009+ info.si_code = FPE_FLTDIV;
4010+ sig = SIGFPE;
4011+ break;
4012+ case VEC_FPUNDER:
4013+ info.si_code = FPE_FLTUND;
4014+ sig = SIGFPE;
4015+ break;
4016+ case VEC_FPOVER:
4017+ info.si_code = FPE_FLTOVF;
4018+ sig = SIGFPE;
4019+ break;
4020+ case VEC_ZERODIV:
4021+ info.si_code = FPE_INTDIV;
4022+ sig = SIGFPE;
4023+ break;
4024+ case VEC_CHK:
4025+ case VEC_TRAP:
4026+ info.si_code = FPE_INTOVF;
4027+ sig = SIGFPE;
4028+ break;
4029+ case VEC_TRACE: /* ptrace single step */
4030+ info.si_code = TRAP_TRACE;
4031+ sig = SIGTRAP;
4032+ break;
4033+ case VEC_TRAP15: /* breakpoint */
4034+ info.si_code = TRAP_BRKPT;
4035+ sig = SIGTRAP;
4036+ break;
4037+ default:
4038+ info.si_code = ILL_ILLOPC;
4039+ sig = SIGILL;
4040+ break;
4041+ }
4042+ info.si_signo = sig;
4043+ info.si_errno = 0;
4044+ switch (fp->ptregs.format) {
4045+ default:
4046+ info.si_addr = (void *) fp->ptregs.pc;
4047+ break;
4048+ case 2:
4049+ info.si_addr = (void *) fp->un.fmt2.iaddr;
4050+ break;
4051+ case 7:
4052+ info.si_addr = (void *) fp->un.fmt7.effaddr;
4053+ break;
4054+ case 9:
4055+ info.si_addr = (void *) fp->un.fmt9.iaddr;
4056+ break;
4057+ case 10:
4058+ info.si_addr = (void *) fp->un.fmta.daddr;
4059+ break;
4060+ case 11:
4061+ info.si_addr = (void *) fp->un.fmtb.daddr;
4062+ break;
4063+ }
4064+ force_sig_info(sig, &info, current);
4065+}
4066+
4067+asmlinkage void set_esp0(unsigned long ssp)
4068+{
4069+ current->thread.esp0 = ssp;
4070+}
4071+
4072+/*
4073+ * The architecture-independent backtrace generator
4074+ */
4075+void dump_stack(void)
4076+{
4077+ unsigned long stack;
4078+
4079+ show_stack(current, &stack);
4080+}
4081+EXPORT_SYMBOL(dump_stack);
4082+
4083+#ifdef CONFIG_M68KFPU_EMU
4084+asmlinkage void fpemu_signal(int signal, int code, void *addr)
4085+{
4086+ siginfo_t info;
4087+
4088+ info.si_signo = signal;
4089+ info.si_errno = 0;
4090+ info.si_code = code;
4091+ info.si_addr = addr;
4092+ force_sig_info(signal, &info, current);
4093+}
4094+#endif
4095--- a/arch/m68k/include/asm/atomic.h
4096+++ b/arch/m68k/include/asm/atomic.h
4097@@ -1,3 +1,11 @@
4098+/*
4099+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
4100+ *
4101+ * This file is subject to the terms and conditions of the GNU General Public
4102+ * License. See the file COPYING in the main directory of this archive
4103+ * for more details.
4104+ */
4105+
4106 #ifndef __ARCH_M68K_ATOMIC__
4107 #define __ARCH_M68K_ATOMIC__
4108 
4109@@ -30,12 +38,20 @@
4110 
4111 static inline void atomic_add(int i, atomic_t *v)
4112 {
4113- __asm__ __volatile__("addl %1,%0" : "+m" (*v) : ASM_DI (i));
4114+#ifndef CONFIG_COLDFIRE
4115+ __asm__ __volatile__("addl %1,%0" : "+m" (*v) : ASM_DI(i));
4116+#else
4117+ __asm__ __volatile__("addl %1,%0" : "=m" (*v) : ASM_DI(i), "m" (*v));
4118+#endif
4119 }
4120 
4121 static inline void atomic_sub(int i, atomic_t *v)
4122 {
4123- __asm__ __volatile__("subl %1,%0" : "+m" (*v) : ASM_DI (i));
4124+#ifndef CONFIG_COLDFIRE
4125+ __asm__ __volatile__("subl %1,%0" : "+m" (*v) : ASM_DI(i));
4126+#else
4127+ __asm__ __volatile__("subl %1,%0" : "=m" (*v) : ASM_DI(i), "m" (*v));
4128+#endif
4129 }
4130 
4131 static inline void atomic_inc(atomic_t *v)
4132@@ -55,6 +71,14 @@ static inline int atomic_dec_and_test(at
4133     return c != 0;
4134 }
4135 
4136+static inline int atomic_dec_and_test_lt(volatile atomic_t *v)
4137+{
4138+ char c;
4139+ __asm__ __volatile__("subql #1,%1; slt %0" : "=d" (c), "=m" (*v)
4140+ : "m" (*v));
4141+ return c != 0 ;
4142+}
4143+
4144 static inline int atomic_inc_and_test(atomic_t *v)
4145 {
4146     char c;
4147@@ -167,9 +191,14 @@ static inline int atomic_sub_and_test(in
4148 static inline int atomic_add_negative(int i, atomic_t *v)
4149 {
4150     char c;
4151+#ifndef CONFIG_COLDFIRE
4152     __asm__ __volatile__("addl %2,%1; smi %0"
4153                  : "=d" (c), "+m" (*v)
4154                  : "id" (i));
4155+#else
4156+ __asm__ __volatile__("addl %2,%1; smi %0" : "=d" (c), "=m" (*v)
4157+ : "d" (i) , "m" (*v));
4158+#endif
4159     return c != 0;
4160 }
4161 
4162--- a/arch/m68k/include/asm/bitops_mm.h
4163+++ b/arch/m68k/include/asm/bitops_mm.h
4164@@ -1,12 +1,18 @@
4165-#ifndef _M68K_BITOPS_H
4166-#define _M68K_BITOPS_H
4167 /*
4168  * Copyright 1992, Linus Torvalds.
4169  *
4170+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
4171+ *
4172  * This file is subject to the terms and conditions of the GNU General Public
4173  * License. See the file COPYING in the main directory of this archive
4174  * for more details.
4175  */
4176+#ifndef _M68K_BITOPS_H
4177+#define _M68K_BITOPS_H
4178+
4179+#ifdef CONFIG_COLDFIRE
4180+#include <asm/cf_bitops.h>
4181+#else
4182 
4183 #ifndef _LINUX_BITOPS_H
4184 #error only <linux/bitops.h> can be included directly
4185@@ -463,4 +469,6 @@ static inline unsigned long generic_find
4186 
4187 #endif /* __KERNEL__ */
4188 
4189+#endif /* CONFIG_COLDFIRE */
4190+
4191 #endif /* _M68K_BITOPS_H */
4192--- a/arch/m68k/include/asm/bootinfo.h
4193+++ b/arch/m68k/include/asm/bootinfo.h
4194@@ -2,6 +2,7 @@
4195 ** asm/bootinfo.h -- Definition of the Linux/m68k boot information structure
4196 **
4197 ** Copyright 1992 by Greg Harp
4198+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
4199 **
4200 ** This file is subject to the terms and conditions of the GNU General Public
4201 ** License. See the file COPYING in the main directory of this archive
4202@@ -24,6 +25,47 @@
4203 #ifndef _M68K_BOOTINFO_H
4204 #define _M68K_BOOTINFO_H
4205 
4206+#ifndef __ASSEMBLY__
4207+/*
4208+ * UBoot Support
4209+ *
4210+ * bd_info structure from uboot1.3.2/arch/m68k/include/asm/u-boot.h
4211+ */
4212+struct bd_info {
4213+ unsigned long bi_memstart; /* start of DRAM memory */
4214+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
4215+ unsigned long bi_flashstart; /* start of FLASH memory */
4216+ unsigned long bi_flashsize; /* size of FLASH memory */
4217+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
4218+ unsigned long bi_sramstart; /* start of SRAM memory */
4219+ unsigned long bi_sramsize; /* size of SRAM memory */
4220+ unsigned long bi_mbar_base; /* base of internal registers */
4221+ unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
4222+ unsigned long bi_boot_params; /* where this board expects params */
4223+ unsigned long bi_ip_addr; /* IP Address */
4224+ unsigned char bi_enet0addr[6]; /* Ethernet 0 mac address */
4225+ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
4226+ unsigned long bi_intfreq; /* Internal Freq, in MHz */
4227+ unsigned long bi_busfreq; /* Bus Freq, in MHz */
4228+#ifdef UBOOT_EXTRA_CLOCK
4229+ unsigned long bi_inpfreq; /* input Freq in MHz */
4230+ unsigned long bi_vcofreq; /* vco Freq in MHz */
4231+ unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
4232+#endif
4233+ unsigned long bi_baudrate; /* Console Baudrate */
4234+ unsigned char bi_enet1addr[6]; /* eth1 mac address */
4235+ unsigned char bi_enet2addr[6]; /* eth2 mac address */
4236+ unsigned char bi_enet3addr[6]; /* eth3 mac address */
4237+};
4238+
4239+struct uboot_record {
4240+ struct bd_info *bdi;
4241+ unsigned long initrd_start;
4242+ unsigned long initrd_end;
4243+ unsigned long cmd_line_start;
4244+ unsigned long cmd_line_stop;
4245+};
4246+#endif /* __ASSEMBLY__ */
4247 
4248     /*
4249      * Bootinfo definitions
4250--- a/arch/m68k/include/asm/cacheflush_mm.h
4251+++ b/arch/m68k/include/asm/cacheflush_mm.h
4252@@ -1,3 +1,11 @@
4253+/*
4254+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
4255+ *
4256+ * This file is subject to the terms and conditions of the GNU General Public
4257+ * License. See the file COPYING in the main directory of this archive
4258+ * for more details.
4259+ */
4260+
4261 #ifndef _M68K_CACHEFLUSH_H
4262 #define _M68K_CACHEFLUSH_H
4263 
4264@@ -6,6 +14,10 @@
4265 /* cache code */
4266 #define FLUSH_I_AND_D (0x00000808)
4267 #define FLUSH_I (0x00000008)
4268+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
4269+#ifdef CONFIG_COLDFIRE
4270+#include <asm/cf_cacheflush.h>
4271+#else /* !CONFIG_COLDFIRE */
4272 
4273 /*
4274  * Cache handling functions
4275@@ -128,7 +140,6 @@ static inline void __flush_page_to_ram(v
4276     }
4277 }
4278 
4279-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
4280 #define flush_dcache_page(page) __flush_page_to_ram(page_address(page))
4281 #define flush_dcache_mmap_lock(mapping) do { } while (0)
4282 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
4283@@ -154,4 +165,5 @@ static inline void copy_from_user_page(s
4284     memcpy(dst, src, len);
4285 }
4286 
4287+#endif /* !CONFIG_COLDFIRE */
4288 #endif /* _M68K_CACHEFLUSH_H */
4289--- /dev/null
4290+++ b/arch/m68k/include/asm/cf-sram.h
4291@@ -0,0 +1,21 @@
4292+/*
4293+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
4294+ * Author: Lanttor.Guo@freescale.com
4295+ *
4296+ * Providing on-chip SRAM allocation and free APIs to kernel
4297+ *
4298+ * This program is free software; you can redistribute it and/or modify
4299+ * it under the terms of the GNU General Public License as published by
4300+ * the Free Software Foundation; either version 2 of the License, or
4301+ * (at your option) any later version.
4302+ */
4303+
4304+#ifndef CF_SRAM_H
4305+#define CF_SRAM_H
4306+
4307+extern int declare_sram_pool(void *start, size_t size);
4308+
4309+extern void *sram_alloc(size_t len);
4310+extern void sram_free(void *addr, size_t len);
4311+
4312+#endif
4313--- /dev/null
4314+++ b/arch/m68k/include/asm/cf_bitops.h
4315@@ -0,0 +1,443 @@
4316+/*
4317+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
4318+ *
4319+ * This file is subject to the terms and conditions of the GNU General Public
4320+ * License. See the file COPYING in the main directory of this archive
4321+ * for more details.
4322+ */
4323+#ifndef __CF_BITOPS__
4324+#define __CF_BITOPS__
4325+
4326+#ifndef _LINUX_BITOPS_H
4327+#error only <linux/bitops.h> can be included directly
4328+#endif
4329+
4330+#include <linux/compiler.h>
4331+
4332+#define test_and_set_bit(nr, vaddr) \
4333+ (__builtin_constant_p(nr) ? \
4334+ __constant_coldfire_test_and_set_bit(nr, vaddr) : \
4335+ __generic_coldfire_test_and_set_bit(nr, vaddr))
4336+
4337+static inline int __constant_coldfire_test_and_set_bit(int nr,
4338+ volatile void *vaddr)
4339+{
4340+ char retval;
4341+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4342+ __asm__ __volatile__ ("bset %2,(%4); sne %0"
4343+ : "=d" (retval), "=m" (*p)
4344+ : "di" (nr & 7), "m" (*p), "a" (p));
4345+ return retval;
4346+}
4347+
4348+static inline int __generic_coldfire_test_and_set_bit(int nr,
4349+ volatile void *vaddr)
4350+{
4351+ char retval;
4352+
4353+ __asm__ __volatile__ ("bset %2,%1; sne %0"
4354+ : "=d" (retval), "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4355+ : "d" (nr)
4356+ : "memory");
4357+ return retval;
4358+}
4359+#define __test_and_set_bit(nr, vaddr) test_and_set_bit(nr, vaddr)
4360+
4361+#define set_bit(nr, vaddr) \
4362+ (__builtin_constant_p(nr) ? \
4363+ __constant_coldfire_set_bit(nr, vaddr) : \
4364+ __generic_coldfire_set_bit(nr, vaddr))
4365+
4366+static inline void __constant_coldfire_set_bit(int nr,
4367+ volatile void *vaddr)
4368+{
4369+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4370+ __asm__ __volatile__ ("bset %1,(%3)"
4371+ : "=m" (*p) : "di" (nr & 7), "m" (*p), "a" (p));
4372+}
4373+
4374+static inline void __generic_coldfire_set_bit(int nr,
4375+ volatile void *vaddr)
4376+{
4377+ __asm__ __volatile__ ("bset %1,%0"
4378+ : "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4379+ : "d" (nr)
4380+ : "memory");
4381+}
4382+#define __set_bit(nr, vaddr) set_bit(nr, vaddr)
4383+
4384+#define test_and_clear_bit(nr, vaddr) \
4385+ (__builtin_constant_p(nr) ? \
4386+ __constant_coldfire_test_and_clear_bit(nr, vaddr) : \
4387+ __generic_coldfire_test_and_clear_bit(nr, vaddr))
4388+
4389+static inline int __constant_coldfire_test_and_clear_bit(int nr,
4390+ volatile void *vaddr)
4391+{
4392+ char retval;
4393+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4394+
4395+ __asm__ __volatile__ ("bclr %2,(%4); sne %0"
4396+ : "=d" (retval), "=m" (*p)
4397+ : "id" (nr & 7), "m" (*p), "a" (p));
4398+
4399+ return retval;
4400+}
4401+
4402+static inline int __generic_coldfire_test_and_clear_bit(int nr,
4403+ volatile void *vaddr)
4404+{
4405+ char retval;
4406+
4407+ __asm__ __volatile__ ("bclr %2,%1; sne %0"
4408+ : "=d" (retval), "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4409+ : "d" (nr & 7)
4410+ : "memory");
4411+
4412+ return retval;
4413+}
4414+#define __test_and_clear_bit(nr, vaddr) test_and_clear_bit(nr, vaddr)
4415+
4416+/*
4417+ * clear_bit() doesn't provide any barrier for the compiler.
4418+ */
4419+#define smp_mb__before_clear_bit() barrier()
4420+#define smp_mb__after_clear_bit() barrier()
4421+
4422+#define clear_bit(nr, vaddr) \
4423+ (__builtin_constant_p(nr) ? \
4424+ __constant_coldfire_clear_bit(nr, vaddr) : \
4425+ __generic_coldfire_clear_bit(nr, vaddr))
4426+
4427+static inline void __constant_coldfire_clear_bit(int nr,
4428+ volatile void *vaddr)
4429+{
4430+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4431+ __asm__ __volatile__ ("bclr %1,(%3)"
4432+ : "=m" (*p) : "id" (nr & 7), "m" (*p), "a" (p));
4433+}
4434+
4435+static inline void __generic_coldfire_clear_bit(int nr,
4436+ volatile void *vaddr)
4437+{
4438+ __asm__ __volatile__ ("bclr %1,%0"
4439+ : "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4440+ : "d" (nr)
4441+ : "memory");
4442+}
4443+#define __clear_bit(nr, vaddr) clear_bit(nr, vaddr)
4444+
4445+#define test_and_change_bit(nr, vaddr) \
4446+ (__builtin_constant_p(nr) ? \
4447+ __constant_coldfire_test_and_change_bit(nr, vaddr) : \
4448+ __generic_coldfire_test_and_change_bit(nr, vaddr))
4449+
4450+static inline int __constant_coldfire_test_and_change_bit(int nr,
4451+ volatile void *vaddr)
4452+{
4453+ char retval;
4454+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4455+
4456+ __asm__ __volatile__ ("bchg %2,(%4); sne %0"
4457+ : "=d" (retval), "=m" (*p)
4458+ : "id" (nr & 7), "m" (*p), "a" (p));
4459+
4460+ return retval;
4461+}
4462+
4463+static inline int __generic_coldfire_test_and_change_bit(int nr,
4464+ volatile void *vaddr)
4465+{
4466+ char retval;
4467+
4468+ __asm__ __volatile__ ("bchg %2,%1; sne %0"
4469+ : "=d" (retval), "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4470+ : "id" (nr)
4471+ : "memory");
4472+
4473+ return retval;
4474+}
4475+#define __test_and_change_bit(nr, vaddr) test_and_change_bit(nr, vaddr)
4476+#define __change_bit(nr, vaddr) change_bit(nr, vaddr)
4477+
4478+#define change_bit(nr, vaddr) \
4479+ (__builtin_constant_p(nr) ? \
4480+ __constant_coldfire_change_bit(nr, vaddr) : \
4481+ __generic_coldfire_change_bit(nr, vaddr))
4482+
4483+static inline void __constant_coldfire_change_bit(int nr,
4484+ volatile void *vaddr)
4485+{
4486+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
4487+ __asm__ __volatile__ ("bchg %1,(%3)"
4488+ : "=m" (*p) : "id" (nr & 7), "m" (*p), "a" (p));
4489+}
4490+
4491+static inline void __generic_coldfire_change_bit(int nr,
4492+ volatile void *vaddr)
4493+{
4494+ __asm__ __volatile__ ("bchg %1,%0"
4495+ : "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
4496+ : "d" (nr)
4497+ : "memory");
4498+}
4499+
4500+static inline int test_bit(int nr, const unsigned long *vaddr)
4501+{
4502+ return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;
4503+}
4504+
4505+static inline unsigned long ffz(unsigned long word)
4506+{
4507+ unsigned long result = 0;
4508+
4509+ while (word & 1) {
4510+ result++;
4511+ word >>= 1;
4512+ }
4513+ return result;
4514+}
4515+
4516+/* find_next_zero_bit() finds the first zero bit in a bit string of length
4517+ * 'size' bits, starting the search at bit 'offset'. This is largely based
4518+ * on Linus's ALPHA routines.
4519+ */
4520+static inline unsigned long find_next_zero_bit(void *addr,
4521+ unsigned long size, unsigned long offset)
4522+{
4523+ unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
4524+ unsigned long result = offset & ~31UL;
4525+ unsigned long tmp;
4526+
4527+ if (offset >= size)
4528+ return size;
4529+ size -= result;
4530+ offset &= 31UL;
4531+ if (offset) {
4532+ tmp = *(p++);
4533+ tmp |= ~0UL >> (32-offset);
4534+ if (size < 32)
4535+ goto found_first;
4536+ if (~tmp)
4537+ goto found_middle;
4538+ size -= 32;
4539+ result += 32;
4540+ }
4541+ while (size & ~31UL) {
4542+ tmp = *(p++);
4543+ if (~tmp)
4544+ goto found_middle;
4545+ result += 32;
4546+ size -= 32;
4547+ }
4548+ if (!size)
4549+ return result;
4550+ tmp = *p;
4551+
4552+found_first:
4553+ tmp |= ~0UL >> size;
4554+found_middle:
4555+ return result + ffz(tmp);
4556+}
4557+
4558+#define find_first_zero_bit(addr, size) find_next_zero_bit(((void *)addr), \
4559+ (size), 0)
4560+
4561+/* Ported from included/linux/bitops.h */
4562+static inline int ffs(int x)
4563+{
4564+ int r = 1;
4565+
4566+ if (!x)
4567+ return 0;
4568+ if (!(x & 0xffff)) {
4569+ x >>= 16;
4570+ r += 16;
4571+ }
4572+ if (!(x & 0xff)) {
4573+ x >>= 8;
4574+ r += 8;
4575+ }
4576+ if (!(x & 0xf)) {
4577+ x >>= 4;
4578+ r += 4;
4579+ }
4580+ if (!(x & 3)) {
4581+ x >>= 2;
4582+ r += 2;
4583+ }
4584+ if (!(x & 1)) {
4585+ x >>= 1;
4586+ r += 1;
4587+ }
4588+ return r;
4589+}
4590+#define __ffs(x) (ffs(x) - 1)
4591+
4592+/* find_next_bit - find the next set bit in a memory region
4593+ * (from asm-ppc/bitops.h)
4594+ */
4595+static inline unsigned long find_next_bit(const unsigned long *addr,
4596+ unsigned long size, unsigned long offset)
4597+{
4598+ unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
4599+ unsigned int result = offset & ~31UL;
4600+ unsigned int tmp;
4601+
4602+ if (offset >= size)
4603+ return size;
4604+ size -= result;
4605+ offset &= 31UL;
4606+ if (offset) {
4607+ tmp = *p++;
4608+ tmp &= ~0UL << offset;
4609+ if (size < 32)
4610+ goto found_first;
4611+ if (tmp)
4612+ goto found_middle;
4613+ size -= 32;
4614+ result += 32;
4615+ }
4616+ while (size >= 32) {
4617+ tmp = *p++;
4618+ if (tmp != 0)
4619+ goto found_middle;
4620+ result += 32;
4621+ size -= 32;
4622+ }
4623+ if (!size)
4624+ return result;
4625+ tmp = *p;
4626+
4627+found_first:
4628+ tmp &= ~0UL >> (32 - size);
4629+ if (tmp == 0UL) /* Are any bits set? */
4630+ return result + size; /* Nope. */
4631+found_middle:
4632+ return result + __ffs(tmp);
4633+}
4634+
4635+#define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
4636+
4637+#ifdef __KERNEL__
4638+
4639+/* Ported from include/linux/bitops.h */
4640+static inline int fls(int x)
4641+{
4642+ int r = 32;
4643+
4644+ if (!x)
4645+ return 0;
4646+ if (!(x & 0xffff0000u)) {
4647+ x <<= 16;
4648+ r -= 16;
4649+ }
4650+ if (!(x & 0xff000000u)) {
4651+ x <<= 8;
4652+ r -= 8;
4653+ }
4654+ if (!(x & 0xf0000000u)) {
4655+ x <<= 4;
4656+ r -= 4;
4657+ }
4658+ if (!(x & 0xc0000000u)) {
4659+ x <<= 2;
4660+ r -= 2;
4661+ }
4662+ if (!(x & 0x80000000u)) {
4663+ x <<= 1;
4664+ r -= 1;
4665+ }
4666+ return r;
4667+}
4668+
4669+static inline int __fls(int x)
4670+{
4671+ return fls(x) - 1;
4672+}
4673+
4674+#include <asm-generic/bitops/fls64.h>
4675+#include <asm-generic/bitops/sched.h>
4676+#include <asm-generic/bitops/hweight.h>
4677+#include <asm-generic/bitops/lock.h>
4678+
4679+#define minix_find_first_zero_bit(addr, size) find_next_zero_bit((addr), \
4680+ (size), 0)
4681+#define minix_test_and_set_bit(nr, addr) test_and_set_bit((nr), \
4682+ (unsigned long *)(addr))
4683+#define minix_set_bit(nr, addr) set_bit((nr), \
4684+ (unsigned long *)(addr))
4685+#define minix_test_and_clear_bit(nr, addr) test_and_clear_bit((nr), \
4686+ (unsigned long *)(addr))
4687+
4688+static inline int minix_test_bit(int nr, const volatile unsigned long *vaddr)
4689+{
4690+ int *a = (int *)vaddr;
4691+ int mask;
4692+
4693+ a += nr >> 5;
4694+ mask = 1 << (nr & 0x1f);
4695+ return ((mask & *a) != 0);
4696+}
4697+
4698+#define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 24, \
4699+ (unsigned long *)(addr))
4700+#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, \
4701+ (unsigned long *)(addr))
4702+#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 24, \
4703+ (unsigned long *)(addr))
4704+#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, \
4705+ (unsigned long *)(addr))
4706+
4707+static inline int ext2_test_bit(int nr, const void *vaddr)
4708+{
4709+ const unsigned char *p = vaddr;
4710+ return (p[nr >> 3] & (1U << (nr & 7))) != 0;
4711+}
4712+
4713+static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
4714+{
4715+ const unsigned long *p = vaddr, *addr = vaddr;
4716+ int res;
4717+
4718+ if (!size)
4719+ return 0;
4720+
4721+ size = (size >> 5) + ((size & 31) > 0);
4722+ while (*p++ == ~0UL) {
4723+ if (--size == 0)
4724+ return (p - addr) << 5;
4725+ }
4726+
4727+ --p;
4728+ for (res = 0; res < 32; res++)
4729+ if (!ext2_test_bit(res, p))
4730+ break;
4731+ return (p - addr) * 32 + res;
4732+}
4733+
4734+static inline int ext2_find_next_zero_bit(const void *vaddr, unsigned size,
4735+ unsigned offset)
4736+{
4737+ const unsigned long *addr = vaddr;
4738+ const unsigned long *p = addr + (offset >> 5);
4739+ int bit = offset & 31UL, res;
4740+
4741+ if (offset >= size)
4742+ return size;
4743+
4744+ if (bit) {
4745+ /* Look for zero in first longword */
4746+ for (res = bit; res < 32; res++)
4747+ if (!ext2_test_bit(res, p))
4748+ return (p - addr) * 32 + res;
4749+ p++;
4750+ }
4751+ /* No zero yet, search remaining full bytes for a zero */
4752+ res = ext2_find_first_zero_bit(p, size - 32 * (p - addr));
4753+ return (p - addr) * 32 + res;
4754+}
4755+
4756+#endif /* KERNEL */
4757+
4758+#endif /* __CF_BITOPS__ */
4759--- /dev/null
4760+++ b/arch/m68k/include/asm/cf_cacheflush.h
4761@@ -0,0 +1,20 @@
4762+/*
4763+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
4764+ *
4765+ * This file is subject to the terms and conditions of the GNU General Public
4766+ * License. See the file COPYING in the main directory of this archive
4767+ * for more details.
4768+ */
4769+
4770+#ifndef M68K_CF_CACHEFLUSH_H
4771+#define M68K_CF_CACHEFLUSH_H
4772+
4773+#ifdef CONFIG_M5445X
4774+#include "cf_5445x_cacheflush.h"
4775+#elif defined(CONFIG_M5441X)
4776+#include "cf_5441x_cacheflush.h"
4777+#elif defined(CONFIG_M547X_8X)
4778+#include "cf_548x_cacheflush.h"
4779+#endif
4780+
4781+#endif /* M68K_CF_CACHEFLUSH_H */
4782--- /dev/null
4783+++ b/arch/m68k/include/asm/cf_entry.h
4784@@ -0,0 +1,153 @@
4785+/*
4786+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
4787+ *
4788+ * This file is subject to the terms and conditions of the GNU General Public
4789+ * License. See the file COPYING in the main directory of this archive
4790+ * for more details.
4791+ */
4792+
4793+#ifndef __CF_M68K_ENTRY_H
4794+#define __CF_M68K_ENTRY_H
4795+
4796+#include <asm/setup.h>
4797+#include <asm/page.h>
4798+#include <asm/coldfire.h>
4799+#include <asm/cfmmu.h>
4800+
4801+/*
4802+ * Stack layout in 'ret_from_exception':
4803+ *
4804+ * This allows access to the syscall arguments in registers d1-d5
4805+ *
4806+ * 0(sp) - d1
4807+ * 4(sp) - d2
4808+ * 8(sp) - d3
4809+ * C(sp) - d4
4810+ * 10(sp) - d5
4811+ * 14(sp) - a0
4812+ * 18(sp) - a1
4813+ * 1C(sp) - a2
4814+ * 20(sp) - d0
4815+ * 24(sp) - orig_d0
4816+ * 28(sp) - stack adjustment
4817+ * 2C(sp) - sr
4818+ * 2E(sp) - pc
4819+ * 32(sp) - format & vector
4820+ * 36(sp) - MMUSR
4821+ * 3A(sp) - MMUAR
4822+ */
4823+
4824+/*
4825+ * 97/05/14 Andreas: Register %a2 is now set to the current task throughout
4826+ * the whole kernel.
4827+ */
4828+
4829+/* the following macro is used when enabling interrupts */
4830+/* portable version */
4831+#define ALLOWINT (~0x700)
4832+#define MAX_NOINT_IPL 0
4833+
4834+#ifdef __ASSEMBLY__
4835+
4836+#define curptr a2
4837+
4838+LFLUSH_I_AND_D = 0x00000808
4839+LSIGTRAP = 5
4840+
4841+/* process bits for task_struct.ptrace */
4842+PT_TRACESYS_OFF = 3
4843+PT_TRACESYS_BIT = 1
4844+PT_PTRACED_OFF = 3
4845+PT_PTRACED_BIT = 0
4846+PT_DTRACE_OFF = 3
4847+PT_DTRACE_BIT = 2
4848+
4849+#define SAVE_ALL_INT save_all_int
4850+#define SAVE_ALL_SYS save_all_sys
4851+#define RESTORE_ALL restore_all
4852+/*
4853+ * This defines the normal kernel pt-regs layout.
4854+ *
4855+ * regs a3-a6 and d6-d7 are preserved by C code
4856+ * the kernel doesn't mess with usp unless it needs to
4857+ */
4858+
4859+/*
4860+ * a -1 in the orig_d0 field signifies
4861+ * that the stack frame is NOT for syscall
4862+ */
4863+.macro save_all_int
4864+ movel MMUSR, % sp@ -
4865+ movel MMUAR, % sp@ -
4866+ clrl % sp@ - | stk_adj
4867+ pea - 1 : w | orig d0
4868+ movel % d0, % sp@ - | d0
4869+ subal #(8*4), % sp
4870+ moveml % d1-%d5/%a0-%a1/%curptr, % sp@
4871+.endm
4872+
4873+.macro save_all_sys
4874+ movel MMUSR, % sp@-
4875+ movel MMUAR, % sp@-
4876+ clrl % sp@ - | stk_adj
4877+ movel % d0, % sp@ - | orig d0
4878+ movel % d0, % sp@ - | d0
4879+ subal #(8*4), % sp
4880+ moveml % d1-%d5/%a0-%a1/%curptr, % sp@
4881+.endm
4882+
4883+.macro restore_all
4884+ moveml % sp@, % a0-%a1/%curptr/%d1-%d5
4885+ addal #(8*4), % sp
4886+ movel % sp@+, % d0 | d0
4887+ addql #4, % sp | orig d0
4888+ addl % sp@+, % sp | stk_adj
4889+ addql #8, % sp | MMUAR & MMUSR
4890+ rte
4891+.endm
4892+
4893+#define SWITCH_STACK_SIZE (6*4+4) /* includes return address */
4894+
4895+#define SAVE_SWITCH_STACK save_switch_stack
4896+#define RESTORE_SWITCH_STACK restore_switch_stack
4897+#define GET_CURRENT(tmp) get_current tmp
4898+
4899+.macro save_switch_stack
4900+ subal #(6*4), % sp
4901+ moveml % a3-%a6/%d6-%d7, % sp@
4902+.endm
4903+
4904+.macro restore_switch_stack
4905+ moveml % sp@, % a3-%a6/%d6-%d7
4906+ addal #(6*4), % sp
4907+.endm
4908+
4909+.macro get_current reg = % d0
4910+ movel % sp, \reg
4911+ andl #-THREAD_SIZE, \reg
4912+ movel \reg, % curptr
4913+ movel % curptr@, % curptr
4914+.endm
4915+
4916+#else /* C source */
4917+
4918+#define STR(X) STR1(X)
4919+#define STR1(X) #X
4920+
4921+#define PT_OFF_ORIG_D0 0x24
4922+#define PT_OFF_FORMATVEC 0x32
4923+#define PT_OFF_SR 0x2C
4924+#define SAVE_ALL_INT \
4925+ "clrl %%sp@-;" /* stk_adj */ \
4926+ "pea -1:w;" /* orig d0 = -1 */ \
4927+ "movel %%d0,%%sp@-;" /* d0 */ \
4928+ "subal #(8*4),%sp" \
4929+ "moveml %%d1-%%d5/%%a0-%%a2,%%sp@"
4930+#define GET_CURRENT(tmp) \
4931+ "movel %%sp,"#tmp"\n\t" \
4932+ "andw #-"STR(THREAD_SIZE)","#tmp"\n\t" \
4933+ "movel "#tmp",%%a2\n\t"
4934+
4935+#endif
4936+
4937+#endif /* __CF_M68K_ENTRY_H */
4938--- /dev/null
4939+++ b/arch/m68k/include/asm/cf_io.h
4940@@ -0,0 +1,185 @@
4941+/*
4942+ * linux/include/asm-m68k/cf_io.h
4943+ *
4944+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
4945+ * 9/30/08 JKM - Separated Coldfire pieces out from m68k.
4946+ *
4947+ * This file is subject to the terms and conditions of the GNU General Public
4948+ * License. See the file COPYING in the main directory of this archive
4949+ * for more details.
4950+ */
4951+
4952+#ifndef __CF_IO__
4953+#define __CF_IO__
4954+
4955+#ifdef __KERNEL__
4956+
4957+#include <linux/compiler.h>
4958+#include <asm/raw_io.h>
4959+#include <asm/virtconvert.h>
4960+
4961+#include <asm-generic/iomap.h>
4962+
4963+#define readb_relaxed(addr) readb(addr)
4964+#define readw_relaxed(addr) readw(addr)
4965+#define readl_relaxed(addr) readl(addr)
4966+
4967+#ifdef CONFIG_PCI
4968+
4969+/*
4970+ * IO space in Coldfire
4971+ */
4972+#define inb_p inb
4973+#define inw_p inw
4974+#define inl_p inl
4975+#define outb_p outb
4976+#define outw_p outw
4977+#define outl_p outl
4978+
4979+#ifndef CONFIG_COLDFIRE
4980+#define inb(port) in_8(port)
4981+#define outb(val, port) out_8((port), (val))
4982+#define inw(port) in_le16(port)
4983+#define outw(val, port) out_le16((port), (val))
4984+#define inl(port) in_le32(port)
4985+#define outl(val, port) out_le32((port), (val))
4986+#define insb(port, buf, nr) \
4987+ raw_insb((u8 *)(port), (u8 *)(buf), (nr))
4988+#define outsb(port, buf, nr) \
4989+ raw_outsb((u8 *)(port), (u8 *)(buf), (nr))
4990+#define insw(port, buf, nr) \
4991+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr))
4992+#define outsw(port, buf, nr) \
4993+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr))
4994+#define insl(port, buf, nr) \
4995+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
4996+#define outsl(port, buf, nr) \
4997+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
4998+#else
4999+#define inb(port) pci_inb(port)
5000+#define outb(val, port) pci_outb((val), (port))
5001+#define inw(port) pci_inw(port)
5002+#define outw(val, port) pci_outw((val), (port))
5003+#define insb(a, b, c) \
5004+ pci_insb((volatile unsigned char *)a, (unsigned char *)b, c)
5005+#define insw(a, b, c) \
5006+ pci_insw((volatile unsigned short *)a, (unsigned short *)b, c)
5007+#define insl(a, b, c) \
5008+ pci_insl((volatile unsigned long *)a, (unsigned long *)b, c)
5009+#define outsb(a, b, c) \
5010+ pci_outsb((volatile unsigned char *)a, (const unsigned char *)b, c)
5011+#define outsw(a, b, c) \
5012+ pci_outsw((volatile unsigned short *)a, (const unsigned short *)b, c)
5013+#define outsl(a, b, c) \
5014+ pci_outsl((volatile unsigned long *)a, (const unsigned long *)b, c)
5015+#define inl(port) pci_inl(port)
5016+#define outl(val, port) pci_outl((val), (port))
5017+#endif
5018+
5019+#else
5020+/* no pci */
5021+
5022+#define inb(port) in_8(port)
5023+#define outb(val, port) out_8((port), (val))
5024+#define inw(port) in_le16(port)
5025+#define outw(val, port) out_le16((port), (val))
5026+#define inl(port) in_le32(port)
5027+#define outl(val, port) out_le32((port), (val))
5028+#define insb(port, buf, nr) \
5029+ raw_insb((u8 *)(port), (u8 *)(buf), (nr))
5030+#define outsb(port, buf, nr) \
5031+ raw_outsb((u8 *)(port), (u8 *)(buf), (nr))
5032+#define insw(port, buf, nr) \
5033+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr))
5034+#define outsw(port, buf, nr) \
5035+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr))
5036+#define insl(port, buf, nr) \
5037+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
5038+#define outsl(port, buf, nr) \
5039+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
5040+
5041+#endif /* CONFIG_PCI */
5042+
5043+#define mmiowb()
5044+
5045+static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
5046+{
5047+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
5048+}
5049+static inline void __iomem *ioremap_nocache(unsigned long physaddr,
5050+ unsigned long size)
5051+{
5052+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
5053+}
5054+static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
5055+ unsigned long size)
5056+{
5057+ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
5058+}
5059+static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
5060+ unsigned long size)
5061+{
5062+ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
5063+}
5064+
5065+static inline void memset_io(volatile void __iomem *addr,
5066+ unsigned char val, int count)
5067+{
5068+ __builtin_memset((void __force *) addr, val, count);
5069+}
5070+static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
5071+ int count)
5072+{
5073+ __builtin_memcpy(dst, (void __force *) src, count);
5074+}
5075+static inline void memcpy_toio(volatile void __iomem *dst,
5076+ const void *src, int count)
5077+{
5078+ __builtin_memcpy((void __force *) dst, src, count);
5079+}
5080+
5081+#define IO_SPACE_LIMIT 0xffffffff
5082+
5083+#endif /* __KERNEL__ */
5084+
5085+#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
5086+
5087+/*
5088+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
5089+ * access
5090+ */
5091+#define xlate_dev_mem_ptr(p) __va(p)
5092+
5093+/*
5094+ * Convert a virtual cached pointer to an uncached pointer
5095+ */
5096+#define xlate_dev_kmem_ptr(p) p
5097+
5098+#define __raw_readb(addr) \
5099+ ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
5100+#define __raw_readw(addr) \
5101+ ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
5102+#define __raw_readl(addr) \
5103+ ({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; })
5104+#define __raw_writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
5105+#define __raw_writew(b, addr) \
5106+ (void)((*(volatile unsigned short *) (addr)) = (b))
5107+#define __raw_writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
5108+
5109+#define memset_io(a, b, c) memset((void *)(a), (b), (c))
5110+#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
5111+#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
5112+
5113+#if !defined(readb)
5114+#define readb(addr) \
5115+ ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
5116+#define readw(addr) \
5117+ ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
5118+#define readl(addr) \
5119+ ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
5120+#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
5121+#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
5122+#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
5123+#endif /* readb */
5124+
5125+#endif /* _IO_H */
5126--- /dev/null
5127+++ b/arch/m68k/include/asm/cf_pgalloc.h
5128@@ -0,0 +1,112 @@
5129+/*
5130+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5131+ *
5132+ * This file is subject to the terms and conditions of the GNU General Public
5133+ * License. See the file COPYING in the main directory of this archive
5134+ * for more details.
5135+ */
5136+
5137+#ifndef M68K_CF_PGALLOC_H
5138+#define M68K_CF_PGALLOC_H
5139+#include <linux/highmem.h>
5140+#include <asm/coldfire.h>
5141+#include <asm/page.h>
5142+#include <asm/cf_tlbflush.h>
5143+#include <asm/cf_cacheflush.h>
5144+
5145+extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
5146+{
5147+ free_page((unsigned long) pte);
5148+}
5149+
5150+extern const char bad_pmd_string[];
5151+
5152+extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
5153+ unsigned long address)
5154+{
5155+ unsigned long page = __get_free_page(GFP_KERNEL|__GFP_REPEAT);
5156+
5157+ if (!page)
5158+ return NULL;
5159+
5160+ memset((void *)page, 0, PAGE_SIZE);
5161+ return (pte_t *) (page);
5162+}
5163+
5164+extern inline pmd_t *pmd_alloc_kernel(pgd_t *pgd, unsigned long address)
5165+{
5166+ return (pmd_t *) pgd;
5167+}
5168+
5169+#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); })
5170+#define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); })
5171+
5172+#define pte_alloc_one_fast(mm, addr) pte_alloc_one(mm, addr)
5173+
5174+#define pmd_populate(mm, pmd, page) (pmd_val(*pmd) = \
5175+ (unsigned long)(page_address(page)))
5176+
5177+#define pmd_populate_kernel(mm, pmd, pte) (pmd_val(*pmd) = (unsigned long)(pte))
5178+
5179+#define pmd_pgtable(pmd) pmd_page(pmd)
5180+
5181+static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *page,
5182+ unsigned long address)
5183+{
5184+ __free_page(page);
5185+}
5186+
5187+#define __pmd_free_tlb(tlb, pmd, address) do { } while (0)
5188+
5189+static inline struct page *pte_alloc_one(struct mm_struct *mm,
5190+ unsigned long address)
5191+{
5192+ struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
5193+ pte_t *pte;
5194+
5195+ if (!page)
5196+ return NULL;
5197+
5198+ pte = kmap(page);
5199+ if (pte) {
5200+ clear_page(pte);
5201+ __flush_page_to_ram(pte);
5202+ flush_tlb_kernel_page(pte);
5203+ nocache_page(pte);
5204+ }
5205+ kunmap(page);
5206+
5207+ return page;
5208+}
5209+
5210+extern inline void pte_free(struct mm_struct *mm, struct page *page)
5211+{
5212+ __free_page(page);
5213+}
5214+
5215+/*
5216+ * In our implementation, each pgd entry contains 1 pmd that is never allocated
5217+ * or freed. pgd_present is always 1, so this should never be called. -NL
5218+ */
5219+#define pmd_free(mm, pmd) BUG()
5220+
5221+extern inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
5222+{
5223+ free_page((unsigned long) pgd);
5224+}
5225+
5226+extern inline pgd_t *pgd_alloc(struct mm_struct *mm)
5227+{
5228+ pgd_t *new_pgd;
5229+
5230+ new_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_NOWARN);
5231+ if (!new_pgd)
5232+ return NULL;
5233+ memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE);
5234+ memset(new_pgd, 0, PAGE_OFFSET >> PGDIR_SHIFT);
5235+ return new_pgd;
5236+}
5237+
5238+#define pgd_populate(mm, pmd, pte) BUG()
5239+
5240+#endif /* M68K_CF_PGALLOC_H */
5241--- /dev/null
5242+++ b/arch/m68k/include/asm/cf_pgtable.h
5243@@ -0,0 +1,364 @@
5244+/*
5245+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5246+ *
5247+ * This file is subject to the terms and conditions of the GNU General Public
5248+ * License. See the file COPYING in the main directory of this archive
5249+ * for more details.
5250+ */
5251+
5252+#ifndef _CF_PGTABLE_H
5253+#define _CF_PGTABLE_H
5254+
5255+#include <asm/cfmmu.h>
5256+#include <asm/page.h>
5257+
5258+#ifndef __ASSEMBLY__
5259+#include <asm/virtconvert.h>
5260+#include <linux/linkage.h>
5261+
5262+/* For virtual address to physical address conversion */
5263+#define VTOP(addr) __pa(addr)
5264+#define PTOV(addr) __va(addr)
5265+
5266+
5267+#endif /* !__ASSEMBLY__ */
5268+
5269+/* Page protection values within PTE. */
5270+
5271+/* MMUDR bits, in proper place. */
5272+#define CF_PAGE_LOCKED (0x00000002)
5273+#define CF_PAGE_EXEC (0x00000004)
5274+#define CF_PAGE_WRITABLE (0x00000008)
5275+#define CF_PAGE_READABLE (0x00000010)
5276+#define CF_PAGE_SYSTEM (0x00000020)
5277+#define CF_PAGE_COPYBACK (0x00000040)
5278+#define CF_PAGE_NOCACHE (0x00000080)
5279+
5280+#define CF_CACHEMASK (~0x00000040)
5281+#define CF_PAGE_MMUDR_MASK (0x000000fe)
5282+
5283+#define _PAGE_NOCACHE030 (CF_PAGE_NOCACHE)
5284+
5285+/* MMUTR bits, need shifting down. */
5286+#define CF_PAGE_VALID (0x00000400)
5287+#define CF_PAGE_SHARED (0x00000800)
5288+
5289+#define CF_PAGE_MMUTR_MASK (0x00000c00)
5290+#define CF_PAGE_MMUTR_SHIFT (10)
5291+#define CF_ASID_MMU_SHIFT (2)
5292+
5293+/* Fake bits, not implemented in CF, will get masked out before
5294+ hitting hardware, and might go away altogether once this port is
5295+ complete. */
5296+#if PAGE_SHIFT < 13
5297+#error COLDFIRE Error: Pages must be at least 8k in size
5298+#endif
5299+#define CF_PAGE_ACCESSED (0x00001000)
5300+#define CF_PAGE_FILE (0x00000200)
5301+#define CF_PAGE_DIRTY (0x00000001)
5302+
5303+#define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */
5304+#define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */
5305+#define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */
5306+#define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */
5307+#define _DESCTYPE_MASK 0x003
5308+#define _CACHEMASK040 (~0x060)
5309+#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
5310+
5311+
5312+/* Externally used page protection values. */
5313+#define _PAGE_PRESENT (CF_PAGE_VALID)
5314+#define _PAGE_ACCESSED (CF_PAGE_ACCESSED)
5315+#define _PAGE_DIRTY (CF_PAGE_DIRTY)
5316+#define _PAGE_READWRITE (CF_PAGE_WRITABLE \
5317+ | CF_PAGE_READABLE \
5318+ | CF_PAGE_SHARED \
5319+ | CF_PAGE_SYSTEM)
5320+
5321+/* Compound page protection values. */
5322+#define PAGE_NONE __pgprot(CF_PAGE_VALID \
5323+ | CF_PAGE_ACCESSED)
5324+
5325+#define PAGE_SHARED __pgprot(CF_PAGE_VALID \
5326+ | CF_PAGE_READABLE \
5327+ | CF_PAGE_WRITABLE \
5328+ | CF_PAGE_ACCESSED)
5329+
5330+#define PAGE_INIT __pgprot(CF_PAGE_VALID \
5331+ | CF_PAGE_WRITABLE \
5332+ | CF_PAGE_READABLE \
5333+ | CF_PAGE_EXEC \
5334+ | CF_PAGE_SYSTEM \
5335+ | CF_PAGE_SHARED)
5336+
5337+#define PAGE_KERNEL __pgprot(CF_PAGE_VALID \
5338+ | CF_PAGE_WRITABLE \
5339+ | CF_PAGE_READABLE \
5340+ | CF_PAGE_EXEC \
5341+ | CF_PAGE_SYSTEM \
5342+ | CF_PAGE_SHARED \
5343+ | CF_PAGE_ACCESSED)
5344+
5345+#define PAGE_COPY __pgprot(CF_PAGE_VALID \
5346+ | CF_PAGE_ACCESSED \
5347+ | CF_PAGE_READABLE)
5348+
5349+/*
5350+ * Page protections for initialising protection_map. See mm/mmap.c
5351+ * for use. In general, the bit positions are xwr, and P-items are
5352+ * private, the S-items are shared.
5353+ */
5354+
5355+#define __P000 PAGE_NONE
5356+#define __P100 __pgprot(CF_PAGE_VALID \
5357+ | CF_PAGE_ACCESSED \
5358+ | CF_PAGE_EXEC)
5359+#define __P010 __pgprot(CF_PAGE_VALID \
5360+ | CF_PAGE_WRITABLE \
5361+ | CF_PAGE_ACCESSED)
5362+#define __P110 __pgprot(CF_PAGE_VALID \
5363+ | CF_PAGE_ACCESSED \
5364+ | CF_PAGE_WRITABLE \
5365+ | CF_PAGE_EXEC)
5366+#define __P001 __pgprot(CF_PAGE_VALID \
5367+ | CF_PAGE_ACCESSED \
5368+ | CF_PAGE_READABLE)
5369+#define __P101 __pgprot(CF_PAGE_VALID \
5370+ | CF_PAGE_ACCESSED \
5371+ | CF_PAGE_READABLE \
5372+ | CF_PAGE_EXEC)
5373+#define __P011 __pgprot(CF_PAGE_VALID \
5374+ | CF_PAGE_READABLE \
5375+ | CF_PAGE_WRITABLE \
5376+ | CF_PAGE_ACCESSED)
5377+#define __P111 __pgprot(CF_PAGE_VALID \
5378+ | CF_PAGE_ACCESSED \
5379+ | CF_PAGE_WRITABLE \
5380+ | CF_PAGE_READABLE \
5381+ | CF_PAGE_EXEC)
5382+
5383+#define __S000 PAGE_NONE
5384+#define __S100 __pgprot(CF_PAGE_VALID \
5385+ | CF_PAGE_ACCESSED \
5386+ | CF_PAGE_EXEC)
5387+#define __S010 PAGE_SHARED
5388+#define __S110 __pgprot(CF_PAGE_VALID \
5389+ | CF_PAGE_ACCESSED \
5390+ | CF_PAGE_WRITABLE \
5391+ | CF_PAGE_EXEC)
5392+#define __S001 __pgprot(CF_PAGE_VALID \
5393+ | CF_PAGE_ACCESSED \
5394+ | CF_PAGE_READABLE)
5395+#define __S101 __pgprot(CF_PAGE_VALID \
5396+ | CF_PAGE_ACCESSED \
5397+ | CF_PAGE_READABLE \
5398+ | CF_PAGE_EXEC)
5399+#define __S011 PAGE_SHARED
5400+#define __S111 __pgprot(CF_PAGE_VALID \
5401+ | CF_PAGE_ACCESSED \
5402+ | CF_PAGE_READABLE \
5403+ | CF_PAGE_WRITABLE \
5404+ | CF_PAGE_EXEC)
5405+
5406+#define PTE_MASK PAGE_MASK
5407+#define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY)
5408+
5409+#ifndef __ASSEMBLY__
5410+
5411+/*
5412+ * Conversion functions: convert a page and protection to a page entry,
5413+ * and a page entry and page directory to the page they refer to.
5414+ */
5415+#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
5416+
5417+extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
5418+{
5419+ pte_val(pte) = (pte_val(pte) & CF_PAGE_CHG_MASK) | pgprot_val(newprot);
5420+ return pte;
5421+}
5422+
5423+#define pmd_set(pmdp, ptep) do {} while (0)
5424+
5425+static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
5426+{
5427+ pgd_val(*pgdp) = virt_to_phys(pmdp);
5428+}
5429+
5430+#define __pte_page(pte) \
5431+ ((unsigned long) ((pte_val(pte) & CF_PAGE_PGNUM_MASK) + PAGE_OFFSET))
5432+#define __pmd_page(pmd) ((unsigned long) (pmd_val(pmd)))
5433+
5434+extern inline int pte_none(pte_t pte)
5435+{
5436+ return !pte_val(pte);
5437+}
5438+extern inline int pte_present(pte_t pte)
5439+{
5440+ return pte_val(pte) & CF_PAGE_VALID;
5441+}
5442+extern inline void pte_clear(struct mm_struct *mm, unsigned long addr,
5443+ pte_t *ptep)
5444+{
5445+ pte_val(*ptep) = 0;
5446+}
5447+
5448+#define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
5449+#define pte_page(pte) virt_to_page(__pte_page(pte))
5450+
5451+extern inline int pmd_none2(pmd_t *pmd) { return !pmd_val(*pmd); }
5452+#define pmd_none(pmd) pmd_none2(&(pmd))
5453+extern inline int pmd_bad2(pmd_t *pmd) { return 0; }
5454+#define pmd_bad(pmd) pmd_bad2(&(pmd))
5455+#define pmd_present(pmd) (!pmd_none2(&(pmd)))
5456+extern inline void pmd_clear(pmd_t *pmdp) { pmd_val(*pmdp) = 0; }
5457+
5458+extern inline int pgd_none(pgd_t pgd) { return 0; }
5459+extern inline int pgd_bad(pgd_t pgd) { return 0; }
5460+extern inline int pgd_present(pgd_t pgd) { return 1; }
5461+extern inline void pgd_clear(pgd_t *pgdp) {}
5462+
5463+
5464+#define pte_ERROR(e) \
5465+ printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
5466+ __FILE__, __LINE__, pte_val(e))
5467+#define pmd_ERROR(e) \
5468+ printk(KERN_ERR "%s:%d: bad pmd %08lx.\n", \
5469+ __FILE__, __LINE__, pmd_val(e))
5470+#define pgd_ERROR(e) \
5471+ printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
5472+ __FILE__, __LINE__, pgd_val(e))
5473+
5474+
5475+/*
5476+ * The following only work if pte_present() is true.
5477+ * Undefined behaviour if not...
5478+ * [we have the full set here even if they don't change from m68k]
5479+ */
5480+extern inline int pte_read(pte_t pte) \
5481+ { return pte_val(pte) & CF_PAGE_READABLE; }
5482+extern inline int pte_write(pte_t pte) \
5483+ { return pte_val(pte) & CF_PAGE_WRITABLE; }
5484+extern inline int pte_exec(pte_t pte) \
5485+ { return pte_val(pte) & CF_PAGE_EXEC; }
5486+extern inline int pte_dirty(pte_t pte) \
5487+ { return pte_val(pte) & CF_PAGE_DIRTY; }
5488+extern inline int pte_young(pte_t pte) \
5489+ { return pte_val(pte) & CF_PAGE_ACCESSED; }
5490+extern inline int pte_file(pte_t pte) \
5491+ { return pte_val(pte) & CF_PAGE_FILE; }
5492+static inline int pte_special(pte_t pte) { return 0; }
5493+
5494+
5495+extern inline pte_t pte_wrprotect(pte_t pte) \
5496+ { pte_val(pte) &= ~CF_PAGE_WRITABLE; return pte; }
5497+extern inline pte_t pte_rdprotect(pte_t pte) \
5498+ { pte_val(pte) &= ~CF_PAGE_READABLE; return pte; }
5499+extern inline pte_t pte_exprotect(pte_t pte) \
5500+ { pte_val(pte) &= ~CF_PAGE_EXEC; return pte; }
5501+extern inline pte_t pte_mkclean(pte_t pte) \
5502+ { pte_val(pte) &= ~CF_PAGE_DIRTY; return pte; }
5503+extern inline pte_t pte_mkold(pte_t pte) \
5504+ { pte_val(pte) &= ~CF_PAGE_ACCESSED; return pte; }
5505+extern inline pte_t pte_mkwrite(pte_t pte) \
5506+ { pte_val(pte) |= CF_PAGE_WRITABLE; return pte; }
5507+extern inline pte_t pte_mkread(pte_t pte) \
5508+ { pte_val(pte) |= CF_PAGE_READABLE; return pte; }
5509+extern inline pte_t pte_mkexec(pte_t pte) \
5510+ { pte_val(pte) |= CF_PAGE_EXEC; return pte; }
5511+extern inline pte_t pte_mkdirty(pte_t pte) \
5512+ { pte_val(pte) |= CF_PAGE_DIRTY; return pte; }
5513+extern inline pte_t pte_mkyoung(pte_t pte) \
5514+ { pte_val(pte) |= CF_PAGE_ACCESSED; return pte; }
5515+extern inline pte_t pte_mknocache(pte_t pte) \
5516+ { pte_val(pte) |= 0x80 | (pte_val(pte) & ~0x40); return pte; }
5517+extern inline pte_t pte_mkcache(pte_t pte) \
5518+ { pte_val(pte) &= ~CF_PAGE_NOCACHE; return pte; }
5519+static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
5520+
5521+
5522+#define swapper_pg_dir kernel_pg_dir
5523+extern pgd_t kernel_pg_dir[PTRS_PER_PGD];
5524+
5525+/* Find an entry in a pagetable directory. */
5526+#define pgd_index(address) ((address) >> PGDIR_SHIFT)
5527+
5528+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
5529+
5530+/* Find an entry in a kernel pagetable directory. */
5531+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
5532+
5533+/* Find an entry in the second-level pagetable. */
5534+extern inline pmd_t *pmd_offset(pgd_t *pgd, unsigned long address)
5535+{
5536+ return (pmd_t *) pgd;
5537+}
5538+
5539+/* Find an entry in the third-level pagetable. */
5540+#define __pte_offset(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
5541+#define pte_offset_kernel(dir, address) ((pte_t *) __pmd_page(*(dir)) + \
5542+ __pte_offset(address))
5543+
5544+/* Disable caching for page at given kernel virtual address. */
5545+static inline void nocache_page(void *vaddr)
5546+{
5547+ pgd_t *dir;
5548+ pmd_t *pmdp;
5549+ pte_t *ptep;
5550+ unsigned long addr = (unsigned long)vaddr;
5551+
5552+ dir = pgd_offset_k(addr);
5553+ pmdp = pmd_offset(dir, addr);
5554+ ptep = pte_offset_kernel(pmdp, addr);
5555+ *ptep = pte_mknocache(*ptep);
5556+}
5557+
5558+/* Enable caching for page at given kernel virtual address. */
5559+static inline void cache_page(void *vaddr)
5560+{
5561+ pgd_t *dir;
5562+ pmd_t *pmdp;
5563+ pte_t *ptep;
5564+ unsigned long addr = (unsigned long)vaddr;
5565+
5566+ dir = pgd_offset_k(addr);
5567+ pmdp = pmd_offset(dir, addr);
5568+ ptep = pte_offset_kernel(pmdp, addr);
5569+ *ptep = pte_mkcache(*ptep);
5570+}
5571+
5572+#define PTE_FILE_MAX_BITS 21
5573+#define PTE_FILE_SHIFT 11
5574+
5575+static inline unsigned long pte_to_pgoff(pte_t pte)
5576+{
5577+ return pte_val(pte) >> PTE_FILE_SHIFT;
5578+}
5579+
5580+static inline pte_t pgoff_to_pte(unsigned pgoff)
5581+{
5582+ pte_t pte = __pte((pgoff << PTE_FILE_SHIFT) + CF_PAGE_FILE);
5583+ return pte;
5584+}
5585+
5586+/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
5587+#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
5588+ (offset << PTE_FILE_SHIFT) })
5589+#define __swp_type(x) ((x).val & 0xFF)
5590+#define __swp_offset(x) ((x).val >> PTE_FILE_SHIFT)
5591+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
5592+#define __swp_entry_to_pte(x) (__pte((x).val))
5593+
5594+#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
5595+
5596+#define pte_offset_map(pmdp, address) ((pte_t *)__pmd_page(*pmdp) + \
5597+ __pte_offset(address))
5598+#define pte_offset_map_nested(pmdp, address) pte_offset_map(pmdp, address)
5599+#define pte_unmap(pte) do { } while (0)
5600+#define pte_unmap_nested(pte) kunmap(pte)
5601+
5602+#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
5603+#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
5604+
5605+
5606+#endif /* !__ASSEMBLY__ */
5607+#endif /* !_CF_PGTABLE_H */
5608--- /dev/null
5609+++ b/arch/m68k/include/asm/cf_raw_io.h
5610@@ -0,0 +1,188 @@
5611+/*
5612+ * linux/include/asm-m68k/cf_raw_io.h
5613+ *
5614+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5615+ * 09/30/08 JKM: split Coldfire pieces into separate file
5616+ *
5617+ * This file is subject to the terms and conditions of the GNU General Public
5618+ * License. See the file COPYING in the main directory of this archive
5619+ * for more details.
5620+ */
5621+#ifndef __CF_RAW_IO__
5622+#define __CF_RAW_IO__
5623+
5624+#ifdef __KERNEL__
5625+
5626+#include <asm/types.h>
5627+
5628+/* Values for nocacheflag and cmode */
5629+#define IOMAP_FULL_CACHING 0
5630+#define IOMAP_NOCACHE_SER 1
5631+#define IOMAP_NOCACHE_NONSER 2
5632+#define IOMAP_WRITETHROUGH 3
5633+
5634+extern void iounmap(void __iomem *addr);
5635+
5636+extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
5637+ int cacheflag);
5638+extern void __iounmap(void *addr, unsigned long size);
5639+
5640+
5641+/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
5642+ * two accesses to memory, which may be undesirable for some devices.
5643+ */
5644+#define in_8(addr) \
5645+ ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
5646+#define in_be16(addr) \
5647+ ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
5648+#define in_be32(addr) \
5649+ ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
5650+#define in_le16(addr) \
5651+ ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })
5652+#define in_le32(addr) \
5653+ ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })
5654+
5655+#define out_8(addr, b) (void)((*(__force volatile u8 *) (addr)) = (b))
5656+#define out_be16(addr, w) (void)((*(__force volatile u16 *) (addr)) = (w))
5657+#define out_be32(addr, l) (void)((*(__force volatile u32 *) (addr)) = (l))
5658+#define out_le16(addr, w) \
5659+ (void)((*(__force volatile __le16 *) (addr)) = cpu_to_le16(w))
5660+#define out_le32(addr, l) \
5661+ (void)((*(__force volatile __le32 *) (addr)) = cpu_to_le32(l))
5662+
5663+
5664+#ifdef CONFIG_PCI
5665+/* pci */
5666+unsigned char pci_inb(long addr);
5667+unsigned short pci_inw(long addr);
5668+unsigned long pci_inl(long addr);
5669+
5670+void pci_outb(unsigned char val, long addr);
5671+void pci_outw(unsigned short val, long addr);
5672+void pci_outl(unsigned long val, long addr);
5673+
5674+void pci_insb(volatile unsigned char *addr,
5675+ unsigned char *buf, int len);
5676+void pci_insw(volatile unsigned short *addr,
5677+ unsigned short *buf, int len);
5678+void pci_insl(volatile unsigned long *addr,
5679+ unsigned long *buf, int len);
5680+
5681+void pci_outsb(volatile unsigned char *addr,
5682+ const unsigned char *buf, int len);
5683+void pci_outsw(volatile unsigned short *addr,
5684+ const unsigned short *buf, int len);
5685+void pci_outsl(volatile unsigned long *addr,
5686+ const unsigned long *buf, int len);
5687+
5688+unsigned short pci_raw_inw(long addr);
5689+unsigned long pci_raw_inl(long addr);
5690+void pci_raw_outw(unsigned short val, long addr);
5691+void pci_raw_outl(unsigned long val, long addr);
5692+
5693+#define raw_inb(port) pci_inb((long)((volatile unsigned char *)(port)))
5694+#define raw_inw(port) pci_raw_inw((long)((volatile unsigned short *)(port)))
5695+#define raw_inl(port) pci_raw_inl((long)((volatile unsigned long *)(port)))
5696+
5697+#define raw_outb(val, port) \
5698+ pci_outb((val), (long)((volatile unsigned char *)(port)))
5699+#define raw_outw(val, port) \
5700+ pci_raw_outw((val), (long)((volatile unsigned short *)(port)))
5701+#define raw_outl(val, port) \
5702+ pci_raw_outl((val), (long)((volatile unsigned long *)(port)))
5703+
5704+#define swap_inw(port) pci_inw((long)((volatile unsigned short *)(port)))
5705+#define swap_outw(val, port) \
5706+ pci_outw((val), (long)((volatile unsigned short *)(port)))
5707+
5708+#else
5709+/* non-pci */
5710+#define raw_inb in_8
5711+#define raw_inw in_be16
5712+#define raw_inl in_be32
5713+
5714+#define raw_outb(val, port) out_8((port), (val))
5715+#define raw_outw(val, port) out_be16((port), (val))
5716+#define raw_outl(val, port) out_be32((port), (val))
5717+
5718+#define swap_inw(port) in_le16((port))
5719+#define swap_outw(val, port) out_le16((port), (val))
5720+#endif
5721+
5722+static inline void raw_insb(volatile u8 __iomem *port,
5723+ u8 *buf, unsigned int len)
5724+{
5725+ unsigned int i;
5726+
5727+ for (i = 0; i < len; i++)
5728+ *buf++ = in_8(port);
5729+}
5730+
5731+static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
5732+ unsigned int len)
5733+{
5734+ unsigned int i;
5735+
5736+ for (i = 0; i < len; i++)
5737+ out_8(port, *buf++);
5738+}
5739+
5740+static inline void raw_insw(volatile u16 *port, u16 *buf, unsigned int nr)
5741+{
5742+ unsigned int i;
5743+
5744+ for (i = 0; i < nr; i++)
5745+ *buf++ = raw_inw(port);
5746+}
5747+
5748+static inline void raw_outsw(volatile u16 *port, const u16 *buf,
5749+ unsigned int nr)
5750+{
5751+ unsigned int i;
5752+
5753+ for (i = 0; i < nr; i++, buf++)
5754+ raw_outw(*buf, port);
5755+}
5756+
5757+static inline void raw_insl(volatile u32 *port, u32 *buf, unsigned int nr)
5758+{
5759+ unsigned int i;
5760+
5761+ for (i = 0; i < nr; i++)
5762+ *buf++ = raw_inl(port);
5763+}
5764+
5765+static inline void raw_outsl(volatile u32 *port, const u32 *buf,
5766+ unsigned int nr)
5767+{
5768+ unsigned int i;
5769+
5770+ for (i = 0; i < nr; i++, buf++)
5771+ raw_outl(*buf, port);
5772+}
5773+
5774+static inline void raw_insw_swapw(volatile u16 *port, u16 *buf,
5775+ unsigned int nr)
5776+{
5777+#ifdef UNDEF
5778+ unsigned int i;
5779+
5780+ for (i = 0; i < nr; i++)
5781+ *buf++ = in_le16(port);
5782+#endif
5783+}
5784+
5785+static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
5786+ unsigned int nr)
5787+{
5788+#ifdef UNDEF
5789+ unsigned int i;
5790+
5791+ for (i = 0; i < nr; i++, buf++)
5792+ out_le16(port, *buf);
5793+#endif
5794+}
5795+
5796+#endif /* __KERNEL__ */
5797+
5798+#endif /* __CF_RAW_IO__ */
5799--- /dev/null
5800+++ b/arch/m68k/include/asm/cf_tlbflush.h
5801@@ -0,0 +1,66 @@
5802+/*
5803+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5804+ *
5805+ * This file is subject to the terms and conditions of the GNU General Public
5806+ * License. See the file COPYING in the main directory of this archive
5807+ * for more details.
5808+ */
5809+#ifndef M68K_CF_TLBFLUSH_H
5810+#define M68K_CF_TLBFLUSH_H
5811+
5812+#include <asm/coldfire.h>
5813+
5814+/* Flush all userspace mappings. */
5815+static inline void flush_tlb_all(void)
5816+{
5817+ preempt_disable();
5818+ *MMUOR = MMUOR_CNL;
5819+ preempt_enable();
5820+}
5821+
5822+/* Clear user TLB entries within the context named in mm */
5823+static inline void flush_tlb_mm(struct mm_struct *mm)
5824+{
5825+ preempt_disable();
5826+ *MMUOR = MMUOR_CNL;
5827+ preempt_enable();
5828+}
5829+
5830+/* Flush a single TLB page. */
5831+static inline void flush_tlb_page(struct vm_area_struct *vma,
5832+ unsigned long addr)
5833+{
5834+ preempt_disable();
5835+ *MMUOR = MMUOR_CNL;
5836+ preempt_enable();
5837+}
5838+/* Flush a range of pages from TLB. */
5839+
5840+static inline void flush_tlb_range(struct vm_area_struct *mm,
5841+ unsigned long start, unsigned long end)
5842+{
5843+ preempt_disable();
5844+ *MMUOR = MMUOR_CNL;
5845+ preempt_enable();
5846+}
5847+
5848+/* Flush kernel page from TLB. */
5849+static inline void flush_tlb_kernel_page(void *addr)
5850+{
5851+ preempt_disable();
5852+ *MMUOR = MMUOR_CNL;
5853+ preempt_enable();
5854+}
5855+
5856+static inline void flush_tlb_kernel_range(unsigned long start,
5857+ unsigned long end)
5858+{
5859+ flush_tlb_all();
5860+}
5861+
5862+extern inline void flush_tlb_pgtables(struct mm_struct *mm,
5863+ unsigned long start, unsigned long end)
5864+{
5865+}
5866+
5867+#endif /* M68K_CF_TLBFLUSH_H */
5868--- /dev/null
5869+++ b/arch/m68k/include/asm/cf_uaccess.h
5870@@ -0,0 +1,262 @@
5871+/*
5872+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
5873+ *
5874+ * This file is subject to the terms and conditions of the GNU General Public
5875+ * License. See the file COPYING in the main directory of this archive
5876+ * for more details.
5877+ */
5878+#ifndef __M68K_CF_UACCESS_H
5879+#define __M68K_CF_UACCESS_H
5880+
5881+/*
5882+ * User space memory access functions
5883+ */
5884+
5885+/* The "moves" command is not available in the CF instruction set. */
5886+#include <linux/compiler.h>
5887+#include <linux/errno.h>
5888+#include <linux/types.h>
5889+#include <linux/sched.h>
5890+#include <asm/segment.h>
5891+
5892+#define VERIFY_READ 0
5893+#define VERIFY_WRITE 1
5894+
5895+/* We let the MMU do all checking */
5896+#define access_ok(type, addr, size) 1
5897+
5898+/*
5899+ * The exception table consists of pairs of addresses: the first is the
5900+ * address of an instruction that is allowed to fault, and the second is
5901+ * the address at which the program should continue. No registers are
5902+ * modified, so it is entirely up to the continuation code to figure out
5903+ * what to do.
5904+ *
5905+ * All the routines below use bits of fixup code that are out of line
5906+ * with the main instruction path. This means when everything is well,
5907+ * we don't even have to jump over them. Further, they do not intrude
5908+ * on our cache or tlb entries.
5909+ */
5910+
5911+struct exception_table_entry {
5912+ unsigned long insn, fixup;
5913+};
5914+
5915+extern int __put_user_bad(void);
5916+extern int __get_user_bad(void);
5917+
5918+#define __put_user_asm(res, x, ptr, bwl, reg, err) \
5919+asm volatile ("\n" \
5920+ "1: move."#bwl" %2,%1\n" \
5921+ "2:\n" \
5922+ " .section .fixup,\"ax\"\n" \
5923+ " .even\n" \
5924+ "10: moveq.l %3,%0\n" \
5925+ " jra 2b\n" \
5926+ " .previous\n" \
5927+ "\n" \
5928+ " .section __ex_table,\"a\"\n" \
5929+ " .align 4\n" \
5930+ " .long 1b,10b\n" \
5931+ " .long 2b,10b\n" \
5932+ " .previous" \
5933+ : "+d" (res), "=m" (*(ptr)) \
5934+ : #reg(x), "i" (err))
5935+
5936+/*
5937+ * These are the main single-value transfer routines. They automatically
5938+ * use the right size if we just have the right pointer type.
5939+ */
5940+
5941+#define __put_user(x, ptr) \
5942+({ \
5943+ typeof(*(ptr)) __pu_val = (x); \
5944+ int __pu_err = 0; \
5945+ __chk_user_ptr(ptr); \
5946+ switch (sizeof(*(ptr))) { \
5947+ case 1: \
5948+ __put_user_asm(__pu_err, __pu_val, ptr, b, d, -EFAULT); \
5949+ break; \
5950+ case 2: \
5951+ __put_user_asm(__pu_err, __pu_val, ptr, w, d, -EFAULT); \
5952+ break; \
5953+ case 4: \
5954+ __put_user_asm(__pu_err, __pu_val, ptr, l, r, -EFAULT); \
5955+ break; \
5956+ case 8: \
5957+ { \
5958+ const void __user *__pu_ptr = (ptr); \
5959+ asm volatile ("\n" \
5960+ "1: move.l %2,(%1)+\n" \
5961+ "2: move.l %R2,(%1)\n" \
5962+ "3:\n" \
5963+ " .section .fixup,\"ax\"\n" \
5964+ " .even\n" \
5965+ "10: movel %3,%0\n" \
5966+ " jra 3b\n" \
5967+ " .previous\n" \
5968+ "\n" \
5969+ " .section __ex_table,\"a\"\n" \
5970+ " .align 4\n" \
5971+ " .long 1b,10b\n" \
5972+ " .long 2b,10b\n" \
5973+ " .long 3b,10b\n" \
5974+ " .previous" \
5975+ : "+d" (__pu_err), "+a" (__pu_ptr) \
5976+ : "r" (__pu_val), "i" (-EFAULT) \
5977+ : "memory"); \
5978+ break; \
5979+ } \
5980+ default: \
5981+ __pu_err = __put_user_bad(); \
5982+ break; \
5983+ } \
5984+ __pu_err; \
5985+})
5986+#define put_user(x, ptr) __put_user(x, ptr)
5987+
5988+
5989+#define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \
5990+ type __gu_val; \
5991+ asm volatile ("\n" \
5992+ "1: move."#bwl" %2,%1\n" \
5993+ "2:\n" \
5994+ " .section .fixup,\"ax\"\n" \
5995+ " .even\n" \
5996+ "10: move.l %3,%0\n" \
5997+ " subl %1,%1\n" \
5998+ " jra 2b\n" \
5999+ " .previous\n" \
6000+ "\n" \
6001+ " .section __ex_table,\"a\"\n" \
6002+ " .align 4\n" \
6003+ " .long 1b,10b\n" \
6004+ " .previous" \
6005+ : "+d" (res), "=&" #reg(__gu_val) \
6006+ : "m" (*(ptr)), "i" (err)); \
6007+ (x) = (typeof(*(ptr)))(unsigned long)__gu_val; \
6008+})
6009+
6010+#define __get_user(x, ptr) \
6011+({ \
6012+ int __gu_err = 0; \
6013+ __chk_user_ptr(ptr); \
6014+ switch (sizeof(*(ptr))) { \
6015+ case 1: \
6016+ __get_user_asm(__gu_err, x, ptr, u8, b, d, -EFAULT); \
6017+ break; \
6018+ case 2: \
6019+ __get_user_asm(__gu_err, x, ptr, u16, w, d, -EFAULT); \
6020+ break; \
6021+ case 4: \
6022+ __get_user_asm(__gu_err, x, ptr, u32, l, r, -EFAULT); \
6023+ break; \
6024+/* case 8: disabled because gcc-4.1 has a broken typeof \
6025+ { \
6026+ const void *__gu_ptr = (ptr); \
6027+ u64 __gu_val; \
6028+ asm volatile ("\n" \
6029+ "1: move.l (%2)+,%1\n" \
6030+ "2: move.l (%2),%R1\n" \
6031+ "3:\n" \
6032+ " .section .fixup,\"ax\"\n" \
6033+ " .even\n" \
6034+ "10: move.l %3,%0\n" \
6035+ " subl %1,%1\n" \
6036+ " subl %R1,%R1\n" \
6037+ " jra 3b\n" \
6038+ " .previous\n" \
6039+ "\n" \
6040+ " .section __ex_table,\"a\"\n" \
6041+ " .align 4\n" \
6042+ " .long 1b,10b\n" \
6043+ " .long 2b,10b\n" \
6044+ " .previous" \
6045+ : "+d" (__gu_err), "=&r" (__gu_val), \
6046+ "+a" (__gu_ptr) \
6047+ : "i" (-EFAULT) \
6048+ : "memory"); \
6049+ (x) = (typeof(*(ptr)))__gu_val; \
6050+ break; \
6051+ } */ \
6052+ default : \
6053+ __gu_err = __get_user_bad(); \
6054+ break; \
6055+ } \
6056+ __gu_err; \
6057+})
6058+#define get_user(x, ptr) __get_user(x, ptr)
6059+
6060+unsigned long __generic_copy_from_user(void *to, const void __user *from,
6061+ unsigned long n);
6062+unsigned long __generic_copy_to_user(void __user *to, const void *from,
6063+ unsigned long n);
6064+
6065+#define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\
6066+ asm volatile ("\n" \
6067+ "1: move."#s1" (%2)+,%3\n" \
6068+ " move."#s1" %3,(%1)+\n" \
6069+ "2: move."#s2" (%2)+,%3\n" \
6070+ " move."#s2" %3,(%1)+\n" \
6071+ " .ifnc \""#s3"\",\"\"\n" \
6072+ "3: move."#s3" (%2)+,%3\n" \
6073+ " move."#s3" %3,(%1)+\n" \
6074+ " .endif\n" \
6075+ "4:\n" \
6076+ " .section __ex_table,\"a\"\n" \
6077+ " .align 4\n" \
6078+ " .long 1b,10f\n" \
6079+ " .long 2b,20f\n" \
6080+ " .ifnc \""#s3"\",\"\"\n" \
6081+ " .long 3b,30f\n" \
6082+ " .endif\n" \
6083+ " .previous\n" \
6084+ "\n" \
6085+ " .section .fixup,\"ax\"\n" \
6086+ " .even\n" \
6087+ "10: clr."#s1" (%1)+\n" \
6088+ "20: clr."#s2" (%1)+\n" \
6089+ " .ifnc \""#s3"\",\"\"\n" \
6090+ "30: clr."#s3" (%1)+\n" \
6091+ " .endif\n" \
6092+ " moveq.l #"#n",%0\n" \
6093+ " jra 4b\n" \
6094+ " .previous\n" \
6095+ : "+d" (res), "+&a" (to), "+a" (from), "=&d" (tmp) \
6096+ : : "memory")
6097+
6098+#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \
6099+ asm volatile ("\n" \
6100+ " move."#s1" (%2)+,%3\n" \
6101+ "11: move."#s1" %3,(%1)+\n" \
6102+ "12: move."#s2" (%2)+,%3\n" \
6103+ "21: move."#s2" %3,(%1)+\n" \
6104+ "22:\n" \
6105+ " .ifnc \""#s3"\",\"\"\n" \
6106+ " move."#s3" (%2)+,%3\n" \
6107+ "31: move."#s3" %3,(%1)+\n" \
6108+ "32:\n" \
6109+ " .endif\n" \
6110+ "4:\n" \
6111+ "\n" \
6112+ " .section __ex_table,\"a\"\n" \
6113+ " .align 4\n" \
6114+ " .long 11b,5f\n" \
6115+ " .long 12b,5f\n" \
6116+ " .long 21b,5f\n" \
6117+ " .long 22b,5f\n" \
6118+ " .ifnc \""#s3"\",\"\"\n" \
6119+ " .long 31b,5f\n" \
6120+ " .long 32b,5f\n" \
6121+ " .endif\n" \
6122+ " .previous\n" \
6123+ "\n" \
6124+ " .section .fixup,\"ax\"\n" \
6125+ " .even\n" \
6126+ "5: moveq.l #"#n",%0\n" \
6127+ " jra 4b\n" \
6128+ " .previous\n" \
6129+ : "+d" (res), "+a" (to), "+a" (from), "=&d" (tmp) \
6130+ : : "memory")
6131+
6132+#endif /* _M68K_CF_UACCESS_H */
6133--- /dev/null
6134+++ b/arch/m68k/include/asm/cf_virtconvert.h
6135@@ -0,0 +1,63 @@
6136+/*
6137+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
6138+ *
6139+ * This file is subject to the terms and conditions of the GNU General Public
6140+ * License. See the file COPYING in the main directory of this archive
6141+ * for more details.
6142+ */
6143+#ifndef __CF_VIRTCONVERT__
6144+#define __CF_VIRTCONVERT__
6145+
6146+/*
6147+ * Macros used for converting between virtual and physical mappings.
6148+ *
6149+ * Coldfire Specific
6150+ */
6151+
6152+#ifdef __KERNEL__
6153+
6154+#include <linux/compiler.h>
6155+#include <linux/mmzone.h>
6156+#include <asm/setup.h>
6157+#include <asm/page.h>
6158+
6159+/*
6160+ * Change virtual addresses to physical addresses and vv.
6161+ */
6162+static inline unsigned long virt_to_phys(void *address)
6163+{
6164+ return __pa(address);
6165+}
6166+
6167+static inline void *phys_to_virt(unsigned long address)
6168+{
6169+ return __va(address);
6170+}
6171+
6172+/* Permanent address of a page. */
6173+#ifdef CONFIG_SINGLE_MEMORY_CHUNK
6174+#define page_to_phys(page) \
6175+ __pa(PAGE_OFFSET + \
6176+ (((page) - pg_data_map[0].node_mem_map) << PAGE_SHIFT))
6177+#else
6178+#define page_to_phys(_page) ({ \
6179+ struct page *__page = _page; \
6180+ struct pglist_data *pgdat; \
6181+ pgdat = pg_data_table[page_to_nid(__page)]; \
6182+ page_to_pfn(__page) << PAGE_SHIFT; \
6183+})
6184+#endif
6185+
6186+/*
6187+ * IO bus memory addresses are 1:1 with the physical address,
6188+ */
6189+#ifdef CONFIG_PCI
6190+#define virt_to_bus(a) (a + PCI_DMA_BASE)
6191+#define bus_to_virt(a) (a - PCI_DMA_BASE)
6192+#else
6193+#define virt_to_bus(a) (a)
6194+#define bus_to_virt(a) (a)
6195+#endif
6196+
6197+#endif /* __KERNEL__ */
6198+#endif /* __CF_VIRTCONVERT__ */
6199--- /dev/null
6200+++ b/arch/m68k/include/asm/cfcache.h
6201@@ -0,0 +1,146 @@
6202+/*
6203+ * include/asm-m68k/cfcache.h - Coldfire Cache Controller
6204+ *
6205+ * Kurt Mahan kmahan@freescale.com
6206+ *
6207+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
6208+ *
6209+ * This program is free software; you can redistribute it and/or modify it
6210+ * under the terms of the GNU General Public License as published by the
6211+ * Free Software Foundation; either version 2 of the License, or (at your
6212+ * option) any later version.
6213+ */
6214+#ifndef CF_CFCACHE_H
6215+#define CF_CFCACHE_H
6216+
6217+/*
6218+ * CACR Cache Control Register
6219+ */
6220+#define CF_CACR_DEC (0x80000000) /* Data Cache Enable */
6221+#define CF_CACR_DW (0x40000000) /* Data default Write-protect */
6222+#define CF_CACR_DESB (0x20000000) /* Data Enable Store Buffer */
6223+#define CF_CACR_DPI (0x10000000) /* Data Disable CPUSHL Invalidate */
6224+#define CF_CACR_DHLCK (0x08000000) /* 1/2 Data Cache Lock Mode */
6225+#define CF_CACR_DDCM_00 (0x00000000) /* Cacheable writethrough imprecise */
6226+#define CF_CACR_DDCM_01 (0x02000000) /* Cacheable copyback */
6227+#define CF_CACR_DDCM_10 (0x04000000) /* Noncacheable precise */
6228+#define CF_CACR_DDCM_11 (0x06000000) /* Noncacheable imprecise */
6229+#define CF_CACR_DCINVA (0x01000000) /* Data Cache Invalidate All */
6230+#define CF_CACR_DDSP (0x00800000) /* Data default supervisor-protect */
6231+#define CF_CACR_IVO (0x00100000) /* Invalidate only */
6232+#define CF_CACR_BEC (0x00080000) /* Branch Cache Enable */
6233+#define CF_CACR_BCINVA (0x00040000) /* Branch Cache Invalidate All */
6234+#define CF_CACR_IEC (0x00008000) /* Instruction Cache Enable */
6235+#define CF_CACR_SPA (0x00004000) /* Search by Physical Address */
6236+#define CF_CACR_DNFB (0x00002000) /* Default cache-inhibited fill buf */
6237+#define CF_CACR_IDPI (0x00001000) /* Instr Disable CPUSHL Invalidate */
6238+#define CF_CACR_IHLCK (0x00000800) /* 1/2 Instruction Cache Lock Mode */
6239+#define CF_CACR_IDCM (0x00000400) /* Noncacheable Instr default mode */
6240+#define CF_CACR_ICINVA (0x00000100) /* Instr Cache Invalidate All */
6241+#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */
6242+#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
6243+
6244+#ifdef CONFIG_M5445X
6245+/*
6246+ * M5445x Cache Configuration
6247+ * - cache line size is 16 bytes
6248+ * - cache is 4-way set associative
6249+ * - each cache has 256 sets (64k / 16bytes / 4way)
6250+ * - I-Cache size is 16KB
6251+ * - D-Cache size is 16KB
6252+ */
6253+#define ICACHE_SIZE 0x4000 /* instruction - 16k */
6254+#define DCACHE_SIZE 0x4000 /* data - 16k */
6255+
6256+#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
6257+#define CACHE_SETS 0x0100 /* 256 sets */
6258+#define CACHE_WAYS 0x0004 /* 4 way */
6259+
6260+#define CACHE_DISABLE_MODE (CF_CACR_DCINVA+ \
6261+ CF_CACR_BCINVA+ \
6262+ CF_CACR_ICINVA)
6263+
6264+#ifndef CONFIG_M5445X_DISABLE_CACHE
6265+#define CACHE_INITIAL_MODE (CF_CACR_DEC+ \
6266+ CF_CACR_BEC+ \
6267+ CF_CACR_IEC+ \
6268+ CF_CACR_DESB+ \
6269+ CF_CACR_EUSP)
6270+#else
6271+/* cache disabled for testing */
6272+#define CACHE_INITIAL_MODE (CF_CACR_EUSP)
6273+#endif /* CONFIG_M5445X_DISABLE_CACHE */
6274+
6275+#elif defined(CONFIG_M547X_8X)
6276+/*
6277+ * * M547x/M548x Cache Configuration
6278+ * * - cache line size is 16 bytes
6279+ * * - cache is 4-way set associative
6280+ * * - each cache has 512 sets (128k / 16bytes / 4way)
6281+ * * - I-Cache size is 32KB
6282+ * * - D-Cache size is 32KB
6283+ * */
6284+#define ICACHE_SIZE 0x8000 /* instruction - 32k */
6285+#define DCACHE_SIZE 0x8000 /* data - 32k */
6286+
6287+#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
6288+#define CACHE_SETS 0x0200 /* 512 sets */
6289+#define CACHE_WAYS 0x0004 /* 4 way */
6290+
6291+/* in for the old cpushl caching code */
6292+#define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)<<CACHE_WAYS)
6293+#define _ICACHE_SET_MASK ((ICACHE_SIZE/64-1)<<CACHE_WAYS)
6294+#define LAST_DCACHE_ADDR _DCACHE_SET_MASK
6295+#define LAST_ICACHE_ADDR _ICACHE_SET_MASK
6296+
6297+#define CACHE_DISABLE_MODE (CF_CACR_DCINVA+ \
6298+ CF_CACR_BCINVA+ \
6299+ CF_CACR_ICINVA)
6300+
6301+#define CACHE_INITIAL_MODE (CF_CACR_DEC+ \
6302+ CF_CACR_BEC+ \
6303+ CF_CACR_IEC+ \
6304+ CF_CACR_DESB+ \
6305+ CF_CACR_EUSP)
6306+#elif defined(CONFIG_M5441X)
6307+/*
6308+ * M5441x Cache Configuration
6309+ * - cache line size is 16 bytes
6310+ * - cache is 4-way set associative
6311+ * - each cache has 128 sets (8k / 16bytes / 4way)
6312+ * - I-Cache size is 8KB
6313+ * - D-Cache size is 8KB
6314+ */
6315+#define ICACHE_SIZE 0x2000 /* instruction - 8k */
6316+#define DCACHE_SIZE 0x2000 /* data - 8k */
6317+
6318+#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
6319+#define CACHE_SETS 0x0080 /* 128 sets */
6320+#define CACHE_WAYS 0x0004 /* 4 way */
6321+
6322+#define CACHE_DISABLE_MODE (CF_CACR_DCINVA+ \
6323+ CF_CACR_BCINVA+ \
6324+ CF_CACR_ICINVA)
6325+
6326+#ifndef CONFIG_M5441X_DISABLE_CACHE
6327+#define CACHE_INITIAL_MODE (CF_CACR_DEC+ \
6328+ CF_CACR_BEC+ \
6329+ CF_CACR_IEC+ \
6330+ CF_CACR_DESB+ \
6331+ CF_CACR_DDCM_01+ \
6332+ CF_CACR_EUSP)
6333+#else
6334+/* cache disabled for testing */
6335+#define CACHE_INITIAL_MODE (CF_CACR_EUSP)
6336+#endif /* CONFIG_M5441X_DISABLE_CACHE */
6337+
6338+#endif
6339+
6340+#ifndef __ASSEMBLY__
6341+
6342+extern unsigned long shadow_cacr;
6343+extern void cacr_set(unsigned long x);
6344+
6345+#endif /* !__ASSEMBLY__ */
6346+
6347+#endif /* CF_CACHE_H */
6348--- /dev/null
6349+++ b/arch/m68k/include/asm/cfmmu.h
6350@@ -0,0 +1,112 @@
6351+/*
6352+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
6353+ * Definitions for Coldfire V4e MMU
6354+ *
6355+ * This file is subject to the terms and conditions of the GNU General Public
6356+ * License. See the file COPYING in the main directory of this archive
6357+ * for more details.
6358+ */
6359+#include <asm/movs.h>
6360+
6361+#ifndef __CF_MMU_H__
6362+#define __CF_MMU_H__
6363+
6364+
6365+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
6366+#define MMU_BASE 0xE8000000
6367+#elif defined(CONFIG_M5441X)
6368+#define MMU_BASE 0xD8000000
6369+#endif
6370+
6371+#define MMUCR (MMU_BASE+0x00)
6372+#define MMUCR_ASMN 1
6373+#define MMUCR_ASM (1<<MMUCR_ASMN)
6374+#define MMUCR_ENN 0
6375+#define MMUCR_EN (1<<MMUCR_ENN)
6376+
6377+#define MMUOR REG16(MMU_BASE+0x04+0x02)
6378+#define MMUOR_AAN 16
6379+#define MMUOR_AA (0xffff<<MMUOR_AAN)
6380+#define MMUOR_STLBN 8
6381+#define MMUOR_STLB (1<<MMUOR_STLBN)
6382+#define MMUOR_CAN 7
6383+#define MMUOR_CA (1<<MMUOR_CAN)
6384+#define MMUOR_CNLN 6
6385+#define MMUOR_CNL (1<<MMUOR_CNLN)
6386+#define MMUOR_CASN 5
6387+#define MMUOR_CAS (1<<MMUOR_CASN)
6388+#define MMUOR_ITLBN 4
6389+#define MMUOR_ITLB (1<<MMUOR_ITLBN)
6390+#define MMUOR_ADRN 3
6391+#define MMUOR_ADR (1<<MMUOR_ADRN)
6392+#define MMUOR_RWN 2
6393+#define MMUOR_RW (1<<MMUOR_RWN)
6394+#define MMUOR_ACCN 1
6395+#define MMUOR_ACC (1<<MMUOR_ACCN)
6396+#define MMUOR_UAAN 0
6397+#define MMUOR_UAA (1<<MMUOR_UAAN)
6398+
6399+#define MMUSR REG32(MMU_BASE+0x08)
6400+#define MMUSR_SPFN 5
6401+#define MMUSR_SPF (1<<MMUSR_SPFN)
6402+#define MMUSR_RFN 4
6403+#define MMUSR_RF (1<<MMUSR_RFN)
6404+#define MMUSR_WFN 3
6405+#define MMUSR_WF (1<<MMUSR_WFN)
6406+#define MMUSR_HITN 1
6407+#define MMUSR_HIT (1<<MMUSR_HITN)
6408+
6409+#define MMUAR REG32(MMU_BASE+0x10)
6410+#define MMUAR_VPN 1
6411+#define MMUAR_VP (0xfffffffe)
6412+#define MMUAR_SN 0
6413+#define MMUAR_S (1<<MMUAR_SN)
6414+
6415+#define MMUTR REG32(MMU_BASE+0x14)
6416+#define MMUTR_VAN 10
6417+#define MMUTR_VA (0xfffffc00)
6418+#define MMUTR_IDN 2
6419+#define MMUTR_ID (0xff<<MMUTR_IDN)
6420+#define MMUTR_SGN 1
6421+#define MMUTR_SG (1<<MMUTR_SGN)
6422+#define MMUTR_VN 0
6423+#define MMUTR_V (1<<MMUTR_VN)
6424+
6425+#define MMUDR REG32(MMU_BASE+0x18)
6426+#define MMUDR_PAN 10
6427+#define MMUDR_PA (0xfffffc00)
6428+#define MMUDR_SZN 8
6429+#define MMUDR_SZ_MASK (0x2<<MMUDR_SZN)
6430+#define MMUDR_SZ1M (0<<MMUDR_SZN)
6431+#define MMUDR_SZ4K (1<<MMUDR_SZN)
6432+#define MMUDR_SZ8K (2<<MMUDR_SZN)
6433+#define MMUDR_SZ16M (3<<MMUDR_SZN)
6434+#define MMUDR_CMN 6
6435+#define MMUDR_INC (2<<MMUDR_CMN)
6436+#define MMUDR_IC (0<<MMUDR_CMN)
6437+#define MMUDR_DWT (0<<MMUDR_CMN)
6438+#define MMUDR_DCB (1<<MMUDR_CMN)
6439+#define MMUDR_DNCP (2<<MMUDR_CMN)
6440+#define MMUDR_DNCIP (3<<MMUDR_CMN)
6441+#define MMUDR_SPN 5
6442+#define MMUDR_SP (1<<MMUDR_SPN)
6443+#define MMUDR_RN 4
6444+#define MMUDR_R (1<<MMUDR_RN)
6445+#define MMUDR_WN 3
6446+#define MMUDR_W (1<<MMUDR_WN)
6447+#define MMUDR_XN 2
6448+#define MMUDR_X (1<<MMUDR_XN)
6449+#define MMUDR_LKN 1
6450+#define MMUDR_LK (1<<MMUDR_LKN)
6451+
6452+
6453+#ifndef __ASSEMBLY__
6454+#define CF_PMEGS_NUM 256
6455+#define CF_INVALID_CONTEXT 255
6456+#define CF_PAGE_PGNUM_MASK (PAGE_MASK)
6457+
6458+extern int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb,
6459+ int extension_word);
6460+#endif /* __ASSEMBLY__*/
6461+
6462+#endif /* !__CF_MMU_H__ */
6463--- a/arch/m68k/include/asm/coldfire.h
6464+++ b/arch/m68k/include/asm/coldfire.h
6465@@ -5,6 +5,13 @@
6466  *
6467  * (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com)
6468  * (C) Copyright 2000, Lineo (www.lineo.com)
6469+ *
6470+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Right Reserved.
6471+ * Shrek Wu b16972@freescale.com
6472+ *
6473+ * This file is subject to the terms and conditions of the GNU General Public
6474+ * License. See the file COPYING in the main directory of this archive
6475+ * for more details.
6476  */
6477 
6478 /****************************************************************************/
6479@@ -19,27 +26,78 @@
6480  * here. Also the peripheral clock (bus clock) divide ratio is set
6481  * at config time too.
6482  */
6483+/*FIXME Jason*/
6484+#if 0
6485 #ifdef CONFIG_CLOCK_SET
6486 #define MCF_CLK CONFIG_CLOCK_FREQ
6487 #define MCF_BUSCLK (CONFIG_CLOCK_FREQ / CONFIG_CLOCK_DIV)
6488 #else
6489 #error "Don't know what your ColdFire CPU clock frequency is??"
6490 #endif
6491+#endif
6492+
6493+
6494+#define MCF_CLK CONFIG_MCFCLK
6495+#define MCF_BUSCLK (CONFIG_MCFCLK/2)
6496+
6497+
6498+#if defined(CONFIG_M520x)
6499+#define MCF_IPSBAR 0xFC000000
6500+#else
6501+#define MCF_IPSBAR 0x40000000
6502+#endif
6503 
6504+#if defined(CONFIG_M5445X) || defined(CONFIG_M5441X)
6505+#define MCF_MBAR 0x0
6506+/*
6507+ * Even though RAMBAR1 macro should be in the 0x8xxxxxxx range,
6508+ * here set the CONFIG_SDRAM_BASE value to it to use
6509+ * SDRAM memory, not SRAM memory.
6510+ */
6511+#define MCF_RAMBAR1 (CONFIG_SDRAM_BASE)
6512+#elif defined(CONFIG_M547X_8X)
6513+#define MCF_MBAR 0xF0000000
6514+#define MCF_MMUBAR 0xF1000000
6515+#define MCF_RAMBAR0 0xF3000000
6516+#define MCF_RAMBAR1 0xF3001000
6517+#else
6518 /*
6519  * Define the processor support peripherals base address.
6520  * This is generally setup by the boards start up code.
6521  */
6522 #define MCF_MBAR 0x10000000
6523 #define MCF_MBAR2 0x80000000
6524-#if defined(CONFIG_M54xx)
6525-#define MCF_IPSBAR MCF_MBAR
6526-#elif defined(CONFIG_M520x)
6527-#define MCF_IPSBAR 0xFC000000
6528-#else
6529-#define MCF_IPSBAR 0x40000000
6530 #endif
6531 
6532+#ifdef __ASSEMBLY__
6533+#define REG32
6534+#define REG16
6535+#define REG08
6536+#else /* __ASSEMBLY__ */
6537+#define REG32(x) ((volatile unsigned long *)(x))
6538+#define REG16(x) ((volatile unsigned short *)(x))
6539+#define REG08(x) ((volatile unsigned char *)(x))
6540+
6541+#define MCF_REG32(x) (*(volatile unsigned long *)(MCF_MBAR+(x)))
6542+#define MCF_REG16(x) (*(volatile unsigned short *)(MCF_MBAR+(x)))
6543+#define MCF_REG08(x) (*(volatile unsigned char *)(MCF_MBAR+(x)))
6544+
6545+void cacr_set(unsigned long);
6546+unsigned long cacr_get(void);
6547+
6548+#define coldfire_enable_irq0(irq) MCF_INTC0_CIMR = (irq);
6549+
6550+#define coldfire_enable_irq1(irq) MCF_INTC1_CIMR = (irq);
6551+
6552+#define coldfire_disable_irq0(irq) MCF_INTC0_SIMR = (irq);
6553+
6554+#define coldfire_disable_irq1(irq) MCF_INTC1_SIMR = (irq);
6555+
6556+#define getiprh() MCF_INTC0_IPRH
6557+
6558+#endif /* __ASSEMBLY__ */
6559+
6560+
6561 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
6562     defined(CONFIG_M520x)
6563 #undef MCF_MBAR
6564--- a/arch/m68k/include/asm/delay_mm.h
6565+++ b/arch/m68k/include/asm/delay_mm.h
6566@@ -1,18 +1,41 @@
6567-#ifndef _M68K_DELAY_H
6568-#define _M68K_DELAY_H
6569-
6570-#include <asm/param.h>
6571-
6572 /*
6573  * Copyright (C) 1994 Hamish Macdonald
6574  *
6575+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6576+ *
6577+ * This file is subject to the terms and conditions of the GNU General Public
6578+ * License. See the file COPYING in the main directory of this archive
6579+ * for more details.
6580+ *
6581  * Delay routines, using a pre-computed "loops_per_jiffy" value.
6582  */
6583 
6584+#ifndef _M68K_DELAY_H
6585+#define _M68K_DELAY_H
6586+
6587+#include <asm/param.h>
6588+
6589 static inline void __delay(unsigned long loops)
6590 {
6591+#if defined(CONFIG_COLDFIRE)
6592+ /* The coldfire runs this loop at significantly different speeds
6593+ * depending upon long word alignment or not. We'll pad it to
6594+ * long word alignment which is the faster version.
6595+ * The 0x4a8e is of course a 'tstl %fp' instruction. This is better
6596+ * than using a NOP (0x4e71) instruction because it executes in one
6597+ * cycle not three and doesn't allow for an arbitary delay waiting
6598+ * for bus cycles to finish. Also fp/a6 isn't likely to cause a
6599+ * stall waiting for the register to become valid if such is added
6600+ * to the coldfire at some stage.
6601+ */
6602+ __asm__ __volatile__ (".balignw 4, 0x4a8e\n\t"
6603+ "1: subql #1, %0\n\t"
6604+ "jcc 1b"
6605+ : "=d" (loops) : "0" (loops));
6606+#else
6607     __asm__ __volatile__ ("1: subql #1,%0; jcc 1b"
6608         : "=d" (loops) : "0" (loops));
6609+#endif
6610 }
6611 
6612 extern void __bad_udelay(void);
6613@@ -26,12 +49,17 @@ extern void __bad_udelay(void);
6614  */
6615 static inline void __const_udelay(unsigned long xloops)
6616 {
6617+#if defined(CONFIG_COLDFIRE)
6618+
6619+ __delay(((((unsigned long long) xloops * loops_per_jiffy))>>32)*HZ);
6620+#else
6621     unsigned long tmp;
6622 
6623     __asm__ ("mulul %2,%0:%1"
6624         : "=d" (xloops), "=d" (tmp)
6625         : "d" (xloops), "1" (loops_per_jiffy));
6626     __delay(xloops * HZ);
6627+#endif
6628 }
6629 
6630 static inline void __udelay(unsigned long usecs)
6631@@ -46,12 +74,16 @@ static inline void __udelay(unsigned lon
6632 static inline unsigned long muldiv(unsigned long a, unsigned long b,
6633                    unsigned long c)
6634 {
6635+#if defined(CONFIG_COLDFIRE)
6636+ return (long)(((unsigned long long)a * b)/c);
6637+#else
6638     unsigned long tmp;
6639 
6640     __asm__ ("mulul %2,%0:%1; divul %3,%0:%1"
6641         : "=d" (tmp), "=d" (a)
6642         : "d" (b), "d" (c), "1" (a));
6643     return a;
6644+#endif
6645 }
6646 
6647 #endif /* defined(_M68K_DELAY_H) */
6648--- a/arch/m68k/include/asm/div64.h
6649+++ b/arch/m68k/include/asm/div64.h
6650@@ -1,12 +1,17 @@
6651+/*
6652+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6653+ *
6654+ * This file is subject to the terms and conditions of the GNU General Public
6655+ * License. See the file COPYING in the main directory of this archive
6656+ * for more details.
6657+ */
6658 #ifndef _M68K_DIV64_H
6659 #define _M68K_DIV64_H
6660 
6661-#ifdef CONFIG_MMU
6662-
6663+#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
6664 #include <linux/types.h>
6665 
6666 /* n = n / base; return rem; */
6667-
6668 #define do_div(n, base) ({ \
6669     union { \
6670         unsigned long n32[2]; \
6671--- a/arch/m68k/include/asm/dma.h
6672+++ b/arch/m68k/include/asm/dma.h
6673@@ -1,7 +1,10 @@
6674-#ifndef _M68K_DMA_H
6675-#define _M68K_DMA_H 1
6676-
6677-#ifdef CONFIG_COLDFIRE
6678+/*
6679+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6680+ *
6681+ * This file is subject to the terms and conditions of the GNU General Public
6682+ * License. See the file COPYING in the main directory of this archive
6683+ * for more details.
6684+ */
6685 /*
6686  * ColdFire DMA Model:
6687  * ColdFire DMA supports two forms of DMA: Single and Dual address. Single
6688@@ -25,6 +28,11 @@
6689  * Arthur Shipkowski (art@videon-central.com)
6690  */
6691 
6692+#ifndef _M68K_DMA_H
6693+#define _M68K_DMA_H 1
6694+
6695+#ifdef CONFIG_COLDFIRE
6696+
6697 #include <asm/coldfire.h>
6698 #include <asm/mcfsim.h>
6699 #include <asm/mcfdma.h>
6700@@ -479,13 +487,106 @@ static __inline__ int get_dma_residue(un
6701 
6702 /* it's useless on the m68k, but unfortunately needed by the new
6703    bootmem allocator (but this should do it for this) */
6704+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
6705+#define MAX_DMA_ADDRESS 0xefffffff
6706+#elif defined(CONFIG_M5441X)
6707+#define MAX_DMA_ADDRESS 0xdfffffff
6708+#else
6709 #define MAX_DMA_ADDRESS PAGE_OFFSET
6710+#endif
6711 
6712+#ifndef CONFIG_COLDFIRE
6713 #define MAX_DMA_CHANNELS 8
6714 
6715 extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
6716 extern void free_dma(unsigned int dmanr); /* release it again */
6717 
6718+#else /* not (defined(CONFIG_MCF5474) || defined(CONFIG_MCF5484)
6719+ || defined(CONFIG_MCF5475) || defined(CONFIG_MCF5485)) */
6720+/************************************************
6721+ * Multichannel DMA definitions *
6722+ ************************************************/
6723+#ifdef CONFIG_MCD_DMA
6724+#include <asm/MCD_dma.h>
6725+#include <asm/m5485dma.h>
6726+
6727+struct scatterlist;
6728+
6729+#define MAX_DMA_CHANNELS NCHANNELS
6730+/*
6731+ * identifiers for each initiator/requestor
6732+ */
6733+#define DMA_ALWAYS (0)
6734+#define DMA_DSPI_RX (1)
6735+#define DMA_DSPI_TX (2)
6736+#define DMA_DREQ0 (3)
6737+#define DMA_PSC0_RX (4)
6738+#define DMA_PSC0_TX (5)
6739+#define DMA_USBEP0 (6)
6740+#define DMA_USBEP1 (7)
6741+#define DMA_USBEP2 (8)
6742+#define DMA_USBEP3 (9)
6743+#define DMA_PCI_TX (10)
6744+#define DMA_PCI_RX (11)
6745+#define DMA_PSC1_RX (12)
6746+#define DMA_PSC1_TX (13)
6747+#define DMA_I2C_RX (14)
6748+#define DMA_I2C_TX (15)
6749+#define DMA_FEC0_RX (16)
6750+#define DMA_FEC0_TX (17)
6751+#define DMA_FEC1_RX (18)
6752+#define DMA_FEC1_TX (19)
6753+#define DMA_DREQ1 (20)
6754+#define DMA_CTM0 (21)
6755+#define DMA_CTM1 (22)
6756+#define DMA_CTM2 (23)
6757+#define DMA_CTM3 (24)
6758+#define DMA_CTM4 (25)
6759+#define DMA_CTM5 (26)
6760+#define DMA_CTM6 (27)
6761+#define DMA_CTM7 (28)
6762+#define DMA_USBEP4 (29)
6763+#define DMA_USBEP5 (30)
6764+#define DMA_USBEP6 (31)
6765+#define DMA_PSC2_RX (32)
6766+#define DMA_PSC2_TX (33)
6767+#define DMA_PSC3_RX (34)
6768+#define DMA_PSC3_TX (35)
6769+#define DMA_FEC_RX(x) ((x == 0) ? DMA_FEC0_RX : DMA_FEC1_RX)
6770+#define DMA_FEC_TX(x) ((x == 0) ? DMA_FEC0_TX : DMA_FEC1_TX)
6771+
6772+int dma_set_initiator(int);
6773+unsigned int dma_get_initiator(int);
6774+void dma_remove_initiator(int);
6775+int dma_set_channel(int);
6776+int dma_get_channel(int);
6777+void dma_remove_channel(int);
6778+int dma_set_channel_fec(int requestor);
6779+int dma_connect(int channel, int address);
6780+int dma_disconnect(int channel);
6781+void dma_remove_channel_by_number(int channel);
6782+int dma_init(void);
6783+#endif
6784+
6785+extern spinlock_t dma_spin_lock;
6786+
6787+static inline unsigned long claim_dma_lock(void)
6788+{
6789+ unsigned long flags;
6790+ spin_lock_irqsave(&dma_spin_lock, flags);
6791+ return flags;
6792+}
6793+
6794+static inline void release_dma_lock(unsigned long flags)
6795+{
6796+ spin_unlock_irqrestore(&dma_spin_lock, flags);
6797+}
6798+#endif
6799+
6800+#ifdef CONFIG_PCI
6801+extern int isa_dma_bridge_buggy;
6802+#else
6803 #define isa_dma_bridge_buggy (0)
6804+#endif
6805 
6806 #endif /* _M68K_DMA_H */
6807--- a/arch/m68k/include/asm/elf.h
6808+++ b/arch/m68k/include/asm/elf.h
6809@@ -1,10 +1,17 @@
6810-#ifndef __ASMm68k_ELF_H
6811-#define __ASMm68k_ELF_H
6812-
6813+/*
6814+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6815+ *
6816+ * This file is subject to the terms and conditions of the GNU General Public
6817+ * License. See the file COPYING in the main directory of this archive
6818+ * for more details.
6819+ */
6820 /*
6821  * ELF register definitions..
6822  */
6823 
6824+#ifndef __ASMm68k_ELF_H
6825+#define __ASMm68k_ELF_H
6826+
6827 #include <asm/ptrace.h>
6828 #include <asm/user.h>
6829 
6830@@ -34,6 +41,26 @@
6831 #define R_68K_GLOB_DAT 20
6832 #define R_68K_JMP_SLOT 21
6833 #define R_68K_RELATIVE 22
6834+/* TLS static relocations */
6835+#define R_68K_TLS_GD32 25
6836+#define R_68K_TLS_GD16 26
6837+#define R_68K_TLS_GD8 27
6838+#define R_68K_TLS_LDM32 28
6839+#define R_68K_TLS_LDM16 29
6840+#define R_68K_TLS_LDM8 30
6841+#define R_68K_TLS_LDO32 31
6842+#define R_68K_TLS_LDO16 32
6843+#define R_68K_TLS_LDO8 33
6844+#define R_68K_TLS_IE32 34
6845+#define R_68K_TLS_IE16 35
6846+#define R_68K_TLS_IE8 36
6847+#define R_68K_TLS_LE32 37
6848+#define R_68K_TLS_LE16 38
6849+#define R_68K_TLS_LE8 39
6850+/* TLS dynamic relocations */
6851+#define R_68K_TLS_DTPMOD32 40
6852+#define R_68K_TLS_DTPREL32 41
6853+#define R_68K_TLS_TPREL32 42
6854 
6855 typedef unsigned long elf_greg_t;
6856 
6857@@ -59,7 +86,7 @@ typedef struct user_m68kfp_struct elf_fp
6858    is actually used on ASV. */
6859 #define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0
6860 
6861-#ifndef CONFIG_SUN3
6862+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
6863 #define ELF_EXEC_PAGESIZE 4096
6864 #else
6865 #define ELF_EXEC_PAGESIZE 8192
6866@@ -70,8 +97,10 @@ typedef struct user_m68kfp_struct elf_fp
6867    the loader. We need to make sure that it is out of the way of the program
6868    that it will "exec", and that there is sufficient room for the brk. */
6869 
6870-#ifndef CONFIG_SUN3
6871+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
6872 #define ELF_ET_DYN_BASE 0xD0000000UL
6873+#elif defined(CONFIG_COLDFIRE)
6874+#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x10000000)
6875 #else
6876 #define ELF_ET_DYN_BASE 0x0D800000UL
6877 #endif
6878@@ -115,4 +144,35 @@ typedef struct user_m68kfp_struct elf_fp
6879 
6880 #define SET_PERSONALITY(ex) set_personality(PER_LINUX)
6881 
6882+/*
6883+ * VDSO
6884+ */
6885+#ifdef CONFIG_VDSO
6886+extern unsigned int vdso_enabled;
6887+
6888+#define VDSO_BASE ((unsigned long)current->mm->context.vdso)
6889+#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x))
6890+
6891+#define VDSO_AUX_ENT \
6892+ if (vdso_enabled) \
6893+ NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);
6894+
6895+/* additional pages */
6896+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
6897+
6898+struct linux_binprm;
6899+extern int arch_setup_additional_pages(struct linux_binprm *bprm,
6900+ int executable_stack);
6901+
6902+#else
6903+/* no VDSO_AUX_ENT */
6904+#define VDSO_AUX_ENT
6905+#endif
6906+
6907+#define ARCH_DLINFO \
6908+do { \
6909+ /* vdso entry */ \
6910+ VDSO_AUX_ENT; \
6911+} while (0);
6912+
6913 #endif
6914--- a/arch/m68k/include/asm/io_mm.h
6915+++ b/arch/m68k/include/asm/io_mm.h
6916@@ -1,23 +1,36 @@
6917 /*
6918  * linux/include/asm-m68k/io.h
6919  *
6920+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6921+ *
6922+ * This file is subject to the terms and conditions of the GNU General Public
6923+ * License. See the file COPYING in the main directory of this archive
6924+ * for more details.
6925+ *
6926  * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
6927  * IO access
6928  * - added Q40 support
6929  * - added skeleton for GG-II and Amiga PCMCIA
6930  * 2/3/01 RZ: - moved a few more defs into raw_io.h
6931  *
6932- * inX/outX should not be used by any driver unless it does
6933- * ISA access. Other drivers should use function defined in raw_io.h
6934+ * inX/outX/readX/writeX should not be used by any driver unless it does
6935+ * ISA or PCI access. Other drivers should use function defined in raw_io.h
6936  * or define its own macros on top of these.
6937  *
6938- * inX(),outX() are for ISA I/O
6939+ * inX(),outX() are for PCI and ISA I/O
6940+ * readX(),writeX() are for PCI memory
6941  * isa_readX(),isa_writeX() are for ISA memory
6942+ *
6943+ * moved mem{cpy,set}_*io inside CONFIG_PCI
6944  */
6945 
6946 #ifndef _IO_H
6947 #define _IO_H
6948 
6949+#ifdef CONFIG_COLDFIRE
6950+#include <asm/cf_io.h>
6951+#else
6952+
6953 #ifdef __KERNEL__
6954 
6955 #include <linux/compiler.h>
6956@@ -49,6 +62,27 @@
6957 #define MULTI_ISA 0
6958 #endif /* Q40 */
6959 
6960+/* GG-II Zorro to ISA bridge */
6961+#ifdef CONFIG_GG2
6962+
6963+extern unsigned long gg2_isa_base;
6964+#define GG2_ISA_IO_B(ioaddr) \
6965+ (gg2_isa_base + 1 + ((unsigned long)(ioaddr) * 4))
6966+#define GG2_ISA_IO_W(ioaddr) \
6967+ (gg2_isa_base + ((unsigned long)(ioaddr) * 4))
6968+#define GG2_ISA_MEM_B(madr) \
6969+ (gg2_isa_base + 1 + (((unsigned long)(madr) * 4) & 0xfffff))
6970+#define GG2_ISA_MEM_W(madr) \
6971+ (gg2_isa_base + (((unsigned long)(madr) * 4) & 0xfffff))
6972+
6973+#ifndef MULTI_ISA
6974+#define MULTI_ISA 0
6975+#else
6976+#undef MULTI_ISA
6977+#define MULTI_ISA 1
6978+#endif
6979+#endif /* GG2 */
6980+
6981 #ifdef CONFIG_AMIGA_PCMCIA
6982 #include <asm/amigayle.h>
6983 
6984@@ -71,17 +105,22 @@
6985 #undef MULTI_ISA
6986 #endif
6987 
6988-#define ISA_TYPE_Q40 (1)
6989-#define ISA_TYPE_AG (2)
6990+#define Q40_ISA (1)
6991+#define GG2_ISA (2)
6992+#define AG_ISA (3)
6993 
6994 #if defined(CONFIG_Q40) && !defined(MULTI_ISA)
6995-#define ISA_TYPE ISA_TYPE_Q40
6996+#define ISA_TYPE Q40_ISA
6997 #define ISA_SEX 0
6998 #endif
6999 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
7000-#define ISA_TYPE ISA_TYPE_AG
7001+#define ISA_TYPE AG_ISA
7002 #define ISA_SEX 1
7003 #endif
7004+#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
7005+#define ISA_TYPE GG2_ISA
7006+#define ISA_SEX 0
7007+#endif
7008 
7009 #ifdef MULTI_ISA
7010 extern int isa_type;
7011@@ -98,65 +137,72 @@ extern int isa_sex;
7012 
7013 static inline u8 __iomem *isa_itb(unsigned long addr)
7014 {
7015- switch(ISA_TYPE)
7016- {
7017+ switch (ISA_TYPE) {
7018 #ifdef CONFIG_Q40
7019- case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
7020+ case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr);
7021+#endif
7022+#ifdef CONFIG_GG2
7023+ case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr);
7024 #endif
7025 #ifdef CONFIG_AMIGA_PCMCIA
7026- case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
7027+ case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr);
7028 #endif
7029- default: return NULL; /* avoid warnings, just in case */
7030- }
7031+ default: return NULL; /* avoid warnings, just in case */
7032+ }
7033 }
7034 static inline u16 __iomem *isa_itw(unsigned long addr)
7035 {
7036- switch(ISA_TYPE)
7037- {
7038+ switch (ISA_TYPE) {
7039 #ifdef CONFIG_Q40
7040- case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
7041+ case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr);
7042+#endif
7043+#ifdef CONFIG_GG2
7044+ case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr);
7045 #endif
7046 #ifdef CONFIG_AMIGA_PCMCIA
7047- case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
7048+ case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr);
7049 #endif
7050- default: return NULL; /* avoid warnings, just in case */
7051- }
7052+ default: return NULL; /* avoid warnings, just in case */
7053+ }
7054 }
7055 static inline u32 __iomem *isa_itl(unsigned long addr)
7056 {
7057- switch(ISA_TYPE)
7058- {
7059+ switch (ISA_TYPE) {
7060 #ifdef CONFIG_AMIGA_PCMCIA
7061- case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
7062+ case AG_ISA: return (u32 __iomem *)AG_ISA_IO_W(addr);
7063 #endif
7064- default: return 0; /* avoid warnings, just in case */
7065- }
7066+ default: return 0; /* avoid warnings, just in case */
7067+ }
7068 }
7069 static inline u8 __iomem *isa_mtb(unsigned long addr)
7070 {
7071- switch(ISA_TYPE)
7072- {
7073+ switch (ISA_TYPE) {
7074 #ifdef CONFIG_Q40
7075- case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
7076+ case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
7077+#endif
7078+#ifdef CONFIG_GG2
7079+ case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
7080 #endif
7081 #ifdef CONFIG_AMIGA_PCMCIA
7082- case ISA_TYPE_AG: return (u8 __iomem *)addr;
7083+ case AG_ISA: return (u8 __iomem *)addr;
7084 #endif
7085- default: return NULL; /* avoid warnings, just in case */
7086- }
7087+ default: return NULL; /* avoid warnings, just in case */
7088+ }
7089 }
7090 static inline u16 __iomem *isa_mtw(unsigned long addr)
7091 {
7092- switch(ISA_TYPE)
7093- {
7094+ switch (ISA_TYPE) {
7095 #ifdef CONFIG_Q40
7096- case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
7097+ case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
7098+#endif
7099+#ifdef CONFIG_GG2
7100+ case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
7101 #endif
7102 #ifdef CONFIG_AMIGA_PCMCIA
7103- case ISA_TYPE_AG: return (u16 __iomem *)addr;
7104+ case AG_ISA: return (u16 __iomem *)addr;
7105 #endif
7106- default: return NULL; /* avoid warnings, just in case */
7107- }
7108+ default: return NULL; /* avoid warnings, just in case */
7109+ }
7110 }
7111 
7112 
7113@@ -167,27 +213,30 @@ static inline u16 __iomem *isa_mtw(unsig
7114 #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
7115 #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
7116 
7117-#define isa_readb(p) in_8(isa_mtb((unsigned long)(p)))
7118-#define isa_readw(p) \
7119- (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
7120- : in_le16(isa_mtw((unsigned long)(p))))
7121-#define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val))
7122-#define isa_writew(val,p) \
7123- (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \
7124- : out_le16(isa_mtw((unsigned long)(p)),(val)))
7125-
7126+#define isa_readb(p) in_8(isa_mtb(p))
7127+#define isa_readw(p) (ISA_SEX ? in_be16(isa_mtw(p)) : in_le16(isa_mtw(p)))
7128+#define isa_writeb(val, p) out_8(isa_mtb(p), (val))
7129+#define isa_writew(val, p) \
7130+ (ISA_SEX ? out_be16(isa_mtw(p), (val)) : out_le16(isa_mtw(p), (val)))
7131 static inline void isa_delay(void)
7132 {
7133- switch(ISA_TYPE)
7134- {
7135+ switch (ISA_TYPE) {
7136 #ifdef CONFIG_Q40
7137- case ISA_TYPE_Q40: isa_outb(0,0x80); break;
7138+ case Q40_ISA:
7139+ isa_outb(0, 0x80);
7140+ break;
7141+#endif
7142+#ifdef CONFIG_GG2
7143+ case GG2_ISA:
7144+ break;
7145 #endif
7146 #ifdef CONFIG_AMIGA_PCMCIA
7147- case ISA_TYPE_AG: break;
7148+ case AG_ISA:
7149+ break;
7150 #endif
7151- default: break; /* avoid warnings */
7152- }
7153+ default:
7154+ break; /* avoid warnings */
7155+ }
7156 }
7157 
7158 #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
7159@@ -216,7 +265,10 @@ static inline void isa_delay(void)
7160        (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \
7161                   raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
7162 
7163+#endif /* CONFIG_ISA */
7164 
7165+
7166+#if defined(CONFIG_ISA) && !defined(CONFIG_PCI)
7167 #define inb isa_inb
7168 #define inb_p isa_inb_p
7169 #define outb isa_outb
7170@@ -239,9 +291,80 @@ static inline void isa_delay(void)
7171 #define readw isa_readw
7172 #define writeb isa_writeb
7173 #define writew isa_writew
7174+#endif /* CONFIG_ISA */
7175+
7176+#if defined(CONFIG_PCI)
7177+
7178+#define readl(addr) in_le32(addr)
7179+#define writel(val, addr) out_le32((addr), (val))
7180+
7181+/* those can be defined for both ISA and PCI - it won't work though */
7182+#define readb(addr) in_8(addr)
7183+#define readw(addr) in_le16(addr)
7184+#define writeb(val, addr) out_8((addr), (val))
7185+#define writew(val, addr) out_le16((addr), (val))
7186+
7187+#define readb_relaxed(addr) readb(addr)
7188+#define readw_relaxed(addr) readw(addr)
7189+#define readl_relaxed(addr) readl(addr)
7190+
7191+#ifndef CONFIG_ISA
7192+#define inb(port) in_8(port)
7193+#define outb(val, port) out_8((port), (val))
7194+#define inw(port) in_le16(port)
7195+#define outw(val, port) out_le16((port), (val))
7196+#define inl(port) in_le32(port)
7197+#define outl(val, port) out_le32((port), (val))
7198+#define insb(port, buf, nr) \
7199+ raw_insb((u8 *)(port), (u8 *)(buf), (nr))
7200+#define outsb(port, buf, nr) \
7201+ raw_outsb((u8 *)(port), (u8 *)(buf), (nr))
7202+#define insw(port, buf, nr) \
7203+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr))
7204+#define outsw(port, buf, nr) \
7205+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr))
7206+#define insl(port, buf, nr) \
7207+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
7208+#define outsl(port, buf, nr) \
7209+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
7210+
7211+#define __raw_readb readb
7212+#define __raw_readw readw
7213+#define __raw_readl readl
7214+#define __raw_writeb writeb
7215+#define __raw_writew writew
7216+#define __raw_writel writel
7217 
7218-#else /* CONFIG_ISA */
7219+#else
7220+/*
7221+ * kernel with both ISA and PCI compiled in, those have
7222+ * conflicting defs for in/out. Simply consider port < 1024
7223+ * ISA and everything else PCI. read,write not defined
7224+ * in this case
7225+ */
7226+#define inb(port) ((port) < 1024 ? isa_inb(port) : in_8(port))
7227+#define inb_p(port) ((port) < 1024 ? isa_inb_p(port) : in_8(port))
7228+#define inw(port) ((port) < 1024 ? isa_inw(port) : in_le16(port))
7229+#define inw_p(port) ((port) < 1024 ? isa_inw_p(port) : in_le16(port))
7230+#define inl(port) ((port) < 1024 ? isa_inl(port) : in_le32(port))
7231+#define inl_p(port) ((port) < 1024 ? isa_inl_p(port) : in_le32(port))
7232+
7233+#define outb(val, port) (((port) < 1024) ? isa_outb((val), (port))
7234+ : out_8((port), (val)))
7235+#define outb_p(val, port) (((port) < 1024) ? isa_outb_p((val), (port))
7236+ : out_8((port), (val)))
7237+#define outw(val, port) (((port) < 1024) ? isa_outw((val), (port))
7238+ : out_le16((port), (val)))
7239+#define outw_p(val, port) (((port) < 1024) ? isa_outw_p((val), (port))
7240+ : out_le16((port), (val)))
7241+#define outl(val, port) (((port) < 1024) ? isa_outl((val), (port))
7242+ : out_le32((port), (val)))
7243+#define outl_p(val, port) (((port) < 1024) ? isa_outl_p((val), (port))
7244+ : out_le32((port), (val)))
7245+#endif
7246+#endif /* CONFIG_PCI */
7247 
7248+#if !defined(CONFIG_ISA) && !defined(CONFIG_PCI)
7249 /*
7250  * We need to define dummy functions for GENERIC_IOMAP support.
7251  */
7252@@ -272,11 +395,11 @@ static inline void isa_delay(void)
7253 #define writeb(val,addr) out_8((addr),(val))
7254 #define readw(addr) in_le16(addr)
7255 #define writew(val,addr) out_le16((addr),(val))
7256-
7257-#endif /* CONFIG_ISA */
7258-
7259+#endif
7260+#if !defined(CONFIG_PCI)
7261 #define readl(addr) in_le32(addr)
7262 #define writel(val,addr) out_le32((addr),(val))
7263+#endif
7264 
7265 #define mmiowb()
7266 
7267@@ -333,4 +456,5 @@ static inline void memcpy_toio(volatile
7268  */
7269 #define xlate_dev_kmem_ptr(p) p
7270 
7271+#endif /* CONFIG_COLDFIRE */
7272 #endif /* _IO_H */
7273--- a/arch/m68k/include/asm/irq.h
7274+++ b/arch/m68k/include/asm/irq.h
7275@@ -1,14 +1,20 @@
7276-#ifndef _M68K_IRQ_H_
7277-#define _M68K_IRQ_H_
7278-
7279 /*
7280+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
7281+ *
7282+ * This file is subject to the terms and conditions of the GNU General Public
7283+ * License. See the file COPYING in the main directory of this archive
7284+ * for more details.
7285+ *
7286  * This should be the same as the max(NUM_X_SOURCES) for all the
7287  * different m68k hosts compiled into the kernel.
7288  * Currently the Atari has 72 and the Amiga 24, but if both are
7289  * supported in the kernel it is better to make room for 72.
7290  */
7291+#ifndef _M68K_IRQ_H_
7292+#define _M68K_IRQ_H_
7293 #if defined(CONFIG_COLDFIRE)
7294-#define NR_IRQS 256
7295+#define SYS_IRQS 256
7296+#define NR_IRQS SYS_IRQS
7297 #elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || defined(CONFIG_SUN3X)
7298 #define NR_IRQS 200
7299 #elif defined(CONFIG_ATARI) || defined(CONFIG_MAC)
7300--- a/arch/m68k/include/asm/machdep.h
7301+++ b/arch/m68k/include/asm/machdep.h
7302@@ -1,6 +1,12 @@
7303+/*
7304+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
7305+ *
7306+ * This file is subject to the terms and conditions of the GNU General Public
7307+ * License. See the file COPYING in the main directory of this archive
7308+ * for more details.
7309+ */
7310 #ifndef _M68K_MACHDEP_H
7311 #define _M68K_MACHDEP_H
7312-
7313 #include <linux/seq_file.h>
7314 #include <linux/interrupt.h>
7315 
7316@@ -42,4 +48,11 @@ extern irqreturn_t arch_timer_interrupt(
7317 extern void config_BSP(char *command, int len);
7318 extern void do_IRQ(int irq, struct pt_regs *fp);
7319 
7320+#ifdef CONFIG_COLDFIRE
7321+extern void __init config_coldfire(void);
7322+extern void __init mmu_context_init(void);
7323+extern irq_handler_t mach_default_handler;
7324+extern void (*mach_tick)(void);
7325+#endif
7326+
7327 #endif /* _M68K_MACHDEP_H */
7328--- /dev/null
7329+++ b/arch/m68k/include/asm/mcfdspi.h
7330@@ -0,0 +1,59 @@
7331+/*
7332+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7333+ * Author: Andrey Butok
7334+ *
7335+ * This file is based on mcfqspi.h
7336+ *
7337+ * This program is free software; you can redistribute it and/or modify it
7338+ * under the terms of the GNU General Public License as published by the
7339+ * Free Software Foundation; either version 2 of the License, or (at your
7340+ * option) any later version.
7341+ *
7342+ * This program is distributed in the hope that it will be useful,
7343+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
7344+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7345+ * GNU General Public License for more details.
7346+ *
7347+ * You should have received a copy of the GNU General Public License
7348+ * along with this program; if not, write to the Free Software
7349+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
7350+ *
7351+ ***************************************************************************
7352+ * Changes:
7353+ * v0.001 25 March 2008 Andrey Butok
7354+ * Initial Release - developed on uClinux with 2.6.23 kernel.
7355+ *
7356+ */
7357+
7358+#ifndef MCFDSPI_H_
7359+#define MCFDSPI_H_
7360+
7361+struct coldfire_dspi_chip {
7362+ u8 mode;
7363+ u8 bits_per_word;
7364+ u16 void_write_data;
7365+ /* Only used in master mode */
7366+ u8 dbr; /* Double baud rate */
7367+ u8 pbr; /* Baud rate prescaler */
7368+ u8 br; /* Baud rate scaler */
7369+ u8 pcssck; /* PCS to SCK delay prescaler */
7370+ u8 pasc; /* After SCK delay prescaler */
7371+ u8 pdt; /* Delay after transfer prescaler */
7372+ u8 cssck; /* PCS to SCK delay scaler */
7373+ u8 asc; /* After SCK delay scaler */
7374+ u8 dt; /* Delay after transfer scaler */
7375+};
7376+
7377+struct coldfire_spi_master {
7378+ u16 bus_num;
7379+ u16 num_chipselect;
7380+ u8 irq_source;
7381+ u32 irq_vector;
7382+ u32 irq_mask;
7383+ u8 irq_lp;
7384+ u8 par_val;
7385+ u16 par_val16;
7386+ u32 *irq_list;
7387+ void (*cs_control)(u8 cs, u8 command);
7388+};
7389+#endif /*MCFDSPI_H_*/
7390--- a/arch/m68k/include/asm/mcfsim.h
7391+++ b/arch/m68k/include/asm/mcfsim.h
7392@@ -5,6 +5,12 @@
7393  *
7394  * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
7395  * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
7396+ *
7397+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7398+ *
7399+ * This file is subject to the terms and conditions of the GNU General Public
7400+ * License. See the file COPYING in the main directory of this archive
7401+ * for more details.
7402  */
7403 
7404 /****************************************************************************/
7405@@ -45,5 +51,120 @@
7406 #include <asm/m54xxsim.h>
7407 #endif
7408 
7409+#if defined(CONFIG_COLDFIRE)
7410+#include <asm/coldfire.h>
7411+#endif
7412+
7413+#if defined(CONFIG_M5445X)
7414+#include <asm/mcf5445x_intc.h>
7415+#include <asm/mcf5445x_gpio.h>
7416+#include <asm/mcf5445x_ccm.h>
7417+#include <asm/mcf5445x_eport.h>
7418+#include <asm/mcf5445x_fbcs.h>
7419+#include <asm/mcf5445x_xbs.h>
7420+#include <asm/mcf5445x_dtim.h>
7421+#include <asm/mcf5445x_rtc.h>
7422+#include <asm/mcf5445x_scm.h>
7423+#elif defined(CONFIG_M547X_8X)
7424+#include <asm/m5485sim.h>
7425+#include <asm/m5485gpio.h>
7426+#include <asm/m5485gpt.h>
7427+#elif defined(CONFIG_M5441X)
7428+#include <asm/mcf5441x_intc.h>
7429+#include <asm/mcf5441x_gpio.h>
7430+#include <asm/mcf5441x_ccm.h>
7431+#include <asm/mcf5441x_eport.h>
7432+#include <asm/mcf5441x_fbcs.h>
7433+#include <asm/mcf5441x_xbs.h>
7434+#include <asm/mcf5441x_dtim.h>
7435+#include <asm/mcf5441x_rtc.h>
7436+#include <asm/mcf5441x_scm.h>
7437+#include <asm/mcf5441x_pm.h>
7438+#include <asm/mcf5441x_flexcan.h>
7439+#include <asm/mcf5441x_clock.h>
7440+#endif
7441+
7442+/*
7443+ * Define the base address of the SIM within the MBAR address space.
7444+ */
7445+#define MCFSIM_BASE 0x0 /* Base address of SIM */
7446+
7447+
7448+/*
7449+ * Bit definitions for the ICR family of registers.
7450+ */
7451+#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
7452+#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
7453+#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
7454+#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
7455+#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
7456+#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
7457+#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
7458+#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
7459+#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
7460+
7461+#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
7462+#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
7463+#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
7464+#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
7465+
7466+/*
7467+ * Bit definitions for the Interrupt Mask register (IMR).
7468+ */
7469+#define MCFSIM_IMR_EINT1 0x0002 /* External intr # 1 */
7470+#define MCFSIM_IMR_EINT2 0x0004 /* External intr # 2 */
7471+#define MCFSIM_IMR_EINT3 0x0008 /* External intr # 3 */
7472+#define MCFSIM_IMR_EINT4 0x0010 /* External intr # 4 */
7473+#define MCFSIM_IMR_EINT5 0x0020 /* External intr # 5 */
7474+#define MCFSIM_IMR_EINT6 0x0040 /* External intr # 6 */
7475+#define MCFSIM_IMR_EINT7 0x0080 /* External intr # 7 */
7476+
7477+#define MCFSIM_IMR_SWD 0x0100 /* Software Watchdog intr */
7478+#define MCFSIM_IMR_TIMER1 0x0200 /* TIMER 1 intr */
7479+#define MCFSIM_IMR_TIMER2 0x0400 /* TIMER 2 intr */
7480+#define MCFSIM_IMR_MBUS 0x0800 /* MBUS intr */
7481+#define MCFSIM_IMR_UART1 0x1000 /* UART 1 intr */
7482+#define MCFSIM_IMR_UART2 0x2000 /* UART 2 intr */
7483+
7484+#if defined(CONFIG_M5206e)
7485+#define MCFSIM_IMR_DMA1 0x4000 /* DMA 1 intr */
7486+#define MCFSIM_IMR_DMA2 0x8000 /* DMA 2 intr */
7487+#elif defined(CONFIG_M5249) || defined(CONFIG_M5307)
7488+#define MCFSIM_IMR_DMA0 0x4000 /* DMA 0 intr */
7489+#define MCFSIM_IMR_DMA1 0x8000 /* DMA 1 intr */
7490+#define MCFSIM_IMR_DMA2 0x10000 /* DMA 2 intr */
7491+#define MCFSIM_IMR_DMA3 0x20000 /* DMA 3 intr */
7492+#endif
7493+
7494+/*
7495+ * Mask for all of the SIM devices. Some parts have more or less
7496+ * SIM devices. This is a catchall for the sandard set.
7497+ */
7498+#ifndef MCFSIM_IMR_MASKALL
7499+#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
7500+#endif
7501+
7502+
7503+/*
7504+ * PIT interrupt settings, if not found in mXXXXsim.h file.
7505+ */
7506+#ifndef ICR_INTRCONF
7507+#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */
7508+#endif
7509+#ifndef MCFPIT_IMR
7510+#define MCFPIT_IMR MCFINTC_IMRH
7511+#endif
7512+#ifndef MCFPIT_IMR_IBIT
7513+#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32))
7514+#endif
7515+
7516+
7517+#ifndef __ASSEMBLY__
7518+/*
7519+ * Definition for the interrupt auto-vectoring support.
7520+ */
7521+extern void mcf_autovector(unsigned int vec);
7522+#endif /* __ASSEMBLY__ */
7523+
7524 /****************************************************************************/
7525 #endif /* mcfsim_h */
7526--- a/arch/m68k/include/asm/mcfuart.h
7527+++ b/arch/m68k/include/asm/mcfuart.h
7528@@ -5,6 +5,11 @@
7529  *
7530  * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
7531  * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
7532+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7533+ *
7534+ * This file is subject to the terms and conditions of the GNU General Public
7535+ * License. See the file COPYING in the main directory of this archive
7536+ * for more details.
7537  */
7538 
7539 /****************************************************************************/
7540@@ -12,6 +17,59 @@
7541 #define mcfuart_h
7542 /****************************************************************************/
7543 
7544+#if defined(CONFIG_M5445X)
7545+#include <asm/mcf5445x_intc.h>
7546+#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
7547+#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
7548+#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */
7549+#define MCFINT_VECBASE 64
7550+#define MCFINT_UART0 26
7551+#define MCFINT_UART1 27
7552+#elif defined(CONFIG_M547X_8X)
7553+#define MCFUART_BASE1 0x8600 /* Base address of UART1 */
7554+#define MCFUART_BASE2 0x8700 /* Base address of UART2 */
7555+#define MCFUART_BASE3 0x8800 /* Base address of UART3 */
7556+#define MCFUART_BASE4 0x8900 /* Base address of UART4 */
7557+#define MCFINT_VECBASE 64
7558+#define MCFINT_UART0 35
7559+#define MCFINT_UART1 34
7560+#define MCFINT_UART2 33
7561+#define MCFINT_UART3 32
7562+#elif defined(CONFIG_M5441X)
7563+#define MCFUART_BASE0 0xfc060000 /* Base address of UART1 */
7564+#define MCFUART_BASE1 0xfc064000 /* Base address of UART2 */
7565+#define MCFUART_BASE2 0xfc068000 /* Base address of UART3 */
7566+#define MCFUART_BASE3 0xfc06C000 /* Base address of UART4 */
7567+#define MCFUART_BASE4 0xec060000
7568+#define MCFUART_BASE5 0xec064000
7569+#define MCFUART_BASE6 0xec068000
7570+#define MCFUART_BASE7 0xec06C000
7571+#define MCFUART_BASE8 0xec070000
7572+#define MCFUART_BASE9 0xec074000
7573+
7574+#define MCFINT0_VECBASE 64
7575+#define MCFINT1_VECBASE (64 + 64)
7576+#define MCFINT_UART0 26
7577+#define MCFINT_UART1 27
7578+#define MCFINT_UART2 28
7579+#define MCFINT_UART3 29
7580+#define MCFINT_UART4 48
7581+#define MCFINT_UART5 49
7582+#define MCFINT_UART6 50
7583+#define MCFINT_UART7 51
7584+#define MCFINT_UART8 52
7585+#define MCFINT_UART9 53
7586+#endif
7587+
7588+#if defined(CONFIG_M5441X)
7589+#define MAX_PORT_NUM 10
7590+#elif defined(CONFIG_M547X_8X)
7591+#define MAX_PORT_NUM 4
7592+#else
7593+#define MAX_PORT_NUM 3
7594+#endif
7595+
7596+#ifndef __ASSEMBLY__
7597 #include <linux/serial_core.h>
7598 #include <linux/platform_device.h>
7599 
7600@@ -21,6 +79,7 @@ struct mcf_platform_uart {
7601     unsigned int irq; /* Interrupt vector */
7602     unsigned int uartclk; /* UART clock rate */
7603 };
7604+#endif
7605 
7606 /*
7607  * Define the ColdFire UART register set addresses.
7608@@ -94,6 +153,11 @@ struct mcf_platform_uart {
7609 #define MCFUART_USR_RXFULL 0x02 /* Receiver full */
7610 #define MCFUART_USR_RXREADY 0x01 /* Receiver ready */
7611 
7612+#if defined(CONFIG_M547X_8X)
7613+#define MCFUART_USR_TXREADY_BN 0x0a
7614+#define MCFUART_USR_TXEMPTY_BN 0x0b
7615+#endif
7616+
7617 #define MCFUART_USR_RXERR (MCFUART_USR_RXBREAK | MCFUART_USR_RXFRAMING | \
7618                 MCFUART_USR_RXPARITY | MCFUART_USR_RXOVERRUN)
7619 
7620--- a/arch/m68k/include/asm/mmu.h
7621+++ b/arch/m68k/include/asm/mmu.h
7622@@ -1,9 +1,22 @@
7623+/*
7624+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7625+ *
7626+ * This file is subject to the terms and conditions of the GNU General Public
7627+ * License. See the file COPYING in the main directory of this archive
7628+ * for more details.
7629+ */
7630 #ifndef __MMU_H
7631 #define __MMU_H
7632-
7633 #ifdef CONFIG_MMU
7634+#ifdef CONFIG_VDSO
7635+typedef struct {
7636+ unsigned long id;
7637+ void *vdso;
7638+} mm_context_t;
7639+#else
7640 /* Default "unsigned long" context */
7641 typedef unsigned long mm_context_t;
7642+#endif
7643 #else
7644 typedef struct {
7645     unsigned long end_brk;
7646--- a/arch/m68k/include/asm/mmu_context.h
7647+++ b/arch/m68k/include/asm/mmu_context.h
7648@@ -1,14 +1,21 @@
7649+/*
7650+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7651+ *
7652+ * This file is subject to the terms and conditions of the GNU General Public
7653+ * License. See the file COPYING in the main directory of this archive
7654+ * for more details.
7655+ */
7656 #ifndef __M68K_MMU_CONTEXT_H
7657 #define __M68K_MMU_CONTEXT_H
7658-
7659 #include <asm-generic/mm_hooks.h>
7660+#include <asm-generic/pgtable.h>
7661 
7662 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
7663 {
7664 }
7665 
7666 #ifdef CONFIG_MMU
7667-#ifndef CONFIG_SUN3
7668+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
7669 
7670 #include <asm/setup.h>
7671 #include <asm/page.h>
7672@@ -103,7 +110,7 @@ static inline void activate_mm(struct mm
7673         switch_mm_0460(next_mm);
7674 }
7675 
7676-#else /* CONFIG_SUN3 */
7677+#elif defined(CONFIG_SUN3)
7678 #include <asm/sun3mmu.h>
7679 #include <linux/sched.h>
7680 
7681@@ -151,7 +158,178 @@ static inline void activate_mm(struct mm
7682     activate_context(next_mm);
7683 }
7684 
7685+#else /* CONFIG_COLDFIRE */
7686+
7687+#include <asm/coldfire.h>
7688+#include <asm/atomic.h>
7689+#include <asm/bitops.h>
7690+#include <asm/mmu.h>
7691+
7692+#define NO_CONTEXT 256
7693+#define LAST_CONTEXT 255
7694+#define FIRST_CONTEXT 1
7695+
7696+#ifdef CONFIG_VDSO
7697+#define cpu_context(mm) ((mm)->context.id)
7698+#else
7699+#define cpu_context(mm) ((mm)->context)
7700+#endif
7701+
7702+#ifdef CONFIG_VDSO
7703+extern void set_context(unsigned long context, pgd_t *pgd);
7704+#else
7705+extern void set_context(mm_context_t context, pgd_t *pgd);
7706 #endif
7707+extern unsigned long context_map[];
7708+#ifdef CONFIG_VDSO
7709+extern unsigned long next_mmu_context;
7710+#else
7711+extern mm_context_t next_mmu_context;
7712+#endif
7713+
7714+extern atomic_t nr_free_contexts;
7715+extern struct mm_struct *context_mm[LAST_CONTEXT+1];
7716+extern void steal_context(void);
7717+
7718+static inline void get_mmu_context(struct mm_struct *mm)
7719+{
7720+#ifdef CONFIG_VDSO
7721+ unsigned long ctx;
7722+#else
7723+ mm_context_t ctx;
7724+#endif
7725+
7726+ if (cpu_context(mm) != NO_CONTEXT)
7727+ return;
7728+ while (atomic_dec_and_test_lt(&nr_free_contexts)) {
7729+ atomic_inc(&nr_free_contexts);
7730+ steal_context();
7731+ }
7732+ ctx = next_mmu_context;
7733+ while (test_and_set_bit(ctx, context_map)) {
7734+ ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
7735+ if (ctx > LAST_CONTEXT)
7736+ ctx = 0;
7737+ }
7738+ next_mmu_context = (ctx + 1) & LAST_CONTEXT;
7739+ cpu_context(mm) = ctx;
7740+ context_mm[ctx] = mm;
7741+}
7742+
7743+/*
7744+ * Set up the context for a new address space.
7745+ */
7746+#define init_new_context(tsk, mm) ((cpu_context(mm) = NO_CONTEXT), 0)
7747+/* #define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) */
7748+
7749+/*
7750+ * We're finished using the context for an address space.
7751+ */
7752+static inline void destroy_context(struct mm_struct *mm)
7753+{
7754+ if (cpu_context(mm) != NO_CONTEXT) {
7755+ clear_bit(cpu_context(mm), context_map);
7756+ cpu_context(mm) = NO_CONTEXT;
7757+ atomic_inc(&nr_free_contexts);
7758+ }
7759+}
7760+
7761+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
7762+ struct task_struct *tsk)
7763+{
7764+ get_mmu_context(tsk->mm);
7765+ set_context(cpu_context(tsk->mm), next->pgd);
7766+}
7767+
7768+/*
7769+ * After we have set current->mm to a new value, this activates
7770+ * the context for the new mm so we see the new mappings.
7771+ */
7772+static inline void activate_mm(struct mm_struct *active_mm,
7773+ struct mm_struct *mm)
7774+{
7775+ get_mmu_context(mm);
7776+ set_context(cpu_context(mm), mm->pgd);
7777+}
7778+
7779+#define deactivate_mm(tsk, mm) do { } while (0)
7780+
7781+extern void mmu_context_init(void);
7782+#if defined(CONFIG_M547X_8X)
7783+#define prepare_arch_switch(next) load_ksp_mmu(next)
7784+
7785+static inline void load_ksp_mmu(struct task_struct *task)
7786+{
7787+ unsigned long flags;
7788+ struct mm_struct *mm;
7789+ int asid;
7790+ pgd_t *pgd;
7791+ pmd_t *pmd;
7792+ pte_t *pte;
7793+ unsigned long mmuar;
7794+
7795+ local_irq_save(flags);
7796+ mmuar = task->thread.ksp;
7797+
7798+ /* Search for a valid TLB entry, if one is found, don't remap */
7799+ *MMUAR = mmuar;
7800+ *MMUOR = MMUOR_STLB | MMUOR_ADR;
7801+ if ((*MMUSR) & MMUSR_HIT)
7802+ goto end;
7803+
7804+ if (mmuar >= PAGE_OFFSET) {
7805+ mm = &init_mm;
7806+ } else {
7807+ printk(KERN_INFO "load_ksp_mmu: non-kernel"
7808+ " mm found: 0x%08x\n",
7809+ (unsigned int) task->mm);
7810+ mm = task->mm;
7811+ }
7812+
7813+ if (!mm)
7814+ goto bug;
7815+
7816+ pgd = pgd_offset(mm, mmuar);
7817+ if (pgd_none(*pgd))
7818+ goto bug;
7819+
7820+ pmd = pmd_offset(pgd, mmuar);
7821+ if (pmd_none(*pmd))
7822+ goto bug;
7823+
7824+ pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
7825+ : pte_offset_map(pmd, mmuar);
7826+ if (pte_none(*pte) || !pte_present(*pte))
7827+ goto bug;
7828+
7829+ set_pte(pte, pte_mkyoung(*pte));
7830+ asid = cpu_context(mm) & 0xff;
7831+ if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
7832+ set_pte(pte, pte_wrprotect(*pte));
7833+
7834+ *MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
7835+ | (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
7836+ >> CF_PAGE_MMUTR_SHIFT)
7837+ | MMUTR_V;
7838+
7839+ *MMUDR = (pte_val(*pte) & PAGE_MASK)
7840+ | ((pte->pte) & CF_PAGE_MMUDR_MASK)
7841+ | MMUDR_SZ8K | MMUDR_X;
7842+
7843+ *MMUOR = MMUOR_ACC | MMUOR_UAA;
7844+ asm ("nop");
7845+
7846+ goto end;
7847+
7848+bug:
7849+ printk(KERN_ERR "ksp load failed: mm=0x%08x ksp=0x%08x\n",
7850+ (unsigned int) mm, (unsigned int) mmuar);
7851+end:
7852+ local_irq_restore(flags);
7853+}
7854+#endif /* CONFIG_M547X_8X */
7855+#endif /* CONFIG_COLDFIRE */
7856+
7857 #else /* !CONFIG_MMU */
7858 
7859 static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
7860--- a/arch/m68k/include/asm/page.h
7861+++ b/arch/m68k/include/asm/page.h
7862@@ -1,12 +1,18 @@
7863+/*
7864+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7865+ *
7866+ * This file is subject to the terms and conditions of the GNU General Public
7867+ * License. See the file COPYING in the main directory of this archive
7868+ * for more details.
7869+ */
7870 #ifndef _M68K_PAGE_H
7871 #define _M68K_PAGE_H
7872-
7873 #include <linux/const.h>
7874 #include <asm/setup.h>
7875 #include <asm/page_offset.h>
7876 
7877 /* PAGE_SHIFT determines the page size */
7878-#ifndef CONFIG_SUN3
7879+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
7880 #define PAGE_SHIFT (12)
7881 #else
7882 #define PAGE_SHIFT (13)
7883--- a/arch/m68k/include/asm/page_mm.h
7884+++ b/arch/m68k/include/asm/page_mm.h
7885@@ -1,5 +1,17 @@
7886+/*
7887+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7888+ *
7889+ * This file is subject to the terms and conditions of the GNU General Public
7890+ * License. See the file COPYING in the main directory of this archive
7891+ * for more details.
7892+ */
7893 #ifndef _M68K_PAGE_MM_H
7894 #define _M68K_PAGE_MM_H
7895+#if PAGE_SHIFT < 13
7896+#define THREAD_SIZE (8192)
7897+#else
7898+#define THREAD_SIZE PAGE_SIZE
7899+#endif
7900 
7901 #ifndef __ASSEMBLY__
7902 
7903@@ -70,6 +82,49 @@ extern unsigned long m68k_memoffset;
7904 
7905 #define WANT_PAGE_VIRTUAL
7906 
7907+#if defined(CONFIG_COLDFIRE)
7908+extern unsigned long cf_dma_base;
7909+extern unsigned long cf_dma_end;
7910+
7911+static inline unsigned long ___pa(void *vaddr)
7912+{
7913+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
7914+ return ((unsigned long)vaddr & 0x0fffffff) + CONFIG_SDRAM_BASE;
7915+#else
7916+ if ((unsigned long)vaddr >= CONFIG_DMA_BASE &&
7917+ (unsigned long)vaddr < (CONFIG_DMA_BASE + CONFIG_DMA_SIZE)) {
7918+ /* address is in carved out DMA range */
7919+ return ((unsigned long)vaddr - CONFIG_DMA_BASE)
7920+ + CONFIG_SDRAM_BASE;
7921+ } else if ((unsigned long)vaddr >= PAGE_OFFSET &&
7922+ (unsigned long)vaddr < (PAGE_OFFSET + CONFIG_SDRAM_SIZE)) {
7923+ /* normal mapping */
7924+ return ((unsigned long)vaddr - PAGE_OFFSET) + CONFIG_SDRAM_BASE;
7925+ }
7926+
7927+ return (unsigned long)vaddr;
7928+#endif
7929+}
7930+#define __pa(vaddr) ___pa((void *)(vaddr))
7931+
7932+static inline void *__va(unsigned long paddr)
7933+{
7934+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
7935+ return (void *)((paddr & 0x0fffffff) + PAGE_OFFSET);
7936+#else
7937+ if (paddr >= cf_dma_base && paddr <= cf_dma_end) {
7938+ /* mapped address for DMA */
7939+ return (void *)((paddr - CONFIG_SDRAM_BASE) + CONFIG_DMA_BASE);
7940+ } else if (paddr >= cf_dma_end &&
7941+ paddr < (CONFIG_SDRAM_BASE + CONFIG_SDRAM_SIZE)) {
7942+ /* normal mapping */
7943+ return (void *)((paddr - CONFIG_SDRAM_BASE) + PAGE_OFFSET);
7944+ }
7945+ return (void *)paddr;
7946+#endif
7947+}
7948+
7949+#else
7950 static inline unsigned long ___pa(void *vaddr)
7951 {
7952     unsigned long paddr;
7953@@ -91,6 +146,7 @@ static inline void *__va(unsigned long p
7954         : "0" (paddr), "i" (m68k_fixup_memoffset));
7955     return vaddr;
7956 }
7957+#endif
7958 
7959 #else /* !CONFIG_SUN3 */
7960 /* This #define is a horrible hack to suppress lots of warnings. --m */
7961@@ -176,4 +232,9 @@ static inline __attribute_const__ int __
7962 #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
7963                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
7964 
7965+#ifdef CONFIG_VDSO
7966+/* vDSO support */
7967+#define __HAVE_ARCH_GATE_AREA
7968+#endif
7969+
7970 #endif /* _M68K_PAGE_MM_H */
7971--- a/arch/m68k/include/asm/page_offset.h
7972+++ b/arch/m68k/include/asm/page_offset.h
7973@@ -1,10 +1,21 @@
7974-/* This handles the memory map.. */
7975-
7976+/*
7977+ * Page and physical memory maps.
7978+ *
7979+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
7980+ *
7981+ * This file is subject to the terms and conditions of the GNU General Public
7982+ * License. See the file COPYING in the main directory of this archive
7983+ * for more details.
7984+ */
7985 #ifdef CONFIG_MMU
7986-#ifndef CONFIG_SUN3
7987-#define PAGE_OFFSET_RAW 0x00000000
7988-#else
7989+#if defined(CONFIG_SUN3)
7990 #define PAGE_OFFSET_RAW 0x0E000000
7991+#elif defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X) \
7992+ || defined(CONFIG_M5441X)
7993+#define PHYS_OFFSET CONFIG_SDRAM_BASE
7994+#define PAGE_OFFSET_RAW (PHYS_OFFSET)
7995+#else
7996+#define PAGE_OFFSET_RAW 0x00000000
7997 #endif
7998 #else
7999 #define PAGE_OFFSET_RAW CONFIG_RAMBASE
8000--- a/arch/m68k/include/asm/pgalloc.h
8001+++ b/arch/m68k/include/asm/pgalloc.h
8002@@ -1,14 +1,22 @@
8003+/*
8004+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8005+ *
8006+ * This file is subject to the terms and conditions of the GNU General Public
8007+ * License. See the file COPYING in the main directory of this archive
8008+ * for more details.
8009+ */
8010 #ifndef M68K_PGALLOC_H
8011 #define M68K_PGALLOC_H
8012-
8013 #include <linux/mm.h>
8014 #include <linux/highmem.h>
8015 #include <asm/setup.h>
8016 
8017 #ifdef CONFIG_MMU
8018 #include <asm/virtconvert.h>
8019-#ifdef CONFIG_SUN3
8020+#if defined(CONFIG_SUN3)
8021 #include <asm/sun3_pgalloc.h>
8022+#elif defined(CONFIG_COLDFIRE)
8023+#include <asm/cf_pgalloc.h>
8024 #else
8025 #include <asm/motorola_pgalloc.h>
8026 #endif
8027--- a/arch/m68k/include/asm/pgtable_mm.h
8028+++ b/arch/m68k/include/asm/pgtable_mm.h
8029@@ -1,6 +1,12 @@
8030+/*
8031+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8032+ *
8033+ * This file is subject to the terms and conditions of the GNU General Public
8034+ * License. See the file COPYING in the main directory of this archive
8035+ * for more details.
8036+ */
8037 #ifndef _M68K_PGTABLE_H
8038 #define _M68K_PGTABLE_H
8039-
8040 #include <asm-generic/4level-fixup.h>
8041 
8042 #include <asm/setup.h>
8043@@ -40,6 +46,8 @@
8044 /* PGDIR_SHIFT determines what a third-level page table entry can map */
8045 #ifdef CONFIG_SUN3
8046 #define PGDIR_SHIFT 17
8047+#elif defined(CONFIG_COLDFIRE)
8048+#define PGDIR_SHIFT 22
8049 #else
8050 #define PGDIR_SHIFT 25
8051 #endif
8052@@ -54,6 +62,10 @@
8053 #define PTRS_PER_PTE 16
8054 #define PTRS_PER_PMD 1
8055 #define PTRS_PER_PGD 2048
8056+#elif defined(CONFIG_COLDFIRE)
8057+#define PTRS_PER_PTE 512
8058+#define PTRS_PER_PMD 1
8059+#define PTRS_PER_PGD 1024
8060 #else
8061 #define PTRS_PER_PTE 1024
8062 #define PTRS_PER_PMD 8
8063@@ -66,6 +78,18 @@
8064 #ifdef CONFIG_SUN3
8065 #define KMAP_START 0x0DC00000
8066 #define KMAP_END 0x0E000000
8067+#elif defined(CONFIG_COLDFIRE)
8068+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
8069+#define VMALLOC_START 0xc0000000
8070+#define VMALLOC_END 0xcfffffff
8071+#define KMAP_START (VMALLOC_END + 1)
8072+#define KMAP_END (0xe8000000 - 1)
8073+#elif defined(CONFIG_M5441X)
8074+#define VMALLOC_START 0xc0000000
8075+#define VMALLOC_END 0xcfffffff
8076+#define KMAP_START (VMALLOC_END + 1)
8077+#define KMAP_END (0xd8000000 - 1)
8078+#endif
8079 #else
8080 #define KMAP_START 0xd0000000
8081 #define KMAP_END 0xf0000000
8082@@ -79,9 +103,11 @@
8083  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
8084  * area for the same reason. ;)
8085  */
8086+#if !defined(CONFIG_COLDFIRE)
8087 #define VMALLOC_OFFSET (8*1024*1024)
8088 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
8089 #define VMALLOC_END KMAP_START
8090+#endif
8091 #else
8092 extern unsigned long m68k_vmalloc_end;
8093 #define VMALLOC_START 0x0f800000
8094@@ -130,6 +156,8 @@ static inline void update_mmu_cache(stru
8095 
8096 #ifdef CONFIG_SUN3
8097 #include <asm/sun3_pgtable.h>
8098+#elif defined(CONFIG_COLDFIRE)
8099+#include <asm/cf_pgtable.h>
8100 #else
8101 #include <asm/motorola_pgtable.h>
8102 #endif
8103@@ -143,6 +171,10 @@ static inline void update_mmu_cache(stru
8104 #else
8105 # define __SUN3_PAGE_NOCACHE 0
8106 #endif
8107+
8108+#ifdef CONFIG_COLDFIRE
8109+# define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | CF_PAGE_NOCACHE))
8110+#else /* CONFIG_COLDFIRE */
8111 #define pgprot_noncached(prot) \
8112     (MMU_IS_SUN3 \
8113      ? (__pgprot(pgprot_val(prot) | __SUN3_PAGE_NOCACHE)) \
8114@@ -151,7 +183,7 @@ static inline void update_mmu_cache(stru
8115         : (MMU_IS_040 || MMU_IS_060) \
8116         ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \
8117         : (prot)))
8118-
8119+#endif /* CONFIG_COLDFIRE */
8120 #include <asm-generic/pgtable.h>
8121 #endif /* !__ASSEMBLY__ */
8122 
8123--- a/arch/m68k/include/asm/processor.h
8124+++ b/arch/m68k/include/asm/processor.h
8125@@ -2,6 +2,11 @@
8126  * include/asm-m68k/processor.h
8127  *
8128  * Copyright (C) 1995 Hamish Macdonald
8129+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8130+ *
8131+ * This file is subject to the terms and conditions of the GNU General Public
8132+ * License. See the file COPYING in the main directory of this archive
8133+ * for more details.
8134  */
8135 
8136 #ifndef __ASM_M68K_PROCESSOR_H
8137@@ -23,6 +28,10 @@ static inline unsigned long rdusp(void)
8138 #ifdef CONFIG_COLDFIRE_SW_A7
8139     extern unsigned int sw_usp;
8140     return sw_usp;
8141+#elif defined(CONFIG_COLDFIRE)
8142+ unsigned long usp;
8143+ __asm__ __volatile__("movel %/usp,%0" : "=a" (usp));
8144+ return usp;
8145 #else
8146     register unsigned long usp __asm__("a0");
8147     /* move %usp,%a0 */
8148@@ -36,6 +45,8 @@ static inline void wrusp(unsigned long u
8149 #ifdef CONFIG_COLDFIRE_SW_A7
8150     extern unsigned int sw_usp;
8151     sw_usp = usp;
8152+#elif defined(CONFIG_COLDFIRE)
8153+ __asm__ __volatile__("movel %0,%/usp" : : "a" (usp));
8154 #else
8155     register unsigned long a0 __asm__("a0") = usp;
8156     /* move %a0,%usp */
8157@@ -48,11 +59,17 @@ static inline void wrusp(unsigned long u
8158  * so don't change it unless you know what you are doing.
8159  */
8160 #ifdef CONFIG_MMU
8161-#ifndef CONFIG_SUN3
8162+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
8163 #define TASK_SIZE (0xF0000000UL)
8164+#elif defined(CONFIG_COLDFIRE)
8165+#define TASK_SIZE (0xC0000000UL)
8166+#else /* CONFIG_SUN3 */
8167+#ifdef __ASSEMBLY__
8168+#define TASK_SIZE (0x0E000000)
8169 #else
8170 #define TASK_SIZE (0x0E000000UL)
8171 #endif
8172+#endif
8173 #else
8174 #define TASK_SIZE (0xFFFFFFFFUL)
8175 #endif
8176@@ -66,8 +83,10 @@ static inline void wrusp(unsigned long u
8177  * space during mmap's.
8178  */
8179 #ifdef CONFIG_MMU
8180-#ifndef CONFIG_SUN3
8181+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
8182 #define TASK_UNMAPPED_BASE 0xC0000000UL
8183+#elif defined(CONFIG_COLDFIRE)
8184+#define TASK_UNMAPPED_BASE 0x60000000UL
8185 #else
8186 #define TASK_UNMAPPED_BASE 0x0A000000UL
8187 #endif
8188@@ -80,7 +99,11 @@ struct thread_struct {
8189     unsigned long ksp; /* kernel stack pointer */
8190     unsigned long usp; /* user stack pointer */
8191     unsigned short sr; /* saved status register */
8192+#ifndef CONFIG_COLDFIRE
8193     unsigned short fs; /* saved fs (sfc, dfc) */
8194+#else
8195+ mm_segment_t fs;
8196+#endif
8197     unsigned long crp[2]; /* cpu root pointer */
8198     unsigned long esp0; /* points to SR of stack frame */
8199     unsigned long faddr; /* info about last fault */
8200@@ -102,6 +125,7 @@ struct thread_struct {
8201 /*
8202  * Do necessary setup to start up a newly executed thread.
8203  */
8204+#ifndef CONFIG_COLDFIRE
8205 static inline void start_thread(struct pt_regs * regs, unsigned long pc,
8206                 unsigned long usp)
8207 {
8208@@ -112,7 +136,24 @@ static inline void start_thread(struct p
8209     regs->sr &= ~0x2000;
8210     wrusp(usp);
8211 }
8212+#else
8213+/*
8214+ * Do necessary setup to start up a newly executed thread.
8215+ *
8216+ * pass the data segment into user programs if it exists,
8217+ * it can't hurt anything as far as I can tell
8218+ */
8219+#define start_thread(_regs, _pc, _usp) \
8220+do { \
8221+ set_fs(USER_DS); /* reads from user space */ \
8222+ (_regs)->pc = (_pc); \
8223+ if (current->mm) \
8224+ (_regs)->d5 = current->mm->start_data; \
8225+ (_regs)->sr &= ~0x2000; \
8226+ wrusp(_usp); \
8227+} while (0)
8228 
8229+#endif
8230 #else
8231 
8232 /*
8233--- a/arch/m68k/include/asm/ptrace.h
8234+++ b/arch/m68k/include/asm/ptrace.h
8235@@ -1,3 +1,10 @@
8236+/*
8237+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8238+ *
8239+ * This file is subject to the terms and conditions of the GNU General Public
8240+ * License. See the file COPYING in the main directory of this archive
8241+ * for more details.
8242+ */
8243 #ifndef _M68K_PTRACE_H
8244 #define _M68K_PTRACE_H
8245 
8246@@ -27,27 +34,38 @@
8247    stack during a system call. */
8248 
8249 struct pt_regs {
8250- long d1;
8251- long d2;
8252- long d3;
8253- long d4;
8254- long d5;
8255- long a0;
8256- long a1;
8257- long a2;
8258- long d0;
8259- long orig_d0;
8260- long stkadj;
8261+ long d1;
8262+ long d2;
8263+ long d3;
8264+ long d4;
8265+ long d5;
8266+ long a0;
8267+ long a1;
8268+ long a2;
8269+ long d0;
8270+ long orig_d0;
8271+ long stkadj;
8272 #ifdef CONFIG_COLDFIRE
8273+#if 0
8274   unsigned format : 4; /* frame format specifier */
8275   unsigned vector : 12; /* vector offset */
8276   unsigned short sr;
8277   unsigned long pc;
8278+#endif
8279+/*FROM BSP*/
8280+ unsigned long mmuar;
8281+ unsigned long mmusr;
8282+ unsigned format:4; /* frame format specifier */
8283+ unsigned fs2:2;
8284+ unsigned vector:8;
8285+ unsigned fs1:2;
8286+ unsigned short sr;
8287+ unsigned long pc;
8288 #else
8289- unsigned short sr;
8290- unsigned long pc;
8291- unsigned format : 4; /* frame format specifier */
8292- unsigned vector : 12; /* vector offset */
8293+ unsigned short sr;
8294+ unsigned long pc;
8295+ unsigned format:4; /* frame format specifier */
8296+ unsigned vector:12; /* vector offset */
8297 #endif
8298 };
8299 
8300--- a/arch/m68k/include/asm/raw_io.h
8301+++ b/arch/m68k/include/asm/raw_io.h
8302@@ -3,11 +3,19 @@
8303  *
8304  * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
8305  *
8306+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8307+ *
8308+ * This file is subject to the terms and conditions of the GNU General Public
8309+ * License. See the file COPYING in the main directory of this archive
8310+ * for more details.
8311  */
8312-
8313 #ifndef _RAW_IO_H
8314 #define _RAW_IO_H
8315 
8316+#ifdef CONFIG_COLDFIRE
8317+#include <asm/cf_raw_io.h>
8318+#else
8319+
8320 #ifdef __KERNEL__
8321 
8322 #include <asm/types.h>
8323@@ -60,6 +68,9 @@ extern void __iounmap(void *addr, unsign
8324 #define __raw_writew(val,addr) out_be16((addr),(val))
8325 #define __raw_writel(val,addr) out_be32((addr),(val))
8326 
8327+#define swap_inw(port) in_le16((port))
8328+#define swap_outw(val, port) out_le16((port), (val))
8329+
8330 static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
8331 {
8332     unsigned int i;
8333@@ -344,4 +355,6 @@ static inline void raw_outsw_swapw(volat
8334 
8335 #endif /* __KERNEL__ */
8336 
8337+#endif /* CONFIG_COLDFIRE */
8338+
8339 #endif /* _RAW_IO_H */
8340--- a/arch/m68k/include/asm/segment.h
8341+++ b/arch/m68k/include/asm/segment.h
8342@@ -1,3 +1,10 @@
8343+/*
8344+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8345+ *
8346+ * This file is subject to the terms and conditions of the GNU General Public
8347+ * License. See the file COPYING in the main directory of this archive
8348+ * for more details.
8349+ */
8350 #ifndef _M68K_SEGMENT_H
8351 #define _M68K_SEGMENT_H
8352 
8353@@ -29,6 +36,7 @@ typedef struct {
8354  * Get/set the SFC/DFC registers for MOVES instructions
8355  */
8356 
8357+#ifndef CONFIG_COLDFIRE
8358 static inline mm_segment_t get_fs(void)
8359 {
8360 #ifdef CONFIG_MMU
8361@@ -56,6 +64,15 @@ static inline void set_fs(mm_segment_t v
8362 #endif
8363 }
8364 
8365+#else /* CONFIG_COLDFIRE */
8366+
8367+#include <asm/current.h>
8368+#define get_fs() (current->thread.fs)
8369+#define set_fs(val) (current->thread.fs = (val))
8370+#define get_ds() (KERNEL_DS)
8371+
8372+#endif /* CONFIG_COLDFIRE */
8373+
8374 #define segment_eq(a,b) ((a).seg == (b).seg)
8375 
8376 #endif /* __ASSEMBLY__ */
8377--- a/arch/m68k/include/asm/setup.h
8378+++ b/arch/m68k/include/asm/setup.h
8379@@ -2,6 +2,7 @@
8380 ** asm/setup.h -- Definition of the Linux/m68k setup information
8381 **
8382 ** Copyright 1992 by Greg Harp
8383+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8384 **
8385 ** This file is subject to the terms and conditions of the GNU General Public
8386 ** License. See the file COPYING in the main directory of this archive
8387@@ -40,6 +41,7 @@
8388 #define MACH_HP300 9
8389 #define MACH_Q40 10
8390 #define MACH_SUN3X 11
8391+#define MACH_CFMMU 12
8392 
8393 #define COMMAND_LINE_SIZE 256
8394 
8395@@ -189,6 +191,14 @@ extern unsigned long m68k_machtype;
8396 # define MACH_TYPE (MACH_SUN3X)
8397 #endif
8398 
8399+#if !defined(CONFIG_COLDFIRE)
8400+# define MACH_IS_COLDFIRE (0)
8401+#else
8402+# define CONFIG_COLDFIRE_ONLY
8403+# define MACH_IS_COLDFIRE (1)
8404+# define MACH_TYPE (MACH_CFMMU)
8405+#endif
8406+
8407 #ifndef MACH_TYPE
8408 # define MACH_TYPE (m68k_machtype)
8409 #endif
8410@@ -211,23 +221,31 @@ extern unsigned long m68k_machtype;
8411 #define CPUB_68030 1
8412 #define CPUB_68040 2
8413 #define CPUB_68060 3
8414+#define CPUB_CFV4E 4
8415 
8416 #define CPU_68020 (1<<CPUB_68020)
8417 #define CPU_68030 (1<<CPUB_68030)
8418 #define CPU_68040 (1<<CPUB_68040)
8419 #define CPU_68060 (1<<CPUB_68060)
8420+#define CPU_CFV4E (1<<CPUB_CFV4E)
8421 
8422 #define FPUB_68881 0
8423 #define FPUB_68882 1
8424 #define FPUB_68040 2 /* Internal FPU */
8425 #define FPUB_68060 3 /* Internal FPU */
8426 #define FPUB_SUNFPA 4 /* Sun-3 FPA */
8427+#define FPUB_CFV4E 5
8428 
8429 #define FPU_68881 (1<<FPUB_68881)
8430 #define FPU_68882 (1<<FPUB_68882)
8431 #define FPU_68040 (1<<FPUB_68040)
8432 #define FPU_68060 (1<<FPUB_68060)
8433 #define FPU_SUNFPA (1<<FPUB_SUNFPA)
8434+#ifdef CONFIG_M547X_8X
8435+#define FPU_CFV4E (1<<FPUB_CFV4E)
8436+#else
8437+#define FPU_CFV4E 0
8438+#endif
8439 
8440 #define MMUB_68851 0
8441 #define MMUB_68030 1 /* Internal MMU */
8442@@ -235,6 +253,7 @@ extern unsigned long m68k_machtype;
8443 #define MMUB_68060 3 /* Internal MMU */
8444 #define MMUB_APOLLO 4 /* Custom Apollo */
8445 #define MMUB_SUN3 5 /* Custom Sun-3 */
8446+#define MMUB_CFV4E 6
8447 
8448 #define MMU_68851 (1<<MMUB_68851)
8449 #define MMU_68030 (1<<MMUB_68030)
8450@@ -242,6 +261,7 @@ extern unsigned long m68k_machtype;
8451 #define MMU_68060 (1<<MMUB_68060)
8452 #define MMU_SUN3 (1<<MMUB_SUN3)
8453 #define MMU_APOLLO (1<<MMUB_APOLLO)
8454+#define MMU_CFV4E (1<<MMUB_CFV4E)
8455 
8456 #ifdef __KERNEL__
8457 
8458@@ -341,6 +361,14 @@ extern int m68k_is040or060;
8459 # endif
8460 #endif
8461 
8462+#if !defined(CONFIG_CFV4E)
8463+# define CPU_IS_COLDFIRE (0)
8464+#else
8465+# define CPU_IS_COLDFIRE (m68k_cputype & CPU_CFV4E)
8466+# define CPU_IS_CFV4E (m68k_cputype & CPU_CFV4E)
8467+# define MMU_IS_CFV4E (m68k_mmutype & MMU_CFV4E)
8468+#endif
8469+
8470 #define CPU_TYPE (m68k_cputype)
8471 
8472 #ifdef CONFIG_M68KFPU_EMU
8473@@ -371,6 +399,14 @@ extern int m68k_realnum_memory; /* real
8474 extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
8475 #endif
8476 
8477+#ifdef CONFIG_CFV4E
8478+#define QCHIP_RESTORE_DIRECTIVE ".chip 547x"
8479+#define CHIP_RESTORE_DIRECTIVE .chip 547x
8480+#else
8481+#define QCHIP_RESTORE_DIRECTIVE ".chip 68k"
8482+#define CHIP_RESTORE_DIRECTIVE .chip 68k
8483+#endif
8484+
8485 #endif /* __KERNEL__ */
8486 
8487 #endif /* _M68K_SETUP_H */
8488--- a/arch/m68k/include/asm/signal.h
8489+++ b/arch/m68k/include/asm/signal.h
8490@@ -1,6 +1,12 @@
8491+/*
8492+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8493+ *
8494+ * This file is subject to the terms and conditions of the GNU General Public
8495+ * License. See the file COPYING in the main directory of this archive
8496+ * for more details.
8497+ */
8498 #ifndef _M68K_SIGNAL_H
8499 #define _M68K_SIGNAL_H
8500-
8501 #include <linux/types.h>
8502 
8503 /* Avoid too many header ordering problems. */
8504@@ -150,7 +156,7 @@ typedef struct sigaltstack {
8505 #ifdef __KERNEL__
8506 #include <asm/sigcontext.h>
8507 
8508-#ifndef __uClinux__
8509+#ifndef CONFIG_COLDFIRE /*FIXME Jason*/
8510 #define __HAVE_ARCH_SIG_BITOPS
8511 
8512 static inline void sigaddset(sigset_t *set, int _sig)
8513--- a/arch/m68k/include/asm/string.h
8514+++ b/arch/m68k/include/asm/string.h
8515@@ -1,6 +1,12 @@
8516+/*
8517+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8518+ *
8519+ * This file is subject to the terms and conditions of the GNU General Public
8520+ * License. See the file COPYING in the main directory of this archive
8521+ * for more details.
8522+ */
8523 #ifndef _M68K_STRING_H_
8524 #define _M68K_STRING_H_
8525-
8526 #include <linux/types.h>
8527 #include <linux/compiler.h>
8528 
8529@@ -81,6 +87,18 @@ static inline char *strncpy(char *dest,
8530     strcpy(__d + strlen(__d), (s)); \
8531 })
8532 
8533+#define __HAVE_ARCH_STRCHR
8534+static inline char *strchr(const char *s, int c)
8535+{
8536+ char sc, ch = c;
8537+
8538+ for (; (sc = *s++) != ch; ) {
8539+ if (!sc)
8540+ return NULL;
8541+ }
8542+ return (char *)s - 1;
8543+}
8544+
8545 #ifndef CONFIG_COLDFIRE
8546 #define __HAVE_ARCH_STRCMP
8547 static inline int strcmp(const char *cs, const char *ct)
8548--- a/arch/m68k/include/asm/swab.h
8549+++ b/arch/m68k/include/asm/swab.h
8550@@ -1,11 +1,18 @@
8551+/*
8552+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8553+ *
8554+ * This file is subject to the terms and conditions of the GNU General Public
8555+ * License. See the file COPYING in the main directory of this archive
8556+ * for more details.
8557+ */
8558 #ifndef _M68K_SWAB_H
8559 #define _M68K_SWAB_H
8560-
8561 #include <linux/types.h>
8562 #include <linux/compiler.h>
8563 
8564 #define __SWAB_64_THRU_32__
8565 
8566+#if defined(__GNUC__)
8567 #if defined (__mcfisaaplus__) || defined (__mcfisac__)
8568 static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
8569 {
8570@@ -23,5 +30,11 @@ static inline __attribute_const__ __u32
8571 }
8572 #define __arch_swab32 __arch_swab32
8573 #endif
8574+#endif
8575+
8576+#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
8577+# define __BYTEORDER_HAS_U64__
8578+# define __SWAB_64_THRU_32__
8579+#endif
8580 
8581 #endif /* _M68K_SWAB_H */
8582--- a/arch/m68k/include/asm/system_mm.h
8583+++ b/arch/m68k/include/asm/system_mm.h
8584@@ -1,14 +1,35 @@
8585+/*
8586+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8587+ *
8588+ * This file is subject to the terms and conditions of the GNU General Public
8589+ * License. See the file COPYING in the main directory of this archive
8590+ * for more details.
8591+ */
8592 #ifndef _M68K_SYSTEM_H
8593 #define _M68K_SYSTEM_H
8594-
8595 #include <linux/linkage.h>
8596 #include <linux/kernel.h>
8597 #include <linux/irqflags.h>
8598 #include <asm/segment.h>
8599 #include <asm/entry.h>
8600+#include <asm/cfcache.h>
8601 
8602 #ifdef __KERNEL__
8603 
8604+#ifdef CONFIG_COLDFIRE
8605+#define FLUSH_BC (0x00040000)
8606+
8607+#define finish_arch_switch(prev) do { \
8608+ unsigned long tmpreg; \
8609+ asm volatile ("move.l %2,%0\n" \
8610+ "orl %1,%0\n" \
8611+ "movec %0,%%cacr" \
8612+ : "=&d" (tmpreg) \
8613+ : "id" (FLUSH_BC), "m" (shadow_cacr)); \
8614+ } while (0)
8615+
8616+#endif
8617+
8618 /*
8619  * switch_to(n) should switch tasks to task ptr, first checking that
8620  * ptr isn't the current task, in which case it does nothing. This
8621--- a/arch/m68k/include/asm/tlbflush.h
8622+++ b/arch/m68k/include/asm/tlbflush.h
8623@@ -1,8 +1,14 @@
8624+/*
8625+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8626+ *
8627+ * This file is subject to the terms and conditions of the GNU General Public
8628+ * License. See the file COPYING in the main directory of this archive
8629+ * for more details.
8630+ */
8631 #ifndef _M68K_TLBFLUSH_H
8632 #define _M68K_TLBFLUSH_H
8633-
8634 #ifdef CONFIG_MMU
8635-#ifndef CONFIG_SUN3
8636+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
8637 
8638 #include <asm/current.h>
8639 
8640@@ -92,7 +98,12 @@ static inline void flush_tlb_kernel_rang
8641     flush_tlb_all();
8642 }
8643 
8644-#else
8645+static inline void flush_tlb_pgtables(struct mm_struct *mm,
8646+ unsigned long start, unsigned long end)
8647+{
8648+}
8649+
8650+#elif defined(CONFIG_SUN3)
8651 
8652 
8653 /* Reserved PMEGs. */
8654@@ -214,6 +225,13 @@ static inline void flush_tlb_kernel_page
8655     sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG);
8656 }
8657 
8658+static inline void flush_tlb_pgtables(struct mm_struct *mm,
8659+ unsigned long start, unsigned long end)
8660+{
8661+}
8662+
8663+#else /* CONFIG_COLDFIRE */
8664+#include <asm/cf_tlbflush.h>
8665 #endif
8666 
8667 #else /* !CONFIG_MMU */
8668--- a/arch/m68k/include/asm/uaccess_mm.h
8669+++ b/arch/m68k/include/asm/uaccess_mm.h
8670@@ -1,6 +1,15 @@
8671+/*
8672+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8673+ *
8674+ * This file is subject to the terms and conditions of the GNU General Public
8675+ * License. See the file COPYING in the main directory of this archive
8676+ * for more details.
8677+ */
8678 #ifndef __M68K_UACCESS_H
8679 #define __M68K_UACCESS_H
8680-
8681+#ifdef CONFIG_COLDFIRE
8682+#include <asm/cf_uaccess.h>
8683+#else
8684 /*
8685  * User space memory access functions
8686  */
8687@@ -219,6 +228,41 @@ unsigned long __generic_copy_to_user(voi
8688         : "+d" (res), "+&a" (to), "+a" (from), "=&d" (tmp) \
8689         : : "memory")
8690 
8691+#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \
8692+ asm volatile ("\n" \
8693+ " move."#s1" (%2)+,%3\n" \
8694+ "11: moves."#s1" %3,(%1)+\n" \
8695+ "12: move."#s2" (%2)+,%3\n" \
8696+ "21: moves."#s2" %3,(%1)+\n" \
8697+ "22:\n" \
8698+ " .ifnc \""#s3"\",\"\"\n" \
8699+ " move."#s3" (%2)+,%3\n" \
8700+ "31: moves."#s3" %3,(%1)+\n" \
8701+ "32:\n" \
8702+ " .endif\n" \
8703+ "4:\n" \
8704+ "\n" \
8705+ " .section __ex_table,\"a\"\n" \
8706+ " .align 4\n" \
8707+ " .long 11b,5f\n" \
8708+ " .long 12b,5f\n" \
8709+ " .long 21b,5f\n" \
8710+ " .long 22b,5f\n" \
8711+ " .ifnc \""#s3"\",\"\"\n" \
8712+ " .long 31b,5f\n" \
8713+ " .long 32b,5f\n" \
8714+ " .endif\n" \
8715+ " .previous\n" \
8716+ "\n" \
8717+ " .section .fixup,\"ax\"\n" \
8718+ " .even\n" \
8719+ "5: moveq.l #"#n",%0\n" \
8720+ " jra 4b\n" \
8721+ " .previous\n" \
8722+ : "+d" (res), "+a" (to), "+a" (from), "=&d" (tmp) \
8723+ : : "memory")
8724+
8725+#endif /* CONFIG_COLDFIRE */
8726 static __always_inline unsigned long
8727 __constant_copy_from_user(void *to, const void __user *from, unsigned long n)
8728 {
8729@@ -266,40 +310,6 @@ __constant_copy_from_user(void *to, cons
8730     return res;
8731 }
8732 
8733-#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \
8734- asm volatile ("\n" \
8735- " move."#s1" (%2)+,%3\n" \
8736- "11: moves."#s1" %3,(%1)+\n" \
8737- "12: move."#s2" (%2)+,%3\n" \
8738- "21: moves."#s2" %3,(%1)+\n" \
8739- "22:\n" \
8740- " .ifnc \""#s3"\",\"\"\n" \
8741- " move."#s3" (%2)+,%3\n" \
8742- "31: moves."#s3" %3,(%1)+\n" \
8743- "32:\n" \
8744- " .endif\n" \
8745- "4:\n" \
8746- "\n" \
8747- " .section __ex_table,\"a\"\n" \
8748- " .align 4\n" \
8749- " .long 11b,5f\n" \
8750- " .long 12b,5f\n" \
8751- " .long 21b,5f\n" \
8752- " .long 22b,5f\n" \
8753- " .ifnc \""#s3"\",\"\"\n" \
8754- " .long 31b,5f\n" \
8755- " .long 32b,5f\n" \
8756- " .endif\n" \
8757- " .previous\n" \
8758- "\n" \
8759- " .section .fixup,\"ax\"\n" \
8760- " .even\n" \
8761- "5: moveq.l #"#n",%0\n" \
8762- " jra 4b\n" \
8763- " .previous\n" \
8764- : "+d" (res), "+a" (to), "+a" (from), "=&d" (tmp) \
8765- : : "memory")
8766-
8767 static __always_inline unsigned long
8768 __constant_copy_to_user(void __user *to, const void *from, unsigned long n)
8769 {
8770--- a/arch/m68k/include/asm/unistd.h
8771+++ b/arch/m68k/include/asm/unistd.h
8772@@ -1,6 +1,12 @@
8773+/*
8774+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8775+ *
8776+ * This file is subject to the terms and conditions of the GNU General Public
8777+ * License. See the file COPYING in the main directory of this archive
8778+ * for more details.
8779+ */
8780 #ifndef _ASM_M68K_UNISTD_H_
8781 #define _ASM_M68K_UNISTD_H_
8782-
8783 /*
8784  * This file contains the system call numbers.
8785  */
8786@@ -343,10 +349,11 @@
8787 #define __NR_fanotify_init 337
8788 #define __NR_fanotify_mark 338
8789 #define __NR_prlimit64 339
8790+#define __NR_recvmmsg 340
8791 
8792 #ifdef __KERNEL__
8793 
8794-#define NR_syscalls 340
8795+#define NR_syscalls 341
8796 
8797 #define __ARCH_WANT_IPC_PARSE_VERSION
8798 #define __ARCH_WANT_OLD_READDIR
8799--- a/arch/m68k/include/asm/virtconvert.h
8800+++ b/arch/m68k/include/asm/virtconvert.h
8801@@ -1,5 +1,15 @@
8802+/*
8803+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8804+ *
8805+ * This file is subject to the terms and conditions of the GNU General Public
8806+ * License. See the file COPYING in the main directory of this archive
8807+ * for more details.
8808+ */
8809 #ifndef __VIRT_CONVERT__
8810 #define __VIRT_CONVERT__
8811+#ifdef CONFIG_COLDFIRE
8812+#include <asm/cf_virtconvert.h>
8813+#else
8814 
8815 /*
8816  * Macros used for converting between virtual and physical mappings.
8817@@ -45,3 +55,4 @@ static inline void *phys_to_virt(unsigne
8818 
8819 #endif
8820 #endif
8821+#endif
8822--- a/arch/m68k/kernel/Makefile
8823+++ b/arch/m68k/kernel/Makefile
8824@@ -2,16 +2,27 @@
8825 # Makefile for the linux kernel.
8826 #
8827 
8828-ifndef CONFIG_SUN3
8829- extra-y := head.o
8830+ifdef CONFIG_SUN3
8831+ extra-y := sun3-head.o vmlinux.lds
8832+ obj-y := entry.o signal.o ints.o time.o
8833 else
8834- extra-y := sun3-head.o
8835+ifndef CONFIG_COLDFIRE
8836+ extra-y := head.o vmlinux.lds
8837+ obj-y := entry.o signal.o traps.o ints.o time.o
8838+else # CONFIG_COLDFIRE
8839+ extra-y := vmlinux.lds
8840+ obj-y := time.o
8841+ ifdef CONFIG_M547X_8X
8842+ obj-$(CONFIG_PCI) += bios32_mcf548x.o
8843+ endif
8844+endif
8845 endif
8846-extra-y += vmlinux.lds
8847 
8848-obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
8849- sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
8850+obj-y += process.o ptrace.o module.o \
8851+ sys_m68k.o setup.o m68k_ksyms.o devres.o# semaphore.o
8852 
8853 devres-y = ../../../kernel/irq/devres.o
8854 
8855 obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
8856+
8857+EXTRA_AFLAGS := -traditional
8858--- a/arch/m68k/kernel/asm-offsets.c
8859+++ b/arch/m68k/kernel/asm-offsets.c
8860@@ -2,6 +2,15 @@
8861  * This program is used to generate definitions needed by
8862  * assembly language modules.
8863  *
8864+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8865+ * Jason Jin Jason.Jin@freescale.com
8866+ * Shrek Wu B16972@freescale.com
8867+ * Add Codlfire support
8868+ *
8869+ * This file is subject to the terms and conditions of the GNU General Public
8870+ * License. See the file COPYING in the main directory of this archive
8871+ * for more details.
8872+ *
8873  * We use the technique used in the OSF Mach kernel code:
8874  * generate asm statements containing #defines,
8875  * compile this file to assembler, and then extract the
8876@@ -22,6 +31,9 @@
8877 int main(void)
8878 {
8879     /* offsets into the task struct */
8880+ DEFINE(TASK_STATE, offsetof(struct task_struct, state));
8881+ DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
8882+ DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
8883     DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
8884     DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
8885     DEFINE(TASK_MM, offsetof(struct task_struct, mm));
8886@@ -43,6 +55,7 @@ int main(void)
8887     /* offsets into the thread_info struct */
8888     DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
8889     DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
8890+ DEFINE(TINFO_TP_VALUE, offsetof(struct thread_info, tp_value));
8891 
8892     /* offsets into the pt_regs */
8893     DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
8894@@ -57,8 +70,23 @@ int main(void)
8895     DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
8896     DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
8897     DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
8898+#ifdef CONFIG_COLDFIRE
8899+ /* Need to get the context out of struct mm for ASID setting */
8900+ DEFINE(MM_CONTEXT, offsetof(struct mm_struct, context));
8901+ /* Coldfire exception frame has vector *before* pc */
8902+ DEFINE(PT_VECTOR, offsetof(struct pt_regs, pc) - 4);
8903+#else
8904     /* bitfields are a bit difficult */
8905     DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
8906+#endif
8907+
8908+ /* offsets into the irq_handler struct */
8909+ DEFINE(IRQ_HANDLER, offsetof(struct irq_node, handler));
8910+ DEFINE(IRQ_DEVID, offsetof(struct irq_node, dev_id));
8911+ DEFINE(IRQ_NEXT, offsetof(struct irq_node, next));
8912+
8913+ /* offsets into the kernel_stat struct */
8914+ DEFINE(STAT_IRQ, offsetof(struct kernel_stat, irqs));
8915 
8916     /* offsets into the irq_cpustat_t struct */
8917     DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
8918--- a/arch/m68k/kernel/dma.c
8919+++ b/arch/m68k/kernel/dma.c
8920@@ -1,4 +1,7 @@
8921 /*
8922+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
8923+ * Jason Jin Jason.Jin@freescale.com
8924+ * Shrek Wu B16972@freescale.com
8925  * This file is subject to the terms and conditions of the GNU General Public
8926  * License. See the file COPYING in the main directory of this archive
8927  * for more details.
8928@@ -12,12 +15,25 @@
8929 #include <linux/scatterlist.h>
8930 #include <linux/slab.h>
8931 #include <linux/vmalloc.h>
8932-
8933+#include <linux/pci.h>
8934 #include <asm/pgalloc.h>
8935 
8936 void *dma_alloc_coherent(struct device *dev, size_t size,
8937              dma_addr_t *handle, gfp_t flag)
8938 {
8939+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X) || \
8940+ defined(CONFIG_M5441X)
8941+ /*
8942+ * On the M5445x platform the memory allocated with GFP_DMA
8943+ * is guaranteed to be DMA'able.
8944+ */
8945+ void *addr;
8946+
8947+ size = PAGE_ALIGN(size);
8948+ addr = kmalloc(size, GFP_DMA);
8949+ *handle = virt_to_phys(addr);
8950+ return addr;
8951+#else
8952     struct page *page, **map;
8953     pgprot_t pgprot;
8954     void *addr;
8955@@ -56,6 +72,7 @@ void *dma_alloc_coherent(struct device *
8956     kfree(map);
8957 
8958     return addr;
8959+#endif
8960 }
8961 EXPORT_SYMBOL(dma_alloc_coherent);
8962 
8963@@ -63,7 +80,12 @@ void dma_free_coherent(struct device *de
8964                void *addr, dma_addr_t handle)
8965 {
8966     pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
8967+#if defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X) || \
8968+ defined(CONFIG_M5441X)
8969+ kfree((void *)handle);
8970+#else
8971     vfree(addr);
8972+#endif
8973 }
8974 EXPORT_SYMBOL(dma_free_coherent);
8975 
8976@@ -77,6 +99,9 @@ void dma_sync_single_for_device(struct d
8977     case DMA_FROM_DEVICE:
8978         cache_clear(handle, size);
8979         break;
8980+ case PCI_DMA_BIDIRECTIONAL:
8981+ flush_dcache();
8982+ break;
8983     default:
8984         if (printk_ratelimit())
8985             printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
8986@@ -89,16 +114,23 @@ void dma_sync_sg_for_device(struct devic
8987                 enum dma_data_direction dir)
8988 {
8989     int i;
8990+#ifdef CONFIG_COLDFIRE
8991+ struct scatterlist *_sg;
8992 
8993+ for_each_sg(sg, _sg, nents, i)
8994+ dma_sync_single_for_device(dev, _sg->dma_address,
8995+ _sg->length, dir);
8996+#else
8997     for (i = 0; i < nents; sg++, i++)
8998         dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
8999+#endif
9000 }
9001 EXPORT_SYMBOL(dma_sync_sg_for_device);
9002 
9003 dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
9004               enum dma_data_direction dir)
9005 {
9006- dma_addr_t handle = virt_to_bus(addr);
9007+ dma_addr_t handle = (dma_addr_t)virt_to_bus(addr);
9008 
9009     dma_sync_single_for_device(dev, handle, size, dir);
9010     return handle;
9011@@ -120,10 +152,19 @@ int dma_map_sg(struct device *dev, struc
9012            enum dma_data_direction dir)
9013 {
9014     int i;
9015-
9016+#ifdef CONFIG_COLDFIRE
9017+ struct scatterlist *_sg;
9018+#endif
9019+#ifndef CONFIG_COLDFIRE
9020     for (i = 0; i < nents; sg++, i++) {
9021         sg->dma_address = sg_phys(sg);
9022         dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
9023+#else
9024+ for_each_sg(sg, _sg, nents, i) {
9025+ _sg->dma_address = sg_phys(_sg);
9026+ dma_sync_single_for_device(dev, _sg->dma_address,
9027+ _sg->length, dir);
9028+#endif
9029     }
9030     return nents;
9031 }
9032--- a/arch/m68k/kernel/process.c
9033+++ b/arch/m68k/kernel/process.c
9034@@ -4,6 +4,15 @@
9035  * Copyright (C) 1995 Hamish Macdonald
9036  *
9037  * 68060 fixes by Jesper Skov
9038+ *
9039+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9040+ * Kurt.Mahan@freescale.com
9041+ * Jason Jin Jason.Jin@freescale.com
9042+ * Shrek Wu B16972@freescale.com
9043+ *
9044+ * This file is subject to the terms and conditions of the GNU General Public
9045+ * License. See the file COPYING in the main directory of this archive
9046+ * for more details.
9047  */
9048 
9049 /*
9050@@ -185,12 +194,21 @@ EXPORT_SYMBOL(kernel_thread);
9051 void flush_thread(void)
9052 {
9053     unsigned long zero = 0;
9054+#if !defined(CONFIG_COLDFIRE)
9055     set_fs(USER_DS);
9056     current->thread.fs = __USER_DS;
9057     if (!FPU_IS_EMU)
9058         asm volatile (".chip 68k/68881\n\t"
9059                   "frestore %0@\n\t"
9060                   ".chip 68k" : : "a" (&zero));
9061+#else
9062+ set_fs(USER_DS);
9063+ current->thread.fs = USER_DS;
9064+#if defined(CONFIG_FPU)
9065+ if (!FPU_IS_EMU)
9066+ asm volatile ("frestore %0@\n\t" : : "a" (&zero));
9067+#endif
9068+#endif
9069 }
9070 
9071 /*
9072@@ -258,6 +276,7 @@ int copy_thread(unsigned long clone_flag
9073      * Must save the current SFC/DFC value, NOT the value when
9074      * the parent was last descheduled - RGH 10-08-96
9075      */
9076+#if !defined(CONFIG_COLDFIRE)
9077     p->thread.fs = get_fs().seg;
9078 
9079     if (!FPU_IS_EMU) {
9080@@ -269,9 +288,34 @@ int copy_thread(unsigned long clone_flag
9081                 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
9082                 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
9083                 : "memory");
9084+#else
9085+ p->thread.fs = get_fs();
9086+
9087+#if defined(CONFIG_FPU)
9088+ if (!FPU_IS_EMU) {
9089+ /* Copy the current fpu state */
9090+ asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0])
9091+ : "memory");
9092+
9093+ if (p->thread.fpstate[0]) {
9094+ asm volatile ("fmovemd %/fp0-%/fp7,%0"
9095+ : : "m" (p->thread.fp[0])
9096+ : "memory");
9097+ asm volatile ("fmovel %/fpiar,%0"
9098+ : : "m" (p->thread.fpcntl[0])
9099+ : "memory");
9100+ asm volatile ("fmovel %/fpcr,%0"
9101+ : : "m" (p->thread.fpcntl[1])
9102+ : "memory");
9103+ asm volatile ("fmovel %/fpsr,%0"
9104+ : : "m" (p->thread.fpcntl[2])
9105+ : "memory");
9106+ }
9107         /* Restore the state in case the fpu was busy */
9108         asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
9109     }
9110+#endif
9111+#endif
9112 
9113     return 0;
9114 }
9115@@ -280,7 +324,9 @@ int copy_thread(unsigned long clone_flag
9116 
9117 int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
9118 {
9119+#if !defined(CONFIG_COLDFIRE) || defined(CONFIG_FPU)
9120     char fpustate[216];
9121+#endif
9122 
9123     if (FPU_IS_EMU) {
9124         int i;
9125@@ -297,6 +343,7 @@ int dump_fpu (struct pt_regs *regs, stru
9126     }
9127 
9128     /* First dump the fpu context to avoid protocol violation. */
9129+#if !defined(CONFIG_COLDFIRE)
9130     asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
9131     if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
9132         return 0;
9133@@ -307,6 +354,25 @@ int dump_fpu (struct pt_regs *regs, stru
9134     asm volatile ("fmovemx %/fp0-%/fp7,%0"
9135         :: "m" (fpu->fpregs[0])
9136         : "memory");
9137+#elif defined(CONFIG_FPU)
9138+ asm volatile ("fsave %0" : : "m" (fpustate[0]) : "memory");
9139+ if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
9140+ return 0;
9141+
9142+ asm volatile ("fmovel %/fpiar,%0"
9143+ : : "m" (fpu->fpcntl[0])
9144+ : "memory");
9145+ asm volatile ("fmovel %/fpcr,%0"
9146+ : : "m" (fpu->fpcntl[1])
9147+ : "memory");
9148+ asm volatile ("fmovel %/fpsr,%0"
9149+ : : "m" (fpu->fpcntl[2])
9150+ : "memory");
9151+ asm volatile ("fmovemd %/fp0-%/fp7,%0"
9152+ : : "m" (fpu->fpregs[0])
9153+ : "memory");
9154+#endif
9155+
9156     return 1;
9157 }
9158 EXPORT_SYMBOL(dump_fpu);
9159--- a/arch/m68k/kernel/setup.c
9160+++ b/arch/m68k/kernel/setup.c
9161@@ -2,7 +2,14 @@
9162  * linux/arch/m68k/kernel/setup.c
9163  *
9164  * Copyright (C) 1995 Hamish Macdonald
9165- */
9166+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9167+ * Jason Jin Jason.Jin@freescale.com
9168+ * Shrek Wu B16972@freescale.com
9169+ *
9170+ * This file is subject to the terms and conditions of the GNU General Public
9171+ * License. See the file COPYING in the main directory of this archive
9172+ * for more details.
9173+*/
9174 
9175 /*
9176  * This file handles the architecture-dependent parts of system setup
9177@@ -74,14 +81,26 @@ struct mem_info m68k_memory[NUM_MEMINFO]
9178 EXPORT_SYMBOL(m68k_memory);
9179 
9180 struct mem_info m68k_ramdisk;
9181+EXPORT_SYMBOL(m68k_ramdisk);
9182 
9183+#if !defined(CONFIG_COLDFIRE)
9184 static char m68k_command_line[CL_SIZE];
9185+#else
9186+char m68k_command_line[CL_SIZE];
9187+unsigned long uboot_info_stk;
9188+EXPORT_SYMBOL(uboot_info_stk);
9189+#endif
9190 
9191 void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
9192 /* machine dependent irq functions */
9193 void (*mach_init_IRQ) (void) __initdata = NULL;
9194 void (*mach_get_model) (char *model);
9195 void (*mach_get_hardware_list) (struct seq_file *m);
9196+
9197+#ifdef CONFIG_COLDFIRE
9198+void (*mach_tick)(void);
9199+#endif
9200+
9201 /* machine dependent timer functions */
9202 unsigned long (*mach_gettimeoffset) (void);
9203 int (*mach_hwclk) (int, struct rtc_time*);
9204@@ -137,13 +156,17 @@ extern void config_hp300(void);
9205 extern void config_q40(void);
9206 extern void config_sun3x(void);
9207 
9208+#ifdef CONFIG_COLDFIRE
9209+void coldfire_sort_memrec(void);
9210+#endif
9211+
9212 #define MASK_256K 0xfffc0000
9213 
9214 extern void paging_init(void);
9215 
9216 static void __init m68k_parse_bootinfo(const struct bi_record *record)
9217 {
9218- while (record->tag != BI_LAST) {
9219+ while ((record->tag != BI_LAST) && !(CONFIG_COLDFIRE)) {
9220         int unknown = 0;
9221         const unsigned long *data = record->data;
9222 
9223@@ -203,6 +226,10 @@ static void __init m68k_parse_bootinfo(c
9224                           record->size);
9225     }
9226 
9227+#ifdef CONFIG_COLDFIRE
9228+ coldfire_sort_memrec();
9229+#endif
9230+
9231     m68k_realnum_memory = m68k_num_memory;
9232 #ifdef CONFIG_SINGLE_MEMORY_CHUNK
9233     if (m68k_num_memory > 1) {
9234@@ -215,7 +242,9 @@ static void __init m68k_parse_bootinfo(c
9235 
9236 void __init setup_arch(char **cmdline_p)
9237 {
9238+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
9239     int i;
9240+#endif
9241 
9242     /* The bootinfo is located right after the kernel bss */
9243     m68k_parse_bootinfo((const struct bi_record *)_end);
9244@@ -230,9 +259,10 @@ void __init setup_arch(char **cmdline_p)
9245      * We should really do our own FPU check at startup.
9246      * [what do we do with buggy 68LC040s? if we have problems
9247      * with them, we should add a test to check_bugs() below] */
9248-#ifndef CONFIG_M68KFPU_EMU_ONLY
9249+#if !defined(CONFIG_M68KFPU_EMU_ONLY) && defined(CONFIG_FPU)
9250     /* clear the fpu if we have one */
9251- if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
9252+ if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060|
9253+ FPU_CFV4E)) {
9254         volatile int zero = 0;
9255         asm volatile ("frestore %0" : : "m" (zero));
9256     }
9257@@ -320,16 +350,17 @@ void __init setup_arch(char **cmdline_p)
9258         config_sun3x();
9259         break;
9260 #endif
9261+#ifdef CONFIG_COLDFIRE
9262+ case MACH_CFMMU:
9263+ config_coldfire();
9264+ break;
9265+#endif
9266     default:
9267         panic("No configuration setup");
9268     }
9269 
9270     paging_init();
9271 
9272-#ifndef CONFIG_SUN3
9273- for (i = 1; i < m68k_num_memory; i++)
9274- free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
9275- m68k_memory[i].size);
9276 #ifdef CONFIG_BLK_DEV_INITRD
9277     if (m68k_ramdisk.size) {
9278         reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
9279@@ -341,6 +372,10 @@ void __init setup_arch(char **cmdline_p)
9280     }
9281 #endif
9282 
9283+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
9284+ for (i = 1; i < m68k_num_memory; i++)
9285+ free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
9286+ m68k_memory[i].size);
9287 #ifdef CONFIG_ATARI
9288     if (MACH_IS_ATARI)
9289         atari_stram_reserve_pages((void *)availmem);
9290@@ -353,12 +388,22 @@ void __init setup_arch(char **cmdline_p)
9291 
9292 #endif /* !CONFIG_SUN3 */
9293 
9294+#ifdef CONFIG_COLDFIRE
9295+ mmu_context_init();
9296+#endif
9297+
9298 /* set ISA defs early as possible */
9299 #if defined(CONFIG_ISA) && defined(MULTI_ISA)
9300     if (MACH_IS_Q40) {
9301         isa_type = ISA_TYPE_Q40;
9302         isa_sex = 0;
9303     }
9304+#ifdef CONFIG_GG2
9305+ if (MACH_IS_AMIGA && AMIGAHW_PRESENT(GG2_ISA)) {
9306+ isa_type = ISA_TYPE_GG2;
9307+ isa_sex = 0;
9308+ }
9309+#endif
9310 #ifdef CONFIG_AMIGA_PCMCIA
9311     if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
9312         isa_type = ISA_TYPE_AG;
9313@@ -377,6 +422,7 @@ static int show_cpuinfo(struct seq_file
9314 #define LOOP_CYCLES_68030 (8)
9315 #define LOOP_CYCLES_68040 (3)
9316 #define LOOP_CYCLES_68060 (1)
9317+#define LOOP_CYCLES_COLDFIRE (2)
9318 
9319     if (CPU_IS_020) {
9320         cpu = "68020";
9321@@ -390,6 +436,9 @@ static int show_cpuinfo(struct seq_file
9322     } else if (CPU_IS_060) {
9323         cpu = "68060";
9324         clockfactor = LOOP_CYCLES_68060;
9325+ } else if (CPU_IS_CFV4E) {
9326+ cpu = "ColdFire V4e";
9327+ clockfactor = LOOP_CYCLES_COLDFIRE;
9328     } else {
9329         cpu = "680x0";
9330         clockfactor = 0;
9331@@ -408,6 +457,8 @@ static int show_cpuinfo(struct seq_file
9332         fpu = "68060";
9333     else if (m68k_fputype & FPU_SUNFPA)
9334         fpu = "Sun FPA";
9335+ else if (m68k_fputype & FPU_CFV4E)
9336+ fpu = "ColdFire V4e";
9337     else
9338         fpu = "none";
9339 #endif
9340@@ -424,6 +475,8 @@ static int show_cpuinfo(struct seq_file
9341         mmu = "Sun-3";
9342     else if (m68k_mmutype & MMU_APOLLO)
9343         mmu = "Apollo";
9344+ else if (m68k_mmutype & MMU_CFV4E)
9345+ mmu = "ColdFire";
9346     else
9347         mmu = "unknown";
9348 
9349@@ -506,7 +559,8 @@ module_init(proc_hardware_init);
9350 
9351 void check_bugs(void)
9352 {
9353-#ifndef CONFIG_M68KFPU_EMU
9354+#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M5445X) && \
9355+ !defined(CONFIG_M5441X)
9356     if (m68k_fputype == 0) {
9357         printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
9358             "WHICH IS REQUIRED BY LINUX/M68K ***\n");
9359--- a/arch/m68k/kernel/sys_m68k.c
9360+++ b/arch/m68k/kernel/sys_m68k.c
9361@@ -1,5 +1,12 @@
9362 /*
9363  * linux/arch/m68k/kernel/sys_m68k.c
9364+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9365+ * Jason Jin Jason.Jin@freescale.com
9366+ * Shrek Wu B16972@freescale.com
9367+ *
9368+ * This file is subject to the terms and conditions of the GNU General Public
9369+ * License. See the file COPYING in the main directory of this archive
9370+ * for more details.
9371  *
9372  * This file contains various random system calls that
9373  * have a non-standard calling sequence on the Linux/m68k
9374@@ -29,6 +36,9 @@
9375 #include <asm/unistd.h>
9376 #include <linux/elf.h>
9377 #include <asm/tlb.h>
9378+#ifdef CONFIG_COLDFIRE
9379+#include <asm/cacheflush.h>
9380+#endif
9381 
9382 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
9383                  unsigned long error_code);
9384@@ -45,6 +55,59 @@ asmlinkage long sys_mmap2(unsigned long
9385     return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
9386 }
9387 
9388+/*
9389+ * Perform the select(nd, in, out, ex, tv) and mmap() system
9390+ * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
9391+ * handle more than 4 system call parameters, so these system calls
9392+ * used a memory block for parameter passing..
9393+ */
9394+
9395+struct mmap_arg_struct {
9396+ unsigned long addr;
9397+ unsigned long len;
9398+ unsigned long prot;
9399+ unsigned long flags;
9400+ unsigned long fd;
9401+ unsigned long offset;
9402+};
9403+
9404+asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
9405+{
9406+ struct mmap_arg_struct a;
9407+ int error = -EFAULT;
9408+
9409+ if (copy_from_user(&a, arg, sizeof(a)))
9410+ goto out;
9411+
9412+ error = -EINVAL;
9413+ if (a.offset & ~PAGE_MASK)
9414+ goto out;
9415+
9416+ a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
9417+
9418+ error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
9419+ a.fd, a.offset >> PAGE_SHIFT);
9420+out:
9421+ return error;
9422+}
9423+
9424+struct sel_arg_struct {
9425+ unsigned long n;
9426+ fd_set __user *inp, *outp, *exp;
9427+ struct timeval __user *tvp;
9428+};
9429+
9430+asmlinkage int old_select(struct sel_arg_struct __user *arg)
9431+{
9432+ struct sel_arg_struct a;
9433+
9434+ if (copy_from_user(&a, arg, sizeof(a)))
9435+ return -EFAULT;
9436+ /* sys_select() does the appropriate kernel locking */
9437+ return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
9438+}
9439+
9440+#ifndef CONFIG_COLDFIRE
9441 /* Convert virtual (user) address VADDR to physical address PADDR */
9442 #define virt_to_phys_040(vaddr) \
9443 ({ \
9444@@ -368,6 +431,7 @@ cache_flush_060 (unsigned long addr, int
9445     }
9446   return 0;
9447 }
9448+#endif /* CONFIG_COLDFIRE */
9449 
9450 /* sys_cacheflush -- flush (part of) the processor cache. */
9451 asmlinkage int
9452@@ -399,6 +463,7 @@ sys_cacheflush (unsigned long addr, int
9453             goto out;
9454     }
9455 
9456+#ifndef CONFIG_COLDFIRE
9457     if (CPU_IS_020_OR_030) {
9458         if (scope == FLUSH_SCOPE_LINE && len < 256) {
9459             unsigned long cacr;
9460@@ -443,6 +508,16 @@ sys_cacheflush (unsigned long addr, int
9461         ret = cache_flush_060 (addr, scope, cache, len);
9462         }
9463     }
9464+#else /* CONFIG_COLDFIRE */
9465+ if ((cache & FLUSH_CACHE_INSN) && (cache & FLUSH_CACHE_DATA))
9466+ flush_bcache();
9467+ else if (cache & FLUSH_CACHE_INSN)
9468+ flush_icache();
9469+ else
9470+ flush_dcache();
9471+
9472+ ret = 0;
9473+#endif /* CONFIG_COLDFIRE */
9474 out:
9475     return ret;
9476 }
9477@@ -474,9 +549,14 @@ asmlinkage unsigned long sys_get_thread_
9478     return current_thread_info()->tp_value;
9479 }
9480 
9481+extern void *_vdso_tp;
9482+
9483 asmlinkage int sys_set_thread_area(unsigned long tp)
9484 {
9485     current_thread_info()->tp_value = tp;
9486+#ifdef CONFIG_VDSO
9487+ *(unsigned long *)_vdso_tp = tp;
9488+#endif
9489     return 0;
9490 }
9491 
9492--- a/arch/m68k/kernel/time.c
9493+++ b/arch/m68k/kernel/time.c
9494@@ -2,6 +2,14 @@
9495  * linux/arch/m68k/kernel/time.c
9496  *
9497  * Copyright (C) 1991, 1992, 1995 Linus Torvalds
9498+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9499+ * Jason Jin Jason.Jin@freescale.com
9500+ * Shrek Wu B16972@freescale.com
9501+ * Alison Wang b18965@freescale.com
9502+ *
9503+ * This file is subject to the terms and conditions of the GNU General Public
9504+ * License. See the file COPYING in the main directory of this archive
9505+ * for more details.
9506  *
9507  * This file contains the m68k-specific time handling details.
9508  * Most of the stuff is located in the machine specific files.
9509@@ -9,9 +17,12 @@
9510  * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
9511  * "A Kernel Model for Precision Timekeeping" by Dave Mills
9512  */
9513-
9514+#include <linux/clk.h>
9515+#include <linux/clocksource.h>
9516+#include <linux/clockchips.h>
9517 #include <linux/errno.h>
9518 #include <linux/module.h>
9519+#include <linux/sysdev.h>
9520 #include <linux/sched.h>
9521 #include <linux/kernel.h>
9522 #include <linux/param.h>
9523@@ -27,6 +38,7 @@
9524 #include <linux/time.h>
9525 #include <linux/timex.h>
9526 #include <linux/profile.h>
9527+#include <asm/mcfsim.h>
9528 
9529 static inline int set_rtc_mmss(unsigned long nowtime)
9530 {
9531@@ -35,12 +47,18 @@ static inline int set_rtc_mmss(unsigned
9532   return -1;
9533 }
9534 
9535+#ifndef CONFIG_GENERIC_CLOCKEVENTS
9536 /*
9537  * timer_interrupt() needs to keep up the real-time clock,
9538  * as well as call the "do_timer()" routine every clocktick
9539  */
9540 static irqreturn_t timer_interrupt(int irq, void *dummy)
9541 {
9542+#ifdef CONFIG_COLDFIRE
9543+ /* kick hardware timer if necessary */
9544+ if (mach_tick)
9545+ mach_tick();
9546+#endif
9547     do_timer(1);
9548     update_process_times(user_mode(get_irq_regs()));
9549     profile_tick(CPU_PROFILING);
9550@@ -91,11 +109,133 @@ void __init time_init(void)
9551 {
9552     mach_sched_init(timer_interrupt);
9553 }
9554+#endif
9555 
9556+#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
9557 u32 arch_gettimeoffset(void)
9558 {
9559     return mach_gettimeoffset() * 1000;
9560 }
9561+#endif
9562+
9563+#ifdef CONFIG_GENERIC_CLOCKEVENTS
9564+
9565+extern unsigned long long sys_dtim2_read(void);
9566+extern void sys_dtim2_init(void);
9567+static int cfv4_set_next_event(unsigned long evt,
9568+ struct clock_event_device *dev);
9569+static void cfv4_set_mode(enum clock_event_mode mode,
9570+ struct clock_event_device *dev);
9571+
9572+#if defined(CONFIG_M5445X) || defined(CONFIG_M5441X)
9573+#define FREQ (MCF_BUSCLK / 16)
9574+#else
9575+#define FREQ (MCF_BUSCLK)
9576+#endif
9577+
9578+/*
9579+ * Clock Evnt setup
9580+ */
9581+static struct clock_event_device clockevent_cfv4 = {
9582+ .name = "CFV4 timer2even",
9583+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
9584+ .rating = 200,
9585+ .shift = 20,
9586+ .set_mode = cfv4_set_mode,
9587+ .set_next_event = cfv4_set_next_event,
9588+};
9589+
9590+static int cfv4_set_next_event(unsigned long evt,
9591+ struct clock_event_device *dev)
9592+{
9593+ return 0;
9594+}
9595+
9596+static void cfv4_set_mode(enum clock_event_mode mode,
9597+ struct clock_event_device *dev)
9598+{
9599+ if (mode != CLOCK_EVT_MODE_ONESHOT)
9600+ cfv4_set_next_event((FREQ / HZ), dev);
9601+}
9602+
9603+static int __init cfv4_clockevent_init(void)
9604+{
9605+ clockevent_cfv4.mult =
9606+ div_sc(FREQ, NSEC_PER_SEC,
9607+ clockevent_cfv4.shift);
9608+ clockevent_cfv4.max_delta_ns =
9609+ clockevent_delta2ns((FREQ / HZ),
9610+ &clockevent_cfv4);
9611+ clockevent_cfv4.min_delta_ns =
9612+ clockevent_delta2ns(1, &clockevent_cfv4);
9613+
9614+ clockevent_cfv4.cpumask = &cpumask_of_cpu(0);
9615+
9616+ printk(KERN_INFO "timer: register clockevent\n");
9617+ clockevents_register_device(&clockevent_cfv4);
9618+
9619+ return 0;
9620+}
9621+
9622+/*
9623+ * clocksource setup
9624+ */
9625+
9626+struct clocksource clocksource_cfv4 = {
9627+ .name = "ColdfireV4",
9628+ .rating = 250,
9629+ .mask = CLOCKSOURCE_MASK(32),
9630+ .read = sys_dtim2_read,
9631+ .shift = 20,
9632+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
9633+};
9634+
9635+/*
9636+ * Initialize time subsystem. Called from linux/init/main.c
9637+ */
9638+void __init time_init(void)
9639+{
9640+ int ret;
9641+
9642+ printk(KERN_INFO "Initializing time\n");
9643+
9644+ cfv4_clockevent_init();
9645+ /* initialize the system timer */
9646+ sys_dtim2_init();
9647+
9648+ /* JKM */
9649+ clocksource_cfv4.mult = clocksource_hz2mult(FREQ,
9650+ clocksource_cfv4.shift);
9651+
9652+ /* register our clocksource */
9653+ ret = clocksource_register(&clocksource_cfv4);
9654+ if (ret)
9655+ printk(KERN_ERR "timer: unable to "
9656+ "register clocksource - %d\n", ret);
9657+}
9658+
9659+/*
9660+ * sysfs pieces
9661+ */
9662+
9663+static struct sysdev_class timer_class = {
9664+ .name = "timer",
9665+};
9666+
9667+static struct sys_device timer_device = {
9668+ .id = 0,
9669+ .cls = &timer_class,
9670+};
9671+
9672+static int __init timer_init_sysfs(void)
9673+{
9674+ int err = sysdev_class_register(&timer_class);
9675+ if (!err)
9676+ err = sysdev_register(&timer_device);
9677+ return err;
9678+}
9679+device_initcall(timer_init_sysfs);
9680+#endif /* CONFIG_GENERIC_CLOCKEVENTS */
9681 
9682 static int __init rtc_init(void)
9683 {
9684--- /dev/null
9685+++ b/arch/m68k/kernel/vmlinux-cf.lds
9686@@ -0,0 +1,142 @@
9687+/* ld script to make m68k Coldfire Linux kernel
9688+ *
9689+ * Derived from arch/m68k/kernel/vmlinux-std.lds
9690+ *
9691+ * Updated 11/26/2007 for new CodeSourcery toolset
9692+ * by Kurt Mahan <kmahan@freescale.com>
9693+ *
9694+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9695+ * Jason Jin Jason.Jin@freescale.com
9696+ * Shrek Wu B16972@freescale.com
9697+ *
9698+ * This file is subject to the terms and conditions of the GNU General Public
9699+ * License. See the file COPYING in the main directory of this archive
9700+ * for more details.
9701+ */
9702+
9703+#define LOAD_OFFSET 0x00000000
9704+
9705+#include <asm-generic/vmlinux.lds.h>
9706+#include <asm/page_offset.h>
9707+
9708+#define START_OFFSET 0x00020000
9709+#define IMAGE_START PAGE_OFFSET_RAW + START_OFFSET
9710+
9711+OUTPUT_FORMAT("elf32-m68k", "elf32-m68k", "elf32-m68k")
9712+OUTPUT_ARCH(m68k)
9713+ENTRY(_stext)
9714+jiffies = jiffies_64 + 4;
9715+
9716+SECTIONS
9717+{
9718+ . = IMAGE_START;
9719+ .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) {
9720+ _text = .; /* Text and read-only data */
9721+ *(.text.head)
9722+ } :text = 0x4e75
9723+
9724+ .text : AT(ADDR(.text) - LOAD_OFFSET) {
9725+ TEXT_TEXT
9726+ SCHED_TEXT
9727+ LOCK_TEXT
9728+ *(.fixup)
9729+ *(.gnu.warning)
9730+ } :text = 0x4e75
9731+ _etext = .; /* End of text section */
9732+
9733+ . = ALIGN(16);
9734+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
9735+ __start___ex_table = .;
9736+ *(__ex_table)
9737+ __stop___ex_table = .;
9738+ }
9739+
9740+ RODATA
9741+
9742+ . = ALIGN(8192);
9743+ .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */
9744+ DATA_DATA
9745+ CONSTRUCTORS
9746+ } :data
9747+
9748+
9749+ . = ALIGN(16);
9750+ .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET ) {
9751+ *(.data.cacheline_aligned)
9752+ } :data
9753+
9754+ _edata = .; /* End of data section */
9755+
9756+ NOTES /* support ld --build-id */
9757+
9758+ . = ALIGN(8192); /* Initrd */
9759+ .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
9760+ __init_begin = .;
9761+ _sinittext = .;
9762+ *(.init.text)
9763+ _einittext = .;
9764+ }
9765+
9766+ .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
9767+ *(.init.data)
9768+ }
9769+
9770+ . = ALIGN(16);
9771+ .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
9772+ __setup_start = .;
9773+ *(.init.setup)
9774+ __setup_end = .;
9775+ }
9776+
9777+ .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
9778+ __initcall_start = .;
9779+ INITCALLS
9780+ __initcall_end = .;
9781+ }
9782+
9783+ .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
9784+ __con_initcall_start = .;
9785+ *(.con_initcall.init)
9786+ __con_initcall_end = .;
9787+ }
9788+
9789+ SECURITY_INIT
9790+
9791+#ifdef CONFIG_BLK_DEV_INITRD
9792+ . = ALIGN(8192);
9793+ .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
9794+ __initramfs_start = .;
9795+ *(.init.ramfs)
9796+ __initramfs_end = .;
9797+ }
9798+#endif
9799+
9800+ . = ALIGN(8192);
9801+ __init_end = .;
9802+
9803+ .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
9804+ *(.data.init_task) /* The initial task and kernel stack */
9805+ }
9806+
9807+ _sbss = .;
9808+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { /* BSS */
9809+ *(.bss)
9810+ }
9811+ _ebss = .;
9812+
9813+ _end = . ;
9814+
9815+ __ctors_start = . ;
9816+
9817+ __ctors_end = . ;
9818+
9819+ /* Sections to be discarded */
9820+ /DISCARD/ : {
9821+ *(.exit.text)
9822+ *(.exit.data)
9823+ *(.exitcall.exit)
9824+ }
9825+
9826+ /* Stabs debugging sections. */
9827+ STABS_DEBUG
9828+}
9829--- a/arch/m68k/kernel/vmlinux.lds.S
9830+++ b/arch/m68k/kernel/vmlinux.lds.S
9831@@ -1,10 +1,20 @@
9832+/*
9833+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
9834+ *
9835+ * This file is subject to the terms and conditions of the GNU General Public
9836+ * License. See the file COPYING in the main directory of this archive
9837+ * for more details.
9838+ */
9839 PHDRS
9840 {
9841- text PT_LOAD FILEHDR PHDRS FLAGS (7);
9842+ headers PT_PHDR PHDRS ;
9843+ text PT_LOAD FILEHDR PHDRS FLAGS (5);
9844   data PT_LOAD FLAGS (7);
9845 }
9846 #ifdef CONFIG_SUN3
9847 #include "vmlinux-sun3.lds"
9848+#elif CONFIG_COLDFIRE
9849+#include "vmlinux-cf.lds"
9850 #else
9851 #include "vmlinux-std.lds"
9852 #endif
9853--- a/arch/m68k/lib/checksum.c
9854+++ b/arch/m68k/lib/checksum.c
9855@@ -30,6 +30,10 @@
9856  * 1998/8/31 Andreas Schwab:
9857  * Zero out rest of buffer on exception in
9858  * csum_partial_copy_from_user.
9859+ *
9860+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
9861+ * Jason Jin Jason.Jin@freescale.com
9862+ * Shrek Wu B16972@freescale.com
9863  */
9864 
9865 #include <linux/module.h>
9866@@ -39,8 +43,132 @@
9867  * computes a partial checksum, e.g. for TCP/UDP fragments
9868  */
9869 
9870+#ifdef CONFIG_COLDFIRE
9871+
9872+static inline unsigned short from32to16(unsigned long x)
9873+{
9874+ /* add up 16-bit and 16-bit for 16+c bit */
9875+ x = (x & 0xffff) + (x >> 16);
9876+ /* add up carry.. */
9877+ x = (x & 0xffff) + (x >> 16);
9878+ return x;
9879+}
9880+
9881+static unsigned long do_csum(const unsigned char *buff, int len)
9882+{
9883+ int odd, count;
9884+ unsigned long result = 0;
9885+
9886+ if (len <= 0)
9887+ goto out;
9888+ odd = 1 & (unsigned long) buff;
9889+ if (odd) {
9890+ result = *buff;
9891+ len--;
9892+ buff++;
9893+ }
9894+ count = len >> 1; /* nr of 16-bit words.. */
9895+ if (count) {
9896+ if (2 & (unsigned long) buff) {
9897+ result += *(unsigned short *) buff;
9898+ count--;
9899+ len -= 2;
9900+ buff += 2;
9901+ }
9902+ count >>= 1; /* nr of 32-bit words.. */
9903+ if (count) {
9904+ unsigned long carry = 0;
9905+ do {
9906+ unsigned long w = *(unsigned long *) buff;
9907+ count--;
9908+ buff += 4;
9909+ result += carry;
9910+ result += w;
9911+ carry = (w > result);
9912+ } while (count);
9913+ result += carry;
9914+ result = (result & 0xffff) + (result >> 16);
9915+ }
9916+ if (len & 2) {
9917+ result += *(unsigned short *) buff;
9918+ buff += 2;
9919+ }
9920+ }
9921+ if (len & 1)
9922+ result += (*buff << 8);
9923+ result = from32to16(result);
9924+ if (odd)
9925+ result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
9926+out:
9927+ return result;
9928+}
9929+
9930+/*
9931+ * This is a version of ip_compute_csum() optimized for IP headers,
9932+ * which always checksum on 4 octet boundaries.
9933+ */
9934+__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
9935+{
9936+ return ~do_csum(iph, ihl*4);
9937+}
9938+EXPORT_SYMBOL(ip_fast_csum);
9939+
9940+/*
9941+ * computes the checksum of a memory block at buff, length len,
9942+ * and adds in "sum" (32-bit)
9943+ *
9944+ * returns a 32-bit number suitable for feeding into itself
9945+ * or csum_tcpudp_magic
9946+ *
9947+ * this function must be called with even lengths, except
9948+ * for the last fragment, which may be odd
9949+ *
9950+ * it's best to have buff aligned on a 32-bit boundary
9951+ */
9952 __wsum csum_partial(const void *buff, int len, __wsum sum)
9953 {
9954+ unsigned int result = do_csum(buff, len);
9955+
9956+ /* add in old sum, and carry.. */
9957+ result += sum;
9958+ if (sum > result)
9959+ result += 1;
9960+ return result;
9961+}
9962+EXPORT_SYMBOL(csum_partial);
9963+
9964+/*
9965+ * copy from fs while checksumming, otherwise like csum_partial
9966+ */
9967+
9968+__wsum
9969+csum_partial_copy_from_user(const void __user *src, void *dst, int len,
9970+ __wsum sum, int *csum_err)
9971+{
9972+ if (csum_err)
9973+ *csum_err = 0;
9974+ memcpy(dst, src, len);
9975+ return csum_partial(dst, len, sum);
9976+}
9977+EXPORT_SYMBOL(csum_partial_copy_from_user);
9978+
9979+/*
9980+ * copy from ds while checksumming, otherwise like csum_partial
9981+ */
9982+
9983+__wsum
9984+csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
9985+{
9986+ memcpy(dst, src, len);
9987+ return csum_partial(dst, len, sum);
9988+}
9989+EXPORT_SYMBOL(csum_partial_copy_nocheck);
9990+
9991+#else /* !CONFIG_COLDFIRE */
9992+
9993+unsigned int
9994+csum_partial(const unsigned char *buff, int len, unsigned int sum)
9995+{
9996     unsigned long tmp1, tmp2;
9997       /*
9998        * Experiments with ethernet and slip connections show that buff
9999@@ -423,3 +551,4 @@ csum_partial_copy_nocheck(const void *sr
10000     return(sum);
10001 }
10002 EXPORT_SYMBOL(csum_partial_copy_nocheck);
10003+#endif /* CONFIG_COLDFIRE */
10004--- a/arch/m68k/lib/muldi3.c
10005+++ b/arch/m68k/lib/muldi3.c
10006@@ -1,6 +1,9 @@
10007 /* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
10008                gcc-2.7.2.3/longlong.h which is: */
10009 /* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
10010+ Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10011+ Jason Jin Jason.Jin@freescale.com
10012+ Shrek Wu B16972@freescale.com
10013 
10014 This file is part of GNU CC.
10015 
10016@@ -21,12 +24,22 @@ Boston, MA 02111-1307, USA. */
10017 
10018 #define BITS_PER_UNIT 8
10019 
10020+#ifdef CONFIG_COLDFIRE
10021+#define umul_ppmm(w1, w0, u, v) \
10022+ do { \
10023+ unsigned long long x; \
10024+ x = (unsigned long long)u * v; \
10025+ w0 = (unsigned long)(x & 0x00000000ffffffff); \
10026+ w1 = (unsigned long)(x & 0xffffffff00000000) >> 32; \
10027+ } while (0)
10028+#else /* CONFIG_COLDFIRE */
10029 #define umul_ppmm(w1, w0, u, v) \
10030   __asm__ ("mulu%.l %3,%1:%0" \
10031            : "=d" ((USItype)(w0)), \
10032              "=d" ((USItype)(w1)) \
10033            : "%0" ((USItype)(u)), \
10034              "dmi" ((USItype)(v)))
10035+#endif /* CONFIG_COLDFIRE */
10036 
10037 #define __umulsidi3(u, v) \
10038   ({DIunion __w; \
10039--- a/arch/m68k/lib/string.c
10040+++ b/arch/m68k/lib/string.c
10041@@ -1,4 +1,8 @@
10042 /*
10043+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10044+ * * Jason Jin Jason.Jin@freescale.com
10045+ * Shrek Wu B16972@freescale.com
10046+ *
10047  * This file is subject to the terms and conditions of the GNU General Public
10048  * License. See the file COPYING in the main directory of this archive
10049  * for more details.
10050@@ -21,6 +25,7 @@ char *strcat(char *dest, const char *src
10051 }
10052 EXPORT_SYMBOL(strcat);
10053 
10054+#ifndef CONFIG_COLDFIRE
10055 void *memset(void *s, int c, size_t count)
10056 {
10057     void *xs = s;
10058@@ -149,6 +154,69 @@ void *memcpy(void *to, const void *from,
10059 }
10060 EXPORT_SYMBOL(memcpy);
10061 
10062+#else /* CONFIG_COLDFIRE */
10063+
10064+void *memset(void *s, int c, size_t count)
10065+{
10066+ unsigned long x;
10067+ void *originalTo = s;
10068+
10069+ for (x = 0; x < count; x++)
10070+ *(unsigned char *)s++ = (unsigned char)c;
10071+
10072+ return originalTo;
10073+}
10074+EXPORT_SYMBOL(memset);
10075+
10076+void *memcpy(void *to, const void *from, size_t n)
10077+{
10078+ void *xto = to;
10079+ size_t temp;
10080+
10081+ if (!n)
10082+ return xto;
10083+ if ((long) to & 1) {
10084+ char *cto = to;
10085+ const char *cfrom = from;
10086+ *cto++ = *cfrom++;
10087+ to = cto;
10088+ from = cfrom;
10089+ n--;
10090+ }
10091+ if (n > 2 && (long) to & 2) {
10092+ short *sto = to;
10093+ const short *sfrom = from;
10094+ *sto++ = *sfrom++;
10095+ to = sto;
10096+ from = sfrom;
10097+ n -= 2;
10098+ }
10099+ temp = n >> 2;
10100+ if (temp) {
10101+ long *lto = to;
10102+ const long *lfrom = from;
10103+ for (; temp; temp--)
10104+ *lto++ = *lfrom++;
10105+ to = lto;
10106+ from = lfrom;
10107+ }
10108+ if (n & 2) {
10109+ short *sto = to;
10110+ const short *sfrom = from;
10111+ *sto++ = *sfrom++;
10112+ to = sto;
10113+ from = sfrom;
10114+ }
10115+ if (n & 1) {
10116+ char *cto = to;
10117+ const char *cfrom = from;
10118+ *cto = *cfrom;
10119+ }
10120+ return xto;
10121+}
10122+EXPORT_SYMBOL(memcpy);
10123+#endif /* CONFIG_COLDFIRE */
10124+
10125 void *memmove(void *dest, const void *src, size_t n)
10126 {
10127     void *xdest = dest;
10128--- a/arch/m68k/lib/uaccess.c
10129+++ b/arch/m68k/lib/uaccess.c
10130@@ -1,10 +1,15 @@
10131 /*
10132+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10133+ * Jason Jin Jason.Jin@freescale.com
10134+ * Shrek Wu B16972@freescale.com
10135+ *
10136  * This file is subject to the terms and conditions of the GNU General Public
10137  * License. See the file COPYING in the main directory of this archive
10138  * for more details.
10139  */
10140 
10141 #include <linux/module.h>
10142+#ifndef CONFIG_COLDFIRE
10143 #include <asm/uaccess.h>
10144 
10145 unsigned long __generic_copy_from_user(void *to, const void __user *from,
10146@@ -220,3 +225,245 @@ unsigned long __clear_user(void __user *
10147     return res;
10148 }
10149 EXPORT_SYMBOL(__clear_user);
10150+
10151+#else /* CONFIG_COLDFIRE */
10152+
10153+#include <asm/cf_uaccess.h>
10154+
10155+unsigned long __generic_copy_from_user(void *to, const void *from,
10156+ unsigned long n)
10157+{
10158+ unsigned long tmp;
10159+ __asm__ __volatile__
10160+ (" tstl %2\n"
10161+ " jeq 2f\n"
10162+ "1: movel (%1)+,%3\n"
10163+ " movel %3,(%0)+\n"
10164+ " subql #1,%2\n"
10165+ " jne 1b\n"
10166+ "2: movel %4,%2\n"
10167+ " bclr #1,%2\n"
10168+ " jeq 4f\n"
10169+ "3: movew (%1)+,%3\n"
10170+ " movew %3,(%0)+\n"
10171+ "4: bclr #0,%2\n"
10172+ " jeq 6f\n"
10173+ "5: moveb (%1)+,%3\n"
10174+ " moveb %3,(%0)+\n"
10175+ "6:\n"
10176+ ".section .fixup,\"ax\"\n"
10177+ " .even\n"
10178+ "7: movel %2,%%d0\n"
10179+ "71:clrl (%0)+\n"
10180+ " subql #1,%%d0\n"
10181+ " jne 71b\n"
10182+ " lsll #2,%2\n"
10183+ " addl %4,%2\n"
10184+ " btst #1,%4\n"
10185+ " jne 81f\n"
10186+ " btst #0,%4\n"
10187+ " jne 91f\n"
10188+ " jra 6b\n"
10189+ "8: addql #2,%2\n"
10190+ "81:clrw (%0)+\n"
10191+ " btst #0,%4\n"
10192+ " jne 91f\n"
10193+ " jra 6b\n"
10194+ "9: addql #1,%2\n"
10195+ "91:clrb (%0)+\n"
10196+ " jra 6b\n"
10197+ ".previous\n"
10198+ ".section __ex_table,\"a\"\n"
10199+ " .align 4\n"
10200+ " .long 1b,7b\n"
10201+ " .long 3b,8b\n"
10202+ " .long 5b,9b\n"
10203+ ".previous"
10204+ : "=a"(to), "=a"(from), "=d"(n), "=&d"(tmp)
10205+ : "d"(n & 3), "0"(to), "1"(from), "2"(n/4)
10206+ : "d0", "memory");
10207+ return n;
10208+}
10209+EXPORT_SYMBOL(__generic_copy_from_user);
10210+
10211+
10212+unsigned long __generic_copy_to_user(void *to, const void *from,
10213+ unsigned long n)
10214+{
10215+ unsigned long tmp;
10216+ __asm__ __volatile__
10217+ (" tstl %2\n"
10218+ " jeq 3f\n"
10219+ "1: movel (%1)+,%3\n"
10220+ "22:movel %3,(%0)+\n"
10221+ "2: subql #1,%2\n"
10222+ " jne 1b\n"
10223+ "3: movel %4,%2\n"
10224+ " bclr #1,%2\n"
10225+ " jeq 4f\n"
10226+ " movew (%1)+,%3\n"
10227+ "24:movew %3,(%0)+\n"
10228+ "4: bclr #0,%2\n"
10229+ " jeq 5f\n"
10230+ " moveb (%1)+,%3\n"
10231+ "25:moveb %3,(%0)+\n"
10232+ "5:\n"
10233+ ".section .fixup,\"ax\"\n"
10234+ " .even\n"
10235+ "60:addql #1,%2\n"
10236+ "6: lsll #2,%2\n"
10237+ " addl %4,%2\n"
10238+ " jra 5b\n"
10239+ "7: addql #2,%2\n"
10240+ " jra 5b\n"
10241+ "8: addql #1,%2\n"
10242+ " jra 5b\n"
10243+ ".previous\n"
10244+ ".section __ex_table,\"a\"\n"
10245+ " .align 4\n"
10246+ " .long 1b,60b\n"
10247+ " .long 22b,6b\n"
10248+ " .long 2b,6b\n"
10249+ " .long 24b,7b\n"
10250+ " .long 3b,60b\n"
10251+ " .long 4b,7b\n"
10252+ " .long 25b,8b\n"
10253+ " .long 5b,8b\n"
10254+ ".previous"
10255+ : "=a"(to), "=a"(from), "=d"(n), "=&d"(tmp)
10256+ : "r"(n & 3), "0"(to), "1"(from), "2"(n / 4)
10257+ : "memory");
10258+ return n;
10259+}
10260+EXPORT_SYMBOL(__generic_copy_to_user);
10261+
10262+/*
10263+ * Copy a null terminated string from userspace.
10264+ */
10265+
10266+long strncpy_from_user(char *dst, const char *src, long count)
10267+{
10268+ long res = -EFAULT;
10269+ if (!(access_ok(VERIFY_READ, src, 1))) /* --tym-- */
10270+ return res;
10271+ if (count == 0)
10272+ return count;
10273+ __asm__ __volatile__
10274+ ("1: moveb (%2)+,%%d0\n"
10275+ "12:moveb %%d0,(%1)+\n"
10276+ " jeq 2f\n"
10277+ " subql #1,%3\n"
10278+ " jne 1b\n"
10279+ "2: subl %3,%0\n"
10280+ "3:\n"
10281+ ".section .fixup,\"ax\"\n"
10282+ " .even\n"
10283+ "4: movel %4,%0\n"
10284+ " jra 3b\n"
10285+ ".previous\n"
10286+ ".section __ex_table,\"a\"\n"
10287+ " .align 4\n"
10288+ " .long 1b,4b\n"
10289+ " .long 12b,4b\n"
10290+ ".previous"
10291+ : "=d"(res), "=a"(dst), "=a"(src), "=d"(count)
10292+ : "i"(-EFAULT), "0"(count), "1"(dst), "2"(src), "3"(count)
10293+ : "d0", "memory");
10294+ return res;
10295+}
10296+EXPORT_SYMBOL(strncpy_from_user);
10297+
10298+/*
10299+ * Return the size of a string (including the ending 0)
10300+ *
10301+ * Return 0 on exception, a value greater than N if too long
10302+ */
10303+long strnlen_user(const char *src, long n)
10304+{
10305+ long res = -EFAULT;
10306+ if (!(access_ok(VERIFY_READ, src, 1))) /* --tym-- */
10307+ return res;
10308+
10309+ res = -(long)src;
10310+ __asm__ __volatile__
10311+ ("1:\n"
10312+ " tstl %2\n"
10313+ " jeq 3f\n"
10314+ "2: moveb (%1)+,%%d0\n"
10315+ "22:\n"
10316+ " subql #1,%2\n"
10317+ " tstb %%d0\n"
10318+ " jne 1b\n"
10319+ " jra 4f\n"
10320+ "3:\n"
10321+ " addql #1,%0\n"
10322+ "4:\n"
10323+ " addl %1,%0\n"
10324+ "5:\n"
10325+ ".section .fixup,\"ax\"\n"
10326+ " .even\n"
10327+ "6: moveq %3,%0\n"
10328+ " jra 5b\n"
10329+ ".previous\n"
10330+ ".section __ex_table,\"a\"\n"
10331+ " .align 4\n"
10332+ " .long 2b,6b\n"
10333+ " .long 22b,6b\n"
10334+ ".previous"
10335+ : "=d"(res), "=a"(src), "=d"(n)
10336+ : "i"(0), "0"(res), "1"(src), "2"(n)
10337+ : "d0");
10338+ return res;
10339+}
10340+EXPORT_SYMBOL(strnlen_user);
10341+
10342+
10343+/*
10344+ * Zero Userspace
10345+ */
10346+
10347+unsigned long __clear_user(void *to, unsigned long n)
10348+{
10349+ __asm__ __volatile__
10350+ (" tstl %1\n"
10351+ " jeq 3f\n"
10352+ "1: movel %3,(%0)+\n"
10353+ "2: subql #1,%1\n"
10354+ " jne 1b\n"
10355+ "3: movel %2,%1\n"
10356+ " bclr #1,%1\n"
10357+ " jeq 4f\n"
10358+ "24:movew %3,(%0)+\n"
10359+ "4: bclr #0,%1\n"
10360+ " jeq 5f\n"
10361+ "25:moveb %3,(%0)+\n"
10362+ "5:\n"
10363+ ".section .fixup,\"ax\"\n"
10364+ " .even\n"
10365+ "61:addql #1,%1\n"
10366+ "6: lsll #2,%1\n"
10367+ " addl %2,%1\n"
10368+ " jra 5b\n"
10369+ "7: addql #2,%1\n"
10370+ " jra 5b\n"
10371+ "8: addql #1,%1\n"
10372+ " jra 5b\n"
10373+ ".previous\n"
10374+ ".section __ex_table,\"a\"\n"
10375+ " .align 4\n"
10376+ " .long 1b,61b\n"
10377+ " .long 2b,6b\n"
10378+ " .long 3b,61b\n"
10379+ " .long 24b,7b\n"
10380+ " .long 4b,7b\n"
10381+ " .long 25b,8b\n"
10382+ " .long 5b,8b\n"
10383+ ".previous"
10384+ : "=a"(to), "=d"(n)
10385+ : "r"(n & 3), "d"(0), "0"(to), "1"(n/4));
10386+ return n;
10387+}
10388+EXPORT_SYMBOL(__clear_user);
10389+
10390+#endif /* CONFIG_COLDFIRE */
10391+
10392--- a/arch/m68k/mm/Makefile
10393+++ b/arch/m68k/mm/Makefile
10394@@ -6,3 +6,5 @@ obj-y := cache.o init.o fault.o hwtest.
10395 
10396 obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
10397 obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
10398+obj-$(CONFIG_MMU_CFV4E) += cf-mmu.o kmap.o memory.o
10399+obj-$(CONFIG_SRAM) += cf-sram.o
10400--- a/arch/m68k/mm/cache.c
10401+++ b/arch/m68k/mm/cache.c
10402@@ -4,13 +4,24 @@
10403  * Instruction cache handling
10404  *
10405  * Copyright (C) 1995 Hamish Macdonald
10406+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10407+ * Jason Jin Jason.Jin@freescale.com
10408+ * Shrek Wu B16972@freescale.com
10409+ *
10410+ * This file is subject to the terms and conditions of the GNU General Public
10411+ * License. See the file COPYING in the main directory of this archive
10412+ * for more details.
10413  */
10414 
10415 #include <linux/module.h>
10416 #include <asm/pgalloc.h>
10417 #include <asm/traps.h>
10418 
10419+#ifdef CONFIG_COLDFIRE
10420+#include <asm/cfcache.h>
10421+#endif /* CONFIG_COLDFIRE */
10422 
10423+#ifndef CONFIG_COLDFIRE
10424 static unsigned long virt_to_phys_slow(unsigned long vaddr)
10425 {
10426     if (CPU_IS_060) {
10427@@ -69,11 +80,16 @@ static unsigned long virt_to_phys_slow(u
10428     }
10429     return 0;
10430 }
10431+#endif /* CONFIG_COLDFIRE */
10432+
10433 
10434 /* Push n pages at kernel virtual address and clear the icache */
10435 /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
10436 void flush_icache_range(unsigned long address, unsigned long endaddr)
10437 {
10438+#ifdef CONFIG_COLDFIRE
10439+ flush_icache();
10440+#else /* !CONFIG_COLDFIRE */
10441 
10442     if (CPU_IS_040_OR_060) {
10443         address &= PAGE_MASK;
10444@@ -94,9 +110,11 @@ void flush_icache_range(unsigned long ad
10445                   : "=&d" (tmp)
10446                   : "di" (FLUSH_I));
10447     }
10448+#endif /* CONFIG_COLDFIRE */
10449 }
10450 EXPORT_SYMBOL(flush_icache_range);
10451 
10452+#ifndef CONFIG_COLDFIRE
10453 void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
10454                  unsigned long addr, int len)
10455 {
10456@@ -115,4 +133,5 @@ void flush_icache_user_range(struct vm_a
10457                   : "di" (FLUSH_I));
10458     }
10459 }
10460+#endif /* CONFIG_COLDFIRE */
10461 
10462--- /dev/null
10463+++ b/arch/m68k/mm/cf-mmu.c
10464@@ -0,0 +1,311 @@
10465+/*
10466+ * linux/arch/m68k/mm/cf-mmu.c
10467+ *
10468+ * Based upon linux/arch/m68k/mm/sun3mmu.c
10469+ * Based upon linux/arch/ppc/mm/mmu_context.c
10470+ *
10471+ * Implementations of mm routines specific to the Coldfire MMU.
10472+ *
10473+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10474+ * Jason Jin Jason.Jin@freescale.com
10475+ * Shrek Wu B16972@freescale.com
10476+ *
10477+ * This file is subject to the terms and conditions of the GNU General Public
10478+ * License. See the file COPYING in the main directory of this archive
10479+ * for more details.
10480+ */
10481+
10482+#include <linux/signal.h>
10483+#include <linux/sched.h>
10484+#include <linux/mm.h>
10485+#include <linux/swap.h>
10486+#include <linux/kernel.h>
10487+#include <linux/string.h>
10488+#include <linux/types.h>
10489+#include <linux/init.h>
10490+#ifdef CONFIG_BLK_DEV_RAM
10491+#include <linux/blkdev.h>
10492+#endif
10493+#include <linux/bootmem.h>
10494+
10495+#include <asm/setup.h>
10496+#include <asm/uaccess.h>
10497+#include <asm/page.h>
10498+#include <asm/pgtable.h>
10499+#include <asm/system.h>
10500+#include <asm/machdep.h>
10501+#include <asm/io.h>
10502+#include <asm/mmu_context.h>
10503+#include <asm/cf_pgalloc.h>
10504+
10505+#include <asm/coldfire.h>
10506+#include <asm/tlbflush.h>
10507+
10508+#define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END))
10509+
10510+#undef DEBUG
10511+
10512+#ifdef CONFIG_VDSO
10513+unsigned long next_mmu_context;
10514+#else
10515+mm_context_t next_mmu_context;
10516+#endif
10517+
10518+unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
10519+
10520+atomic_t nr_free_contexts;
10521+struct mm_struct *context_mm[LAST_CONTEXT+1];
10522+const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n";
10523+
10524+extern unsigned long num_pages;
10525+EXPORT_SYMBOL(num_pages);
10526+/*
10527+ * Free memory used for system initialization.
10528+ */
10529+void free_initmem(void)
10530+{
10531+#if 0
10532+ unsigned long addr;
10533+ unsigned long start = (unsigned long)&__init_begin;
10534+ unsigned long end = (unsigned long)&__init_end;
10535+
10536+ printk(KERN_INFO "free_initmem: __init_begin = 0x%lx"
10537+ " __init_end = 0x%lx\n", start, end);
10538+
10539+ addr = (unsigned long)&__init_begin;
10540+ for (; addr < (unsigned long)&__init_end; addr += PAGE_SIZE) {
10541+ /* not currently used */
10542+ virt_to_page(addr)->flags &= ~(1 << PG_reserved);
10543+ init_page_count(virt_to_page(addr));
10544+ free_page(addr);
10545+ totalram_pages++;
10546+ }
10547+#endif
10548+}
10549+
10550+/*
10551+ * Initialize the paging system.
10552+ */
10553+void __init paging_init(void)
10554+{
10555+ pgd_t *pg_dir;
10556+ pte_t *pg_table;
10557+ int i;
10558+ unsigned long address;
10559+ unsigned long next_pgtable;
10560+ unsigned long zones_size[MAX_NR_ZONES];
10561+ unsigned long size;
10562+ enum zone_type zone;
10563+
10564+ /* allocate zero page */
10565+ empty_zero_page = (void *)alloc_bootmem_pages(PAGE_SIZE);
10566+ memset((void *)empty_zero_page, 0, PAGE_SIZE);
10567+
10568+ /* zero kernel page directory */
10569+ pg_dir = swapper_pg_dir;
10570+ memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
10571+ /*
10572+ * setup page tables for PHYSRAM
10573+ */
10574+
10575+ /* starting loc in page directory */
10576+ pg_dir += PAGE_OFFSET >> PGDIR_SHIFT;
10577+
10578+ /* allocate page tables */
10579+ size = num_pages * sizeof(pte_t);
10580+ size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
10581+ next_pgtable = (unsigned long)alloc_bootmem_pages(size);
10582+ address = PAGE_OFFSET;
10583+ while (address < (unsigned long)high_memory) {
10584+ /* setup page table in page directory */
10585+ pg_table = (pte_t *)next_pgtable;
10586+ next_pgtable += PTRS_PER_PTE * sizeof(pte_t);
10587+ pgd_val(*pg_dir) = (unsigned long)pg_table;
10588+ pg_dir++;
10589+
10590+ /* create PTEs in page table */
10591+ for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) {
10592+ pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
10593+ if (address >= (unsigned long)high_memory)
10594+ pte_val(pte) = 0;
10595+
10596+ set_pte(pg_table, pte);
10597+ address += PAGE_SIZE;
10598+ }
10599+ }
10600+
10601+ /*
10602+ * setup page tables for DMA area
10603+ */
10604+
10605+ /* starting loc in page directory */
10606+ pg_dir = swapper_pg_dir;
10607+ pg_dir += CONFIG_DMA_BASE >> PGDIR_SHIFT;
10608+
10609+ /* allocate page tables */
10610+ size = (CONFIG_DMA_SIZE >> PAGE_SHIFT) * sizeof(pte_t);
10611+ size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
10612+ next_pgtable = (unsigned long)alloc_bootmem_pages(size);
10613+ address = CONFIG_DMA_BASE;
10614+ while (address < (CONFIG_DMA_BASE + CONFIG_DMA_SIZE)) {
10615+ /* setup page table in page directory */
10616+ pg_table = (pte_t *)next_pgtable;
10617+ next_pgtable += PTRS_PER_PTE * sizeof(pte_t);
10618+ pgd_val(*pg_dir) = (unsigned long)pg_table;
10619+ pg_dir++;
10620+
10621+ /* create PTEs in page table */
10622+ for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) {
10623+ pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
10624+ if (address >= (CONFIG_DMA_BASE + CONFIG_DMA_SIZE))
10625+ pte_val(pte) = 0;
10626+
10627+ set_pte(pg_table, pte);
10628+ address += PAGE_SIZE;
10629+ }
10630+ }
10631+
10632+ /*
10633+ * setup zones
10634+ */
10635+
10636+ current->mm = NULL;
10637+
10638+ /* clear zones */
10639+ for (zone = 0; zone < MAX_NR_ZONES; zone++)
10640+ zones_size[zone] = 0x0;
10641+
10642+ zones_size[ZONE_DMA] = CONFIG_DMA_SIZE >> PAGE_SHIFT;
10643+ zones_size[ZONE_NORMAL] = (((unsigned long)high_memory -
10644+ PAGE_OFFSET) >> PAGE_SHIFT) -
10645+ zones_size[ZONE_DMA];
10646+
10647+ free_area_init(zones_size);
10648+}
10649+/*
10650+ * Handle a missed TLB
10651+ */
10652+int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
10653+{
10654+ struct mm_struct *mm;
10655+ pgd_t *pgd;
10656+ pmd_t *pmd;
10657+ pte_t *pte;
10658+ unsigned long mmuar;
10659+ int asid;
10660+ unsigned long flags;
10661+
10662+ local_save_flags(flags);
10663+ local_irq_disable();
10664+
10665+ mmuar = (dtlb) ? regs->mmuar
10666+ : regs->pc + (extension_word * sizeof(long));
10667+
10668+ mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
10669+
10670+ if (!mm) {
10671+ local_irq_restore(flags);
10672+ return -1;
10673+ }
10674+
10675+ pgd = pgd_offset(mm, mmuar);
10676+ if (pgd_none(*pgd)) {
10677+ local_irq_restore(flags);
10678+ return -1;
10679+ }
10680+
10681+ pmd = pmd_offset(pgd, mmuar);
10682+ if (pmd_none(*pmd)) {
10683+ local_irq_restore(flags);
10684+ return -1;
10685+ }
10686+
10687+ pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
10688+ : pte_offset_map(pmd, mmuar);
10689+ if (pte_none(*pte) || !pte_present(*pte)) {
10690+ local_irq_restore(flags);
10691+ return -1;
10692+ }
10693+
10694+ if (write) {
10695+ if (!pte_write(*pte)) {
10696+ local_irq_restore(flags);
10697+ return -1;
10698+ }
10699+ set_pte(pte, pte_mkdirty(*pte));
10700+ }
10701+
10702+ set_pte(pte, pte_mkyoung(*pte));
10703+ asid = cpu_context(mm) & 0xff;
10704+ if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
10705+ set_pte(pte, pte_wrprotect(*pte));
10706+
10707+ *MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
10708+ | (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
10709+ >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V;
10710+
10711+ *MMUDR = (pte_val(*pte) & PAGE_MASK)
10712+ | ((pte->pte) & CF_PAGE_MMUDR_MASK)
10713+ | MMUDR_SZ8K | MMUDR_X;
10714+
10715+ if (dtlb)
10716+ *MMUOR = MMUOR_ACC | MMUOR_UAA;
10717+ else
10718+ *MMUOR = MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA;
10719+
10720+ asm("nop");
10721+
10722+#ifdef DEBUG
10723+ printk(KERN_INFO "cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
10724+ (pte_val(*pte) & PAGE_MASK));
10725+#endif
10726+ local_irq_restore(flags);
10727+ return 0;
10728+}
10729+
10730+
10731+/*
10732+ * Context Management
10733+ *
10734+ * Based on arch/ppc/mmu_context.c
10735+ */
10736+
10737+/*
10738+ * Initialize the context management system.
10739+ */
10740+void __init mmu_context_init(void)
10741+{
10742+ /*
10743+ * Some processors have too few contexts to reserve one for
10744+ * init_mm, and require using context 0 for a normal task.
10745+ * Other processors reserve the use of context zero for the kernel.
10746+ * This code assumes FIRST_CONTEXT < 32.
10747+ */
10748+ context_map[0] = (1 << FIRST_CONTEXT) - 1;
10749+ next_mmu_context = FIRST_CONTEXT;
10750+ atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
10751+}
10752+
10753+/*
10754+ * Steal a context from a task that has one at the moment.
10755+ * This is only used on 8xx and 4xx and we presently assume that
10756+ * they don't do SMP. If they do then thicfpgalloc.hs will have to check
10757+ * whether the MM we steal is in use.
10758+ * We also assume that this is only used on systems that don't
10759+ * use an MMU hash table - this is true for 8xx and 4xx.
10760+ * This isn't an LRU system, it just frees up each context in
10761+ * turn (sort-of pseudo-random replacement :). This would be the
10762+ * place to implement an LRU scheme if anyone was motivated to do it.
10763+ * -- paulus
10764+ */
10765+void steal_context(void)
10766+{
10767+ struct mm_struct *mm;
10768+ /* free up context `next_mmu_context' */
10769+ /* if we shouldn't free context 0, don't... */
10770+ if (next_mmu_context < FIRST_CONTEXT)
10771+ next_mmu_context = FIRST_CONTEXT;
10772+ mm = context_mm[next_mmu_context];
10773+ flush_tlb_mm(mm);
10774+ destroy_context(mm);
10775+}
10776--- /dev/null
10777+++ b/arch/m68k/mm/cf-sram.c
10778@@ -0,0 +1,80 @@
10779+/*
10780+ * Copyright (C) 2009-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10781+ * Author: Lanttor.Guo@freescale.com
10782+ *
10783+ * Providing on-chip SRAM allocation and free APIs to kernel
10784+ * The implemention uses gen_pool_alloc/gen_pool_free interface
10785+ *
10786+ * This program is free software; you can redistribute it and/or modify
10787+ * it under the terms of the GNU General Public License as published by
10788+ * the Free Software Foundation; either version 2 of the License, or
10789+ * (at your option) any later version.
10790+ */
10791+
10792+#include <linux/module.h>
10793+#include <linux/kernel.h>
10794+#include <linux/init.h>
10795+#include <linux/genalloc.h>
10796+
10797+/* sram memory min allocation size per once */
10798+static long blk_size = CONFIG_SRAM_ALLOC_GRANULARITY;
10799+static struct gen_pool *sram_pool;
10800+
10801+/*
10802+ * Set up memory pools to manage on-chip sram.
10803+ * @ start the start address of SRAM
10804+ * @ size the size of SRAM
10805+ * return return 0 express success
10806+ */
10807+int declare_sram_pool(void *start, size_t size)
10808+{
10809+ int status = 0;
10810+
10811+ pr_debug("%s %p %d\n", __func__, start, size);
10812+
10813+ sram_pool = gen_pool_create(ilog2(blk_size), -1);
10814+ if (!sram_pool) {
10815+ printk(KERN_ERR "gen_pool_creat faile at %s()\n", __func__);
10816+ status = -ENOMEM;
10817+ }
10818+
10819+ status = gen_pool_add(sram_pool, (unsigned long)start, size, -1);
10820+ if (status < 0)
10821+ printk(KERN_ERR "gen_pool_add failed at %s()\n", __func__);
10822+
10823+ return status;
10824+
10825+}
10826+
10827+/*
10828+ * Allocate memory from sram pool
10829+ * @ len the size of allocated memory
10830+ * return return the start addr of allocated memory
10831+ */
10832+void *sram_alloc(size_t len)
10833+{
10834+ unsigned long vaddr;
10835+
10836+ if (!len) {
10837+ printk(KERN_ERR "the len parameter of sram_alloc() is zero\n");
10838+ return NULL;
10839+ }
10840+
10841+ vaddr = gen_pool_alloc(sram_pool, len);
10842+ if (!vaddr)
10843+ return NULL;
10844+
10845+ return (void *)vaddr;
10846+}
10847+EXPORT_SYMBOL(sram_alloc);
10848+
10849+/*
10850+ * Free memory to sram pool
10851+ * @ addr the addr of allocated memory
10852+ * @ len the size of allocated memory
10853+ */
10854+void sram_free(void *addr, size_t len)
10855+{
10856+ gen_pool_free(sram_pool, (unsigned long)addr, len);
10857+}
10858+EXPORT_SYMBOL(sram_free);
10859--- a/arch/m68k/mm/hwtest.c
10860+++ b/arch/m68k/mm/hwtest.c
10861@@ -12,6 +12,14 @@
10862  * them here complete with the comments from the original atari
10863  * config.c...
10864  * -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
10865+ *
10866+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10867+ * Jason Jin Jason.Jin@freescale.com
10868+ * Shrek Wu B16972@freescale.com
10869+ *
10870+ * This file is subject to the terms and conditions of the GNU General Public
10871+ * License. See the file COPYING in the main directory of this archive
10872+ * for more details.
10873  */
10874 
10875 /* This function tests for the presence of an address, specially a
10876@@ -25,6 +33,7 @@
10877 
10878 #include <linux/module.h>
10879 
10880+#ifndef CONFIG_COLDFIRE
10881 int hwreg_present( volatile void *regp )
10882 {
10883     int ret = 0;
10884@@ -82,4 +91,5 @@ int hwreg_write( volatile void *regp, un
10885     return( ret );
10886 }
10887 EXPORT_SYMBOL(hwreg_write);
10888+#endif
10889 
10890--- a/arch/m68k/mm/init.c
10891+++ b/arch/m68k/mm/init.c
10892@@ -2,6 +2,13 @@
10893  * linux/arch/m68k/mm/init.c
10894  *
10895  * Copyright (C) 1995 Hamish Macdonald
10896+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10897+ * Jason Jin Jason.Jin@freescale.com
10898+ * Shrek Wu B16972@freescale.com
10899+ *
10900+ * This file is subject to the terms and conditions of the GNU General Public
10901+ * License. See the file COPYING in the main directory of this archive
10902+ * for more details.
10903  *
10904  * Contains common initialization routines, specific init code moved
10905  * to motorola.c and sun3mmu.c
10906@@ -32,6 +39,7 @@
10907 #include <asm/sections.h>
10908 #include <asm/tlb.h>
10909 
10910+
10911 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
10912 
10913 pg_data_t pg_data_map[MAX_NUMNODES];
10914@@ -113,7 +121,7 @@ void __init mem_init(void)
10915         }
10916     }
10917 
10918-#ifndef CONFIG_SUN3
10919+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
10920     /* insert pointer tables allocated so far into the tablelist */
10921     init_pointer_table((unsigned long)kernel_pg_dir);
10922     for (i = 0; i < PTRS_PER_PGD; i++) {
10923@@ -132,6 +140,11 @@ void __init mem_init(void)
10924            codepages << (PAGE_SHIFT-10),
10925            datapages << (PAGE_SHIFT-10),
10926            initpages << (PAGE_SHIFT-10));
10927+
10928+#ifdef CONFIG_VDSO
10929+ /* init the vdso page */
10930+ vdso_init();
10931+#endif
10932 }
10933 
10934 #ifdef CONFIG_BLK_DEV_INITRD
10935--- a/arch/m68k/mm/kmap.c
10936+++ b/arch/m68k/mm/kmap.c
10937@@ -2,6 +2,13 @@
10938  * linux/arch/m68k/mm/kmap.c
10939  *
10940  * Copyright (C) 1997 Roman Hodek
10941+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
10942+ * Jason Jin Jason.Jin@freescale.com
10943+ * Shrek Wu B16972@freescale.com
10944+ *
10945+ * This file is subject to the terms and conditions of the GNU General Public
10946+ * License. See the file COPYING in the main directory of this archive
10947+ * for more details.
10948  *
10949  * 10/01/99 cleaned up the code and changing to the same interface
10950  * used by other architectures /Roman Zippel
10951@@ -24,7 +31,11 @@
10952 
10953 #undef DEBUG
10954 
10955+#ifndef CONFIG_COLDFIRE
10956 #define PTRTREESIZE (256*1024)
10957+#else
10958+#define PTRTREESIZE PAGE_SIZE
10959+#endif
10960 
10961 /*
10962  * For 040/060 we can use the virtual memory area like other architectures,
10963@@ -50,7 +61,11 @@ static inline void free_io_area(void *ad
10964 
10965 #else
10966 
10967+#ifdef CONFIG_COLDFIRE
10968+#define IO_SIZE PAGE_SIZE
10969+#else
10970 #define IO_SIZE (256*1024)
10971+#endif
10972 
10973 static struct vm_struct *iolist;
10974 
10975@@ -126,8 +141,58 @@ void __iomem *__ioremap(unsigned long ph
10976     }
10977 #endif
10978 
10979+#ifdef CONFIG_M5445X
10980+ if (physaddr >= 0xf0000000) {
10981+ /*
10982+ * On the M5445x processors an ACR is setup to map
10983+ * the 0xF0000000 range into kernel memory as
10984+ * non-cacheable.
10985+ */
10986+ return (void __iomem *)physaddr;
10987+ }
10988+ if ((physaddr >= KMAP_START) && (physaddr <= KMAP_END)) {
10989+ /* if physaddr belongs to virtual address range for ioremap,
10990+ * then return physaddr because it has been ioremapped
10991+ */
10992+ return (void __iomem *)physaddr;
10993+ }
10994+#endif
10995+#ifdef CONFIG_M547X_8X
10996+ if (physaddr >= 0xf0000000) {
10997+ /*
10998+ * On the M547x/M548x processors an ACR is setup to map
10999+ * the 0xF0000000 range into kernel memory as
11000+ * non-cacheable.
11001+ */
11002+ return (void __iomem *)physaddr;
11003+ }
11004+
11005+ if ((physaddr >= 0xd0000000) && (physaddr + size < 0xd800ffff)) {
11006+ printk(KERN_ERR "ioremap:PCI 0x%lx,0x%lx(%d)"
11007+ " - PCI area hit\n", physaddr, size, cacheflag);
11008+ return (void *)physaddr;
11009+ }
11010+#endif
11011+#ifdef CONFIG_M5441X
11012+ if (physaddr >= 0xe0000000) {
11013+ /*
11014+ * On the M5441x processors an ACR is setup to map
11015+ * the 0xe0000000 range into kernel memory as
11016+ * non-cacheable.
11017+ */
11018+ return (void __iomem *)physaddr;
11019+ }
11020+ if ((physaddr >= KMAP_START) && (physaddr <= KMAP_END)) {
11021+ /* if physaddr belongs to virtual address range for ioremap,
11022+ * then return physaddr because it has been ioremapped
11023+ */
11024+ return (void __iomem *)physaddr;
11025+ }
11026+#endif
11027+
11028 #ifdef DEBUG
11029- printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
11030+ printk(KERN_ERR "ioremap: paddr=0x%lx,size=0x%lx(%d) - ",
11031+ physaddr, size, cacheflag);
11032 #endif
11033     /*
11034      * Mappings have to be aligned
11035@@ -146,7 +211,8 @@ void __iomem *__ioremap(unsigned long ph
11036     virtaddr = (unsigned long)area->addr;
11037     retaddr = virtaddr + offset;
11038 #ifdef DEBUG
11039- printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
11040+ printk(KERN_ERR " paddr=0x%lx,vaddr=0x%lx,retaddr=0x%lx",
11041+ physaddr, virtaddr, retaddr);
11042 #endif
11043 
11044     /*
11045@@ -171,7 +237,12 @@ void __iomem *__ioremap(unsigned long ph
11046             break;
11047         }
11048     } else {
11049+#ifndef CONFIG_COLDFIRE
11050         physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
11051+#else
11052+ physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY | \
11053+ _PAGE_READWRITE);
11054+#endif
11055         switch (cacheflag) {
11056         case IOMAP_NOCACHE_SER:
11057         case IOMAP_NOCACHE_NONSER:
11058@@ -251,6 +322,13 @@ void __iounmap(void *addr, unsigned long
11059     pmd_t *pmd_dir;
11060     pte_t *pte_dir;
11061 
11062+#ifdef CONFIG_M547X_8X
11063+ if ((addr >= (void *)0xd0000000)
11064+ && (addr + size < (void *)0xd800ffff)) {
11065+ printk(KERN_ERR "%s: PCI address\n", __func__);
11066+ return;
11067+ }
11068+#endif
11069     while ((long)size > 0) {
11070         pgd_dir = pgd_offset_k(virtaddr);
11071         if (pgd_bad(*pgd_dir)) {
11072--- a/arch/m68k/mm/memory.c
11073+++ b/arch/m68k/mm/memory.c
11074@@ -2,6 +2,13 @@
11075  * linux/arch/m68k/mm/memory.c
11076  *
11077  * Copyright (C) 1995 Hamish Macdonald
11078+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
11079+ * Jason Jin Jason.Jin@freescale.com
11080+ * Shrek Wu B16972@freescale.com
11081+ *
11082+ * This file is subject to the terms and conditions of the GNU General Public
11083+ * License. See the file COPYING in the main directory of this archive
11084+ * for more details.
11085  */
11086 
11087 #include <linux/module.h>
11088@@ -127,6 +134,7 @@ int free_pointer_table (pmd_t *ptable)
11089     return 0;
11090 }
11091 
11092+#ifndef CONFIG_COLDFIRE
11093 /* invalidate page in both caches */
11094 static inline void clear040(unsigned long paddr)
11095 {
11096@@ -173,6 +181,7 @@ static inline void pushcl040(unsigned lo
11097         clear040(paddr);
11098     local_irq_restore(flags);
11099 }
11100+#endif /* CONFIG_COLDFIRE */
11101 
11102 /*
11103  * 040: Hit every page containing an address in the range paddr..paddr+len-1.
11104@@ -203,6 +212,9 @@ static inline void pushcl040(unsigned lo
11105 
11106 void cache_clear (unsigned long paddr, int len)
11107 {
11108+#ifdef CONFIG_COLDFIRE
11109+ flush_bcache();
11110+#else
11111     if (CPU_IS_040_OR_060) {
11112     int tmp;
11113 
11114@@ -237,6 +249,7 @@ void cache_clear (unsigned long paddr, i
11115     if(mach_l2_flush)
11116     mach_l2_flush(0);
11117 #endif
11118+#endif /* CONFIG_COLDFIRE */
11119 }
11120 EXPORT_SYMBOL(cache_clear);
11121 
11122@@ -250,6 +263,9 @@ EXPORT_SYMBOL(cache_clear);
11123 
11124 void cache_push (unsigned long paddr, int len)
11125 {
11126+#ifdef CONFIG_COLDFIRE
11127+ flush_bcache();
11128+#else
11129     if (CPU_IS_040_OR_060) {
11130     int tmp = PAGE_SIZE;
11131 
11132@@ -290,6 +306,7 @@ void cache_push (unsigned long paddr, in
11133     if(mach_l2_flush)
11134     mach_l2_flush(1);
11135 #endif
11136+#endif /* CONFIG_COLDFIRE */
11137 }
11138 EXPORT_SYMBOL(cache_push);
11139 
11140--- a/fs/namespace.c
11141+++ b/fs/namespace.c
11142@@ -3,6 +3,10 @@
11143  *
11144  * (C) Copyright Al Viro 2000, 2001
11145  * Released under GPL v2.
11146+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
11147+ * Change to align on page size for coldfire
11148+ * Jason Jin Jason.Jin@freescale.com
11149+ * Shrek Wu B16972@freescale.com
11150  *
11151  * Based on code from fs/super.c, copyright Linus Torvalds and others.
11152  * Heavily rewritten.
11153@@ -2161,7 +2165,11 @@ int copy_mount_options(const void __user
11154     /* copy_from_user cannot cross TASK_SIZE ! */
11155     size = TASK_SIZE - (unsigned long)data;
11156     if (size > PAGE_SIZE)
11157+#ifndef CONFIG_COLDFIRE
11158         size = PAGE_SIZE;
11159+#else
11160+ size = PAGE_SIZE - ((unsigned long)data & ~PAGE_MASK);
11161+#endif
11162 
11163     i = size - exact_copy_from_user((void *)page, data, size);
11164     if (!i) {
11165--- a/include/linux/fsl_devices.h
11166+++ b/include/linux/fsl_devices.h
11167@@ -6,7 +6,7 @@
11168  *
11169  * Maintainer: Kumar Gala <galak@kernel.crashing.org>
11170  *
11171- * Copyright 2004 Freescale Semiconductor, Inc
11172+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
11173  *
11174  * This program is free software; you can redistribute it and/or modify it
11175  * under the terms of the GNU General Public License as published by the
11176@@ -18,7 +18,7 @@
11177 #define _FSL_DEVICE_H_
11178 
11179 #include <linux/types.h>
11180-
11181+#include <linux/interrupt.h>
11182 /*
11183  * Some conventions on how we handle peripherals on Freescale chips
11184  *
11185@@ -119,4 +119,14 @@ int fsl_deep_sleep(void);
11186 static inline int fsl_deep_sleep(void) { return 0; }
11187 #endif
11188 
11189+struct fsl_ata_platform_data {
11190+#ifdef CONFIG_FSL_PATA_USE_DMA
11191+ int udma_mask; /* UDMA modes h/w can handle */
11192+ int fifo_alarm; /* value for fifo_alarm reg */
11193+ int max_sg; /* longest sglist h/w can handle */
11194+#endif
11195+ int (*init)(struct platform_device *pdev);
11196+ void (*exit)(void);
11197+ int (*get_clk_rate)(void);
11198+};
11199 #endif /* _FSL_DEVICE_H_ */
11200

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