| 1 | From 6462d09dad154b69ea6180c0acb2d009627ff1be Mon Sep 17 00:00:00 2001 |
| 2 | From: Alison Wang <b18965@freescale.com> |
| 3 | Date: Thu, 4 Aug 2011 09:59:46 +0800 |
| 4 | Subject: [PATCH 27/52] Add RTC driver support on MCF5441x platform |
| 5 | |
| 6 | Support on-chip robust-RTC module on MCF5441x platform. |
| 7 | |
| 8 | Signed-off-by: Alison Wang <b18965@freescale.com> |
| 9 | --- |
| 10 | drivers/rtc/Kconfig | 9 + |
| 11 | drivers/rtc/Makefile | 1 + |
| 12 | drivers/rtc/rtc-m5441x.c | 638 ++++++++++++++++++++++++++++++++++++++++++++++ |
| 13 | 3 files changed, 648 insertions(+), 0 deletions(-) |
| 14 | create mode 100644 drivers/rtc/rtc-m5441x.c |
| 15 | |
| 16 | --- a/drivers/rtc/Kconfig |
| 17 | +++ b/drivers/rtc/Kconfig |
| 18 | @@ -928,6 +928,15 @@ config RTC_MCF |
| 19 | |
| 20 | If you build it as a module it will be call mcf-rtc. |
| 21 | |
| 22 | +config RTC_M5441X |
| 23 | + tristate "Freescale Coldfire M5441X platform Real Time Clock" |
| 24 | + depends on COLDFIRE |
| 25 | + help |
| 26 | + If you say yes here you will get support for the on-chip Coldfire |
| 27 | + Real-Time Clock for mcf5441x platform. |
| 28 | + |
| 29 | + If you build it as a module it will be call rtc-m5441x. |
| 30 | + |
| 31 | config RTC_DRV_PS3 |
| 32 | tristate "PS3 RTC" |
| 33 | depends on PPC_PS3 |
| 34 | --- a/drivers/rtc/Makefile |
| 35 | +++ b/drivers/rtc/Makefile |
| 36 | @@ -103,3 +103,4 @@ obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm83 |
| 37 | obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o |
| 38 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o |
| 39 | obj-$(CONFIG_RTC_MCF) += rtc-mcf.o |
| 40 | +obj-$(CONFIG_RTC_M5441X) += rtc-m5441x.o |
| 41 | --- /dev/null |
| 42 | +++ b/drivers/rtc/rtc-m5441x.c |
| 43 | @@ -0,0 +1,638 @@ |
| 44 | +/* |
| 45 | + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. |
| 46 | + * |
| 47 | + * Lanttor.Guo@freescale.com |
| 48 | + * |
| 49 | + * The code contained herein is licensed under the GNU General Public |
| 50 | + * License. You may obtain a copy of the GNU General Public License |
| 51 | + * Version 2 or later at the following locations: |
| 52 | + * |
| 53 | + * http://www.opensource.org/licenses/gpl-license.html |
| 54 | + * http://www.gnu.org/copyleft/gpl.html |
| 55 | + */ |
| 56 | + |
| 57 | +/* |
| 58 | + * Implementation based on rtc-mcf.c |
| 59 | + */ |
| 60 | + |
| 61 | +/* |
| 62 | + * RTC Real Time Clock (RTC) Driver |
| 63 | + * |
| 64 | + * @file rtc-m5441x.c |
| 65 | + * @brief Real Time Clock interface |
| 66 | + * |
| 67 | + * This file contains Real Time Clock interface for Linux. |
| 68 | + * |
| 69 | + */ |
| 70 | +#include <linux/rtc.h> |
| 71 | +#include <linux/module.h> |
| 72 | +#include <linux/fs.h> |
| 73 | +#include <linux/init.h> |
| 74 | +#include <linux/interrupt.h> |
| 75 | +#include <linux/platform_device.h> |
| 76 | +#include <linux/clk.h> |
| 77 | +#include <linux/uaccess.h> |
| 78 | +#include <asm/mcfsim.h> |
| 79 | +#include <linux/slab.h> |
| 80 | +#include <linux/io.h> |
| 81 | + |
| 82 | +#ifdef readw |
| 83 | +#undef readw |
| 84 | +#endif |
| 85 | + |
| 86 | +#ifdef writew |
| 87 | +#undef writew |
| 88 | +#endif |
| 89 | + |
| 90 | +#define readw(addr) in_be16(addr) |
| 91 | +#define writew(val, addr) out_be16((addr), (val)) |
| 92 | + |
| 93 | + |
| 94 | +#define PIT_ALL_ON (MCF_RTC_ISR_2HZ | MCF_RTC_ISR_SAM0 | MCF_RTC_ISR_SAM1 | \ |
| 95 | + MCF_RTC_ISR_SAM2 | MCF_RTC_ISR_SAM3 | MCF_RTC_ISR_SAM4 | \ |
| 96 | + MCF_RTC_ISR_SAM5 | MCF_RTC_ISR_SAM6 | MCF_RTC_ISR_SAM7) |
| 97 | + |
| 98 | +#define MAX_PIE_NUM 9 |
| 99 | +#define MAX_PIE_FREQ 512 |
| 100 | +const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = { |
| 101 | + {2, MCF_RTC_ISR_2HZ}, |
| 102 | + {4, MCF_RTC_ISR_SAM0}, |
| 103 | + {8, MCF_RTC_ISR_SAM1}, |
| 104 | + {16, MCF_RTC_ISR_SAM2}, |
| 105 | + {32, MCF_RTC_ISR_SAM3}, |
| 106 | + {64, MCF_RTC_ISR_SAM4}, |
| 107 | + {128, MCF_RTC_ISR_SAM5}, |
| 108 | + {256, MCF_RTC_ISR_SAM6}, |
| 109 | + {MAX_PIE_FREQ, MCF_RTC_ISR_SAM7}, |
| 110 | +}; |
| 111 | + |
| 112 | +/* Those are the bits from a classic RTC we want to mimic */ |
| 113 | +#define RTC_IRQF 0x80 /* any of the following 3 is active */ |
| 114 | +#define RTC_PF 0x40 /* Periodic interrupt */ |
| 115 | +#define RTC_AF 0x20 /* Alarm interrupt */ |
| 116 | +#define RTC_UF 0x10 /* Update interrupt for 1Hz RTC */ |
| 117 | + |
| 118 | +#define MCF_RTC_TIME 0 |
| 119 | +#define MCF_RTC_ALARM 1 |
| 120 | + |
| 121 | +struct rtc_plat_data { |
| 122 | + struct rtc_device *rtc; |
| 123 | + int irq; |
| 124 | + unsigned int irqen; |
| 125 | + int alrm_sec; |
| 126 | + int alrm_min; |
| 127 | + int alrm_hour; |
| 128 | + int alrm_mday; |
| 129 | +}; |
| 130 | + |
| 131 | +static const int year_cal_basic = 2112; |
| 132 | + |
| 133 | +#define RTC_VERSION "0.1" |
| 134 | + |
| 135 | +static u32 rtc_freq = 2; /* minimun value for PIE */ |
| 136 | +static unsigned long rtc_status; |
| 137 | + |
| 138 | +static struct rtc_time g_rtc_alarm = { |
| 139 | + .tm_year = 0, |
| 140 | + .tm_mon = 0, |
| 141 | + .tm_mday = 0, |
| 142 | + .tm_hour = 0, |
| 143 | + .tm_mon = 0, |
| 144 | + .tm_sec = 0, |
| 145 | +}; |
| 146 | + |
| 147 | +static DEFINE_SPINLOCK(rtc_lock); |
| 148 | + |
| 149 | + |
| 150 | +/* |
| 151 | + * This funciton is used to disable RTC register write protection |
| 152 | + */ |
| 153 | +static void disable_register_write_protection(void) |
| 154 | +{ |
| 155 | + if (readw(MCF_RTC_SR) & MCF_RTC_SR_WPE) { |
| 156 | + writew(0x0000, MCF_RTC_CR); |
| 157 | + writew(0x0001, MCF_RTC_CR); |
| 158 | + writew(0x0003, MCF_RTC_CR); |
| 159 | + writew(0x0002, MCF_RTC_CR); |
| 160 | + } |
| 161 | + |
| 162 | +} |
| 163 | + |
| 164 | +/* |
| 165 | + * This function is used to obtain the RTC time or the alarm value in |
| 166 | + * second. |
| 167 | + * |
| 168 | + * @param time_alarm use MCF_RTC_TIME for RTC time value; |
| 169 | + * MCF_RTC_ALARM for alarm value |
| 170 | + * |
| 171 | + * @return The RTC time or alarm time in second. |
| 172 | + */ |
| 173 | +static u32 get_alarm_or_time(struct device *dev, int time_alarm, |
| 174 | + struct rtc_time *tm) |
| 175 | +{ |
| 176 | + dev_dbg(dev, "debug function %s()!\n", __func__); |
| 177 | + |
| 178 | + if (time_alarm == MCF_RTC_TIME) { |
| 179 | + /*check register information */ |
| 180 | + dev_dbg(dev, "RTC_YEARMON:0x%x,RTC_DAYS:0x%x,RTC_HOURMIN:0x%x," |
| 181 | + "RTC_SECONDS:0x%x\n", readw(MCF_RTC_YEARMON), |
| 182 | + readw(MCF_RTC_DAYS), readw(MCF_RTC_HOURMIN), |
| 183 | + readw(MCF_RTC_SECONDS)); |
| 184 | + |
| 185 | + /* get year */ |
| 186 | + tm->tm_year = year_cal_basic + |
| 187 | + (char)(MCF_RTC_YEARMON_YEAR_RD(readw(MCF_RTC_YEARMON))); |
| 188 | + /* get month */ |
| 189 | + tm->tm_mon = |
| 190 | + MCF_RTC_YEARMON_MON_RD(readw(MCF_RTC_YEARMON)) - 1; |
| 191 | + /* get month day */ |
| 192 | + tm->tm_mday = MCF_RTC_DAYS_DAY_RD(readw(MCF_RTC_DAYS)); |
| 193 | + /* get year day */ |
| 194 | + tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, |
| 195 | + tm->tm_year); |
| 196 | + /* year minus 1900 */ |
| 197 | + tm->tm_year = tm->tm_year - 1900; |
| 198 | + /* get week day */ |
| 199 | + tm->tm_wday = MCF_RTC_DAYS_DAYWEEK_RD(readw(MCF_RTC_DAYS)); |
| 200 | + /* get hours */ |
| 201 | + tm->tm_hour = |
| 202 | + MCF_RTC_HOURMIN_HOURS_RD(readw(MCF_RTC_HOURMIN)); |
| 203 | + /* get minutes */ |
| 204 | + tm->tm_min = |
| 205 | + MCF_RTC_HOURMIN_MINUTES_RD(readw(MCF_RTC_HOURMIN)); |
| 206 | + /* get seconds */ |
| 207 | + tm->tm_sec = |
| 208 | + MCF_RTC_SECONDS_SECONDS_RD(readw(MCF_RTC_SECONDS)); |
| 209 | + /* no day saving time */ |
| 210 | + tm->tm_isdst = -1; |
| 211 | + |
| 212 | + /* check rtc_tm fileds information */ |
| 213 | + dev_dbg(dev, "RTC TIME --> year:%d,yday:%d,mon:%d,mday:%d," |
| 214 | + "wday:%d,hour:%d,min:%d,sec:%d\n", tm->tm_year, |
| 215 | + tm->tm_yday, tm->tm_mon, tm->tm_mday, tm->tm_wday, |
| 216 | + tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 217 | + |
| 218 | + } else if (time_alarm == MCF_RTC_ALARM) { |
| 219 | + tm->tm_year = year_cal_basic + |
| 220 | + (char)MCF_RTC_YEARMON_YEAR_RD |
| 221 | + (readw(MCF_RTC_ALRM_YRMON)); |
| 222 | + tm->tm_mon = |
| 223 | + MCF_RTC_YEARMON_MON_RD(readw(MCF_RTC_ALRM_YRMON)) - 1; |
| 224 | + tm->tm_mday = MCF_RTC_DAYS_DAY_RD(readw(MCF_RTC_ALRM_DAYS)); |
| 225 | + tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, |
| 226 | + tm->tm_year); |
| 227 | + tm->tm_year = tm->tm_year - 1900; |
| 228 | + tm->tm_wday = |
| 229 | + MCF_RTC_DAYS_DAYWEEK_RD(readw(MCF_RTC_ALRM_DAYS)); |
| 230 | + tm->tm_hour = |
| 231 | + MCF_RTC_HOURMIN_HOURS_RD(readw(MCF_RTC_ALRM_HM)); |
| 232 | + tm->tm_min = |
| 233 | + MCF_RTC_HOURMIN_MINUTES_RD(readw(MCF_RTC_ALRM_HM)); |
| 234 | + tm->tm_sec = |
| 235 | + MCF_RTC_SECONDS_SECONDS_RD(readw(MCF_RTC_ALRM_SEC)); |
| 236 | + tm->tm_isdst = -1; |
| 237 | + |
| 238 | + /* debug information */ |
| 239 | + dev_dbg(dev, "RTC ALARM --> year:%d,yday:%d,mon:%d,mday:%d," |
| 240 | + "wday:%d,hour:%d,min:%d,sec:%d\n", tm->tm_year, |
| 241 | + tm->tm_yday, tm->tm_mon, tm->tm_mday, tm->tm_wday, |
| 242 | + tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 243 | + |
| 244 | + } else { |
| 245 | + panic("wrong value for time_alarm=%d\n", time_alarm); |
| 246 | + } |
| 247 | + |
| 248 | + return 0; |
| 249 | +} |
| 250 | + |
| 251 | +/* |
| 252 | + * This function sets the RTC alarm value or the time value. |
| 253 | + * |
| 254 | + * @param time_alarm the new alarm value to be updated in the RTC |
| 255 | + * @param time use MCF_RTC_TIME for RTC time value; |
| 256 | + * MCF_RTC_ALARM for alarm value |
| 257 | + */ |
| 258 | +static void set_alarm_or_time(struct device *dev, int time_alarm, |
| 259 | + struct rtc_time *tm) |
| 260 | +{ |
| 261 | + char year; |
| 262 | + |
| 263 | + dev_dbg(dev, "debug function %s()!\n", __func__); |
| 264 | + |
| 265 | + /* wirte enable setting */ |
| 266 | + disable_register_write_protection(); |
| 267 | + |
| 268 | + if (time_alarm == MCF_RTC_TIME) { |
| 269 | + /* check rtc_time fields information */ |
| 270 | + dev_dbg(dev, "RTC TIME --> year:%d,yday:%d,mon:%d,mday:%d," |
| 271 | + "wday:%d,hour:%d,min:%d,sec:%d\n", tm->tm_year, |
| 272 | + tm->tm_yday, tm->tm_mon, tm->tm_mday, tm->tm_wday, |
| 273 | + tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 274 | + |
| 275 | + year = ((tm->tm_year + 1900) - year_cal_basic); |
| 276 | + /* write RTC_YEARMON register */ |
| 277 | + writew((year << 8) | (tm->tm_mon + 1), MCF_RTC_YEARMON); |
| 278 | + |
| 279 | + /* write RTC_DAYS register */ |
| 280 | + writew(MCF_RTC_DAYS_DAYWEEK_SET(tm->tm_wday) | |
| 281 | + MCF_RTC_DAYS_DAY_SET(tm->tm_mday), MCF_RTC_DAYS); |
| 282 | + |
| 283 | + /* write RTC_HOURMIN register */ |
| 284 | + writew(MCF_RTC_HOURMIN_HOURS_SET(tm->tm_hour) | |
| 285 | + MCF_RTC_HOURMIN_MINUTES_SET(tm->tm_min), |
| 286 | + MCF_RTC_HOURMIN); |
| 287 | + |
| 288 | + /* write RTC_SECONDS register */ |
| 289 | + writew(MCF_RTC_SECONDS_SECONDS_SET |
| 290 | + (tm->tm_sec), MCF_RTC_SECONDS); |
| 291 | + |
| 292 | + /* debug information */ |
| 293 | + dev_dbg(dev, "RTC_YEARMON:0x%x, RTC_DAYS:0x%x, " |
| 294 | + "RTC_HOURMIN:0x%x, RTC_SECONDS:0x%x\n", |
| 295 | + readw(MCF_RTC_YEARMON), readw(MCF_RTC_DAYS), |
| 296 | + readw(MCF_RTC_HOURMIN), readw(MCF_RTC_SECONDS)); |
| 297 | + } else if (time_alarm == MCF_RTC_ALARM) { |
| 298 | + |
| 299 | + year = ((tm->tm_year + 1900) - year_cal_basic); |
| 300 | + /* write RTC_YEARMON register */ |
| 301 | + writew((year << 8) | (tm->tm_mon + 1), MCF_RTC_ALRM_YRMON); |
| 302 | + |
| 303 | + /* write RTC_DAYS register */ |
| 304 | + writew(MCF_RTC_DAYS_DAYWEEK_SET(tm->tm_wday) | |
| 305 | + MCF_RTC_DAYS_DAY_SET(tm->tm_mday), MCF_RTC_ALRM_DAYS); |
| 306 | + |
| 307 | + /* write RTC_HOURMIN register */ |
| 308 | + writew(MCF_RTC_HOURMIN_HOURS_SET(tm->tm_hour) | |
| 309 | + MCF_RTC_HOURMIN_MINUTES_SET(tm->tm_min), |
| 310 | + MCF_RTC_ALRM_HM); |
| 311 | + |
| 312 | + /* write RTC_SECONDS register */ |
| 313 | + writew(MCF_RTC_SECONDS_SECONDS_SET |
| 314 | + (tm->tm_sec), MCF_RTC_ALRM_SEC); |
| 315 | + |
| 316 | + /* debug information */ |
| 317 | + dev_dbg(dev, "ALRM_YRMON:0x%x,ALRM_DAYS:0x%x,ALRM_HM:0x%x," |
| 318 | + "ALRM_SEC:0x%x\n", readw(MCF_RTC_ALRM_YRMON), |
| 319 | + readw(MCF_RTC_ALRM_DAYS), readw(MCF_RTC_ALRM_HM), |
| 320 | + readw(MCF_RTC_ALRM_SEC)); |
| 321 | + } else { |
| 322 | + panic("wrong value for time_alarm=%d\n", time_alarm); |
| 323 | + } |
| 324 | +} |
| 325 | + |
| 326 | +/*! |
| 327 | + * This function updates the RTC alarm registers and then clears all the |
| 328 | + * interrupt status bits. |
| 329 | + * |
| 330 | + * @param alrm the new alarm value to be updated in the RTC |
| 331 | + * |
| 332 | + * @return 0 if successful; non-zero otherwise. |
| 333 | + */ |
| 334 | +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm) |
| 335 | +{ |
| 336 | + /* clear all the interrupt status bits */ |
| 337 | + disable_register_write_protection(); |
| 338 | + |
| 339 | + writew(readw(MCF_RTC_ISR), MCF_RTC_ISR); |
| 340 | + |
| 341 | + set_alarm_or_time(dev, MCF_RTC_ALARM, alrm); |
| 342 | + |
| 343 | + return 0; |
| 344 | +} |
| 345 | + |
| 346 | +/*! |
| 347 | + * This function is the RTC interrupt service routine. |
| 348 | + * |
| 349 | + * @param irq RTC IRQ number |
| 350 | + * @param dev_id device ID which is not used |
| 351 | + * |
| 352 | + * @return IRQ_HANDLED as defined in the include/linux/interrupt.h file. |
| 353 | + */ |
| 354 | +static irqreturn_t mcf_rtc_interrupt(int irq, void *dev_id) |
| 355 | +{ |
| 356 | + struct platform_device *pdev = dev_id; |
| 357 | + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
| 358 | + u16 status = 0; |
| 359 | + u32 events = 0; |
| 360 | + |
| 361 | + spin_lock(&rtc_lock); |
| 362 | + |
| 363 | + /* clear interrupt sources */ |
| 364 | + status = readw(MCF_RTC_ISR) & readw(MCF_RTC_IER); |
| 365 | + |
| 366 | + disable_register_write_protection(); |
| 367 | + |
| 368 | + writew(status, MCF_RTC_ISR); |
| 369 | + |
| 370 | + /* clear alarm interrupt if it has occurred */ |
| 371 | + if (status & MCF_RTC_ISR_ALM) |
| 372 | + status &= ~MCF_RTC_ISR_ALM; |
| 373 | + |
| 374 | + /* update irq data & counter */ |
| 375 | + if (status & MCF_RTC_ISR_ALM) |
| 376 | + events |= (RTC_AF | RTC_IRQF); |
| 377 | + if (status & MCF_RTC_ISR_1HZ) |
| 378 | + events |= (RTC_UF | RTC_IRQF); |
| 379 | + if (status & PIT_ALL_ON) |
| 380 | + events |= (RTC_PF | RTC_IRQF); |
| 381 | + |
| 382 | + if ((status & MCF_RTC_ISR_ALM) && rtc_valid_tm(&g_rtc_alarm)) |
| 383 | + rtc_update_alarm(&pdev->dev, &g_rtc_alarm); |
| 384 | + |
| 385 | + spin_unlock(&rtc_lock); |
| 386 | + rtc_update_irq(pdata->rtc, 1, events); |
| 387 | + return IRQ_HANDLED; |
| 388 | +} |
| 389 | + |
| 390 | +/*! |
| 391 | + * clear all interrupts and release the IRQ |
| 392 | + */ |
| 393 | +static void mcf_rtc_release(struct device *dev) |
| 394 | +{ |
| 395 | + spin_lock_irq(&rtc_lock); |
| 396 | + |
| 397 | + disable_register_write_protection(); |
| 398 | + |
| 399 | + writew(0, MCF_RTC_IER); /* Disable all rtc interrupts */ |
| 400 | + writew(readw(MCF_RTC_ISR), MCF_RTC_ISR); |
| 401 | + spin_unlock_irq(&rtc_lock); |
| 402 | + rtc_status = 0; |
| 403 | +} |
| 404 | + |
| 405 | +/*! |
| 406 | + * This function is used to support some ioctl calls directly. |
| 407 | + * Other ioctl calls are supported indirectly through the |
| 408 | + * arm/common/rtctime.c file. |
| 409 | + * |
| 410 | + * @param cmd ioctl command as defined in include/linux/rtc.h |
| 411 | + * @param arg value for the ioctl command |
| 412 | + * |
| 413 | + * @return 0 if successful or negative value otherwise. |
| 414 | + */ |
| 415 | +static int mcf_rtc_ioctl(struct device *dev, unsigned int cmd, |
| 416 | + unsigned long arg) |
| 417 | +{ |
| 418 | + int i; |
| 419 | + |
| 420 | + disable_register_write_protection(); |
| 421 | + |
| 422 | + switch (cmd) { |
| 423 | + case RTC_PIE_OFF: |
| 424 | + writew((readw(MCF_RTC_IER) & ~PIT_ALL_ON), MCF_RTC_IER); |
| 425 | + return 0; |
| 426 | + case RTC_IRQP_SET: |
| 427 | + if (arg < 2 || arg > MAX_PIE_FREQ || (arg % 2) != 0) |
| 428 | + return -EINVAL; /* Also make sure a power of 2Hz */ |
| 429 | + if ((arg > 64) && (!capable(CAP_SYS_RESOURCE))) |
| 430 | + return -EACCES; |
| 431 | + rtc_freq = arg; |
| 432 | + return 0; |
| 433 | + case RTC_IRQP_READ: |
| 434 | + return put_user(rtc_freq, (u32 *) arg); |
| 435 | + case RTC_PIE_ON: |
| 436 | + for (i = 0; i < MAX_PIE_NUM; i++) { |
| 437 | + if (PIE_BIT_DEF[i][0] == rtc_freq) |
| 438 | + break; |
| 439 | + } |
| 440 | + if (i == MAX_PIE_NUM) |
| 441 | + return -EACCES; |
| 442 | + spin_lock_irq(&rtc_lock); |
| 443 | + writew((readw(MCF_RTC_IER) | PIE_BIT_DEF[i][1]), MCF_RTC_IER); |
| 444 | + spin_unlock_irq(&rtc_lock); |
| 445 | + return 0; |
| 446 | + case RTC_AIE_OFF: |
| 447 | + spin_lock_irq(&rtc_lock); |
| 448 | + writew((readw(MCF_RTC_IER) & ~MCF_RTC_ISR_ALM), MCF_RTC_IER); |
| 449 | + spin_unlock_irq(&rtc_lock); |
| 450 | + return 0; |
| 451 | + |
| 452 | + case RTC_AIE_ON: |
| 453 | + spin_lock_irq(&rtc_lock); |
| 454 | + writew((readw(MCF_RTC_IER) | MCF_RTC_ISR_ALM), MCF_RTC_IER); |
| 455 | + spin_unlock_irq(&rtc_lock); |
| 456 | + return 0; |
| 457 | + |
| 458 | + case RTC_UIE_OFF: /* UIE is for the 1Hz interrupt */ |
| 459 | + spin_lock_irq(&rtc_lock); |
| 460 | + writew((readw(MCF_RTC_IER) & ~MCF_RTC_ISR_1HZ), MCF_RTC_IER); |
| 461 | + spin_unlock_irq(&rtc_lock); |
| 462 | + return 0; |
| 463 | + |
| 464 | + case RTC_UIE_ON: |
| 465 | + spin_lock_irq(&rtc_lock); |
| 466 | + writew((readw(MCF_RTC_IER) | MCF_RTC_ISR_1HZ), MCF_RTC_IER); |
| 467 | + spin_unlock_irq(&rtc_lock); |
| 468 | + return 0; |
| 469 | + } |
| 470 | + return -ENOIOCTLCMD; |
| 471 | +} |
| 472 | + |
| 473 | +/*! |
| 474 | + * This function reads the current RTC time into tm in Gregorian date. |
| 475 | + * |
| 476 | + * @param tm contains the RTC time value upon return |
| 477 | + * |
| 478 | + * @return 0 if successful; non-zero otherwise. |
| 479 | + */ |
| 480 | +static int mcf_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 481 | +{ |
| 482 | + do { |
| 483 | + get_alarm_or_time(dev, MCF_RTC_TIME, tm); |
| 484 | + } while (0); |
| 485 | + |
| 486 | + return 0; |
| 487 | +} |
| 488 | + |
| 489 | +/*! |
| 490 | + * This function sets the internal RTC time based on tm in Gregorian date. |
| 491 | + * |
| 492 | + * @param tm the time value to be set in the RTC |
| 493 | + * |
| 494 | + * @return 0 if successful; non-zero otherwise. |
| 495 | + */ |
| 496 | +static int mcf_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 497 | +{ |
| 498 | + do { |
| 499 | + set_alarm_or_time(dev, MCF_RTC_TIME, tm); |
| 500 | + } while (0); |
| 501 | + |
| 502 | + return 0; |
| 503 | +} |
| 504 | + |
| 505 | +/*! |
| 506 | + * This function reads the current alarm value into the passed in \b alrm |
| 507 | + * argument. It updates the \b alrm's pending field value based on the whether |
| 508 | + * an alarm interrupt occurs or not. |
| 509 | + * |
| 510 | + * @param alrm contains the RTC alarm value upon return |
| 511 | + * |
| 512 | + * @return 0 if successful; non-zero otherwise. |
| 513 | + */ |
| 514 | +static int mcf_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 515 | +{ |
| 516 | + do { |
| 517 | + get_alarm_or_time(dev, MCF_RTC_ALARM, &alrm->time); |
| 518 | + } while (0); |
| 519 | + |
| 520 | + alrm->pending = ((readw(MCF_RTC_ISR) & MCF_RTC_ISR_ALM) != 0) ? 1 : 0; |
| 521 | + |
| 522 | + return 0; |
| 523 | +} |
| 524 | + |
| 525 | +/*! |
| 526 | + * This function sets the RTC alarm based on passed in alrm. |
| 527 | + * |
| 528 | + * @param alrm the alarm value to be set in the RTC |
| 529 | + * |
| 530 | + * @return 0 if successful; non-zero otherwise. |
| 531 | + */ |
| 532 | +static int mcf_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 533 | +{ |
| 534 | + int ret; |
| 535 | + |
| 536 | + spin_lock_irq(&rtc_lock); |
| 537 | + |
| 538 | + disable_register_write_protection(); |
| 539 | + |
| 540 | + if (rtc_valid_tm(&alrm->time)) { |
| 541 | + if (alrm->time.tm_sec > 59 || |
| 542 | + alrm->time.tm_hour > 23 || alrm->time.tm_min > 59) { |
| 543 | + ret = -EINVAL; |
| 544 | + goto out; |
| 545 | + } |
| 546 | + ret = rtc_update_alarm(dev, &alrm->time); |
| 547 | + } else { |
| 548 | + ret = rtc_valid_tm(&alrm->time); |
| 549 | + if (ret) |
| 550 | + goto out; |
| 551 | + ret = rtc_update_alarm(dev, &alrm->time); |
| 552 | + } |
| 553 | + |
| 554 | + if (ret == 0) { |
| 555 | + memcpy(&g_rtc_alarm, &alrm->time, sizeof(struct rtc_time)); |
| 556 | + |
| 557 | + if (alrm->enabled) { |
| 558 | + writew((readw(MCF_RTC_IER) | MCF_RTC_ISR_ALM), |
| 559 | + MCF_RTC_IER); |
| 560 | + } else { |
| 561 | + writew((readw(MCF_RTC_IER) & ~MCF_RTC_ISR_ALM), |
| 562 | + MCF_RTC_IER); |
| 563 | + } |
| 564 | + } |
| 565 | +out: |
| 566 | + spin_unlock_irq(&rtc_lock); |
| 567 | + |
| 568 | + return ret; |
| 569 | +} |
| 570 | + |
| 571 | +/*! |
| 572 | + * The RTC driver structure |
| 573 | + */ |
| 574 | +static struct rtc_class_ops mcf_rtc_ops = { |
| 575 | + .ioctl = mcf_rtc_ioctl, |
| 576 | + .read_time = mcf_rtc_read_time, |
| 577 | + .set_time = mcf_rtc_set_time, |
| 578 | + .read_alarm = mcf_rtc_read_alarm, |
| 579 | + .set_alarm = mcf_rtc_set_alarm, |
| 580 | +}; |
| 581 | + |
| 582 | +static int __devinit mcf_rtc_probe(struct platform_device *pdev) |
| 583 | +{ |
| 584 | + struct rtc_device *rtc; |
| 585 | + struct rtc_plat_data *pdata = NULL; |
| 586 | + u32 ret = 0; |
| 587 | + |
| 588 | + disable_register_write_protection(); |
| 589 | + /* Clear interrupt before request irq */ |
| 590 | + writew(0x0100, MCF_RTC_CR); |
| 591 | + writew(0x0001, MCF_RTC_IER); |
| 592 | + |
| 593 | + if (!(readw(MCF_RTC_CFG_DATA) & MCF_RTC_CFG_DATA_OSCEN)) |
| 594 | + writew(MCF_RTC_CFG_DATA_OSCEN, MCF_RTC_CFG_DATA); |
| 595 | + |
| 596 | + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); |
| 597 | + if (!pdata) |
| 598 | + return -ENOMEM; |
| 599 | + |
| 600 | + pdata->irq = MCFINT_VECBASE + MCFINT_RTC; |
| 601 | + if (request_irq(pdata->irq, mcf_rtc_interrupt, IRQF_DISABLED, |
| 602 | + pdev->name, pdev) < 0) { |
| 603 | + dev_warn(&pdev->dev, "interrupt not available.\n"); |
| 604 | + pdata->irq = -1; |
| 605 | + } |
| 606 | + |
| 607 | + if (test_and_set_bit(1, &rtc_status)) |
| 608 | + return -EBUSY; |
| 609 | + |
| 610 | + rtc = rtc_device_register(pdev->name, &pdev->dev, &mcf_rtc_ops, |
| 611 | + THIS_MODULE); |
| 612 | + if (IS_ERR(rtc)) { |
| 613 | + ret = PTR_ERR(rtc); |
| 614 | + if (pdata->irq >= 0) |
| 615 | + free_irq(pdata->irq, pdev); |
| 616 | + kfree(pdata); |
| 617 | + return ret; |
| 618 | + } |
| 619 | + pdata->rtc = rtc; |
| 620 | + platform_set_drvdata(pdev, pdata); |
| 621 | + |
| 622 | + dev_dbg(&pdev->dev, "RTC_CR:0x%x, RTC_SR:0x%x\n", readw(MCF_RTC_CR), |
| 623 | + readw(MCF_RTC_SR)); |
| 624 | + |
| 625 | + printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION); |
| 626 | + return ret; |
| 627 | +} |
| 628 | + |
| 629 | +static int __devexit mcf_rtc_remove(struct platform_device *pdev) |
| 630 | +{ |
| 631 | + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
| 632 | + |
| 633 | + rtc_device_unregister(pdata->rtc); |
| 634 | + if (pdata->irq >= 0) |
| 635 | + free_irq(pdata->irq, pdev); |
| 636 | + kfree(pdata); |
| 637 | + mcf_rtc_release(NULL); |
| 638 | + return 0; |
| 639 | +} |
| 640 | + |
| 641 | +/*! |
| 642 | + * Contains pointers to the power management callback functions. |
| 643 | + */ |
| 644 | +MODULE_ALIAS("rtc-m5441x"); |
| 645 | +static struct platform_driver mcf_rtc_driver = { |
| 646 | + .driver = { |
| 647 | + .name = "rtc-m5441x", |
| 648 | + .owner = THIS_MODULE, |
| 649 | + }, |
| 650 | + .probe = mcf_rtc_probe, |
| 651 | + .remove = __devexit_p(mcf_rtc_remove), |
| 652 | +}; |
| 653 | + |
| 654 | +/*! |
| 655 | + * This function creates the /proc/driver/rtc file and registers the device RTC |
| 656 | + * in the /dev/misc directory. It also reads the RTC value from external source |
| 657 | + * and setup the internal RTC properly. |
| 658 | + * |
| 659 | + * @return -1 if RTC is failed to initialize; 0 is successful. |
| 660 | + */ |
| 661 | +static int __init mcf_rtc_init(void) |
| 662 | +{ |
| 663 | + return platform_driver_register(&mcf_rtc_driver); |
| 664 | +} |
| 665 | + |
| 666 | +/*! |
| 667 | + * This function removes the /proc/driver/rtc file and un-registers the |
| 668 | + * device RTC from the /dev/misc directory. |
| 669 | + */ |
| 670 | +static void __exit mcf_rtc_exit(void) |
| 671 | +{ |
| 672 | + platform_driver_unregister(&mcf_rtc_driver); |
| 673 | + |
| 674 | +} |
| 675 | + |
| 676 | +module_init(mcf_rtc_init); |
| 677 | +module_exit(mcf_rtc_exit); |
| 678 | + |
| 679 | +MODULE_AUTHOR("Freescale Semiconductor, Inc."); |
| 680 | +MODULE_DESCRIPTION("Real Time Clock Driver (MCF)"); |
| 681 | +MODULE_LICENSE("GPL V2"); |
| 682 | |