| 1 | /************************************************************************ |
| 2 | * |
| 3 | * Copyright (c) 2007 |
| 4 | * Infineon Technologies AG |
| 5 | * St. Martin Strasse 53; 81669 Muenchen; Germany |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | * |
| 12 | ************************************************************************/ |
| 13 | |
| 14 | #ifndef __SVIP_MUX_H |
| 15 | #define __SVIP_MUX_H |
| 16 | |
| 17 | #define LTQ_MUX_P0_PINS 20 |
| 18 | #define LTQ_MUX_P1_PINS 20 |
| 19 | #define LTQ_MUX_P2_PINS 19 |
| 20 | #define LTQ_MUX_P3_PINS 20 |
| 21 | #define LTQ_MUX_P4_PINS 24 |
| 22 | |
| 23 | struct ltq_mux_pin { |
| 24 | int dirin; |
| 25 | int puen; |
| 26 | int altsel0; |
| 27 | int altsel1; |
| 28 | }; |
| 29 | |
| 30 | struct ltq_mux_settings { |
| 31 | const struct ltq_mux_pin *mux_p0; |
| 32 | const struct ltq_mux_pin *mux_p1; |
| 33 | const struct ltq_mux_pin *mux_p2; |
| 34 | const struct ltq_mux_pin *mux_p3; |
| 35 | const struct ltq_mux_pin *mux_p4; |
| 36 | }; |
| 37 | |
| 38 | #define LTQ_MUX_P0_19_EXINT16 { 1, 0, 1, 0 } |
| 39 | #define LTQ_MUX_P0_19 { 0, 0, 1, 0 } |
| 40 | |
| 41 | #define LTQ_MUX_P0_18_EJ_BRKIN { 1, 0, 0, 0 } |
| 42 | #define LTQ_MUX_P0_18 { 0, 0, 1, 0 } |
| 43 | #define LTQ_MUX_P0_18_IN { 1, 0, 1, 0 } |
| 44 | |
| 45 | #define LTQ_MUX_P0_17_EXINT10 { 1, 0, 0, 0 } |
| 46 | #define LTQ_MUX_P0_17 { 0, 0, 0, 0 } |
| 47 | #define LTQ_MUX_P0_17_ASC1_RXD { 1, 0, 1, 0 } |
| 48 | |
| 49 | #define LTQ_MUX_P0_16_EXINT9 { 1, 0, 0, 0 } |
| 50 | #define LTQ_MUX_P0_16 { 0, 0, 0, 0 } |
| 51 | #define LTQ_MUX_P0_16_ASC1_TXD { 0, 0, 1, 0 } |
| 52 | |
| 53 | #define LTQ_MUX_P0_15_EXINT8 { 1, 0, 0, 0 } |
| 54 | #define LTQ_MUX_P0_15 { 0, 0, 0, 0 } |
| 55 | #define LTQ_MUX_P0_15_ASC0_RXD { 1, 0, 1, 0 } |
| 56 | |
| 57 | #define LTQ_MUX_P0_14_EXINT7 { 1, 0, 0, 0 } |
| 58 | #define LTQ_MUX_P0_14 { 0, 0, 0, 0 } |
| 59 | #define LTQ_MUX_P0_14_ASC0_TXD { 1, 0, 1, 0 } |
| 60 | |
| 61 | #define LTQ_MUX_P0_13_SSC0_CS7 { 0, 1, 0, 0 } |
| 62 | #define LTQ_MUX_P0_13_EXINT6 { 0, 0, 1, 0 } |
| 63 | #define LTQ_MUX_P0_13 { 1, 0, 1, 0 } |
| 64 | #define LTQ_MUX_P0_13_SSC1_CS7 { 0, 0, 0, 1 } |
| 65 | #define LTQ_MUX_P0_13_SSC1_INT { 0, 0, 1, 1 } |
| 66 | |
| 67 | #define LTQ_MUX_P0_12_SSC0_CS6 { 0, 1, 0, 0 } |
| 68 | #define LTQ_MUX_P0_12_EXINT5 { 0, 0, 1, 0 } |
| 69 | #define LTQ_MUX_P0_12 { 1, 0, 1, 0 } |
| 70 | #define LTQ_MUX_P0_12_SSC1_CS6 { 0, 0, 0, 1 } |
| 71 | |
| 72 | #define LTQ_MUX_P0_11_SSC0_CS5 { 0, 1, 0, 0 } |
| 73 | #define LTQ_MUX_P0_11_EXINT4 { 1, 0, 1, 0 } |
| 74 | #define LTQ_MUX_P0_11 { 1, 0, 0, 0 } |
| 75 | #define LTQ_MUX_P0_11_SSC1_CS5 { 0, 0, 0, 1 } |
| 76 | |
| 77 | #define LTQ_MUX_P0_10_SSC0_CS4 { 0, 1, 0, 0 } |
| 78 | #define LTQ_MUX_P0_10_EXINT3 { 1, 0, 1, 0 } |
| 79 | #define LTQ_MUX_P0_10 { 0, 0, 1, 0 } |
| 80 | #define LTQ_MUX_P0_10_SSC1_CS4 { 0, 0, 0, 1 } |
| 81 | |
| 82 | #define LTQ_MUX_P0_9_SSC0_CS3 { 0, 1, 0, 0 } |
| 83 | #define LTQ_MUX_P0_9_EXINT2 { 1, 0, 1, 0 } |
| 84 | #define LTQ_MUX_P0_9 { 0, 0, 1, 0 } |
| 85 | #define LTQ_MUX_P0_9_SSC1_CS3 { 0, 0, 0, 1 } |
| 86 | |
| 87 | #define LTQ_MUX_P0_8_SSC0_CS2 { 0, 1, 0, 0 } |
| 88 | #define LTQ_MUX_P0_8_EXINT1 { 1, 0, 1, 0 } |
| 89 | #define LTQ_MUX_P0_8 { 0, 0, 1, 0 } |
| 90 | #define LTQ_MUX_P0_8_SSC1_CS2 { 0, 0, 0, 1 } |
| 91 | |
| 92 | #define LTQ_MUX_P0_7_SSC0_CS1 { 0, 1, 0, 0 } |
| 93 | #define LTQ_MUX_P0_7_EXINT0 { 1, 0, 1, 0 } |
| 94 | #define LTQ_MUX_P0_7 { 0, 0, 1, 0 } |
| 95 | #define LTQ_MUX_P0_7_SSC1_CS1 { 0, 0, 0, 1 } |
| 96 | #define LTQ_MUX_P0_7_SSC1_CS0 { 1, 0, 0, 1 } |
| 97 | #define LTQ_MUX_P0_7_SSC2_CS0 { 1, 0, 1, 1 } |
| 98 | |
| 99 | #define LTQ_MUX_P0_6_SSC0_CS0 { 0, 1, 0, 0 } |
| 100 | #define LTQ_MUX_P0_6 { 0, 0, 1, 0 } |
| 101 | #define LTQ_MUX_P0_6_IN { 1, 0, 1, 0 } |
| 102 | #define LTQ_MUX_P0_6_SSC1_CS0 { 0, 0, 0, 1 } |
| 103 | |
| 104 | #define LTQ_MUX_P0_5_SSC1_SCLK { 0, 0, 0, 0 } |
| 105 | #define LTQ_MUX_P0_5 { 0, 0, 1, 0 } |
| 106 | #define LTQ_MUX_P0_5_IN { 1, 0, 1, 0 } |
| 107 | #define LTQ_MUX_P0_5_SSC2_CLK { 1, 0, 0, 1 } |
| 108 | |
| 109 | #define LTQ_MUX_P0_4_SSC1_MRST { 1, 0, 0, 0 } |
| 110 | #define LTQ_MUX_P0_4 { 0, 0, 1, 0 } |
| 111 | #define LTQ_MUX_P0_4_IN { 1, 0, 1, 0 } |
| 112 | #define LTQ_MUX_P0_4_SSC2_MRST { 0, 0, 0, 1 } |
| 113 | |
| 114 | #define LTQ_MUX_P0_3_SSC1_MTSR { 0, 0, 0, 0 } |
| 115 | #define LTQ_MUX_P0_3 { 0, 0, 1, 0 } |
| 116 | #define LTQ_MUX_P0_3_IN { 1, 0, 1, 0 } |
| 117 | #define LTQ_MUX_P0_3_SSC2_MTSR { 0, 0, 0, 1 } |
| 118 | |
| 119 | #define LTQ_MUX_P0_2_SSC0_SCLK { 0, 0, 0, 0 } |
| 120 | #define LTQ_MUX_P0_2 { 0, 0, 1, 0 } |
| 121 | #define LTQ_MUX_P0_2_IN { 1, 0, 1, 0 } |
| 122 | |
| 123 | #define LTQ_MUX_P0_1_SSC0_MRST { 1, 0, 0, 0 } |
| 124 | #define LTQ_MUX_P0_1 { 0, 0, 1, 0 } |
| 125 | #define LTQ_MUX_P0_1_IN { 1, 0, 1, 0 } |
| 126 | |
| 127 | #define LTQ_MUX_P0_0_SSC0_MTSR { 0, 0, 0, 0 } |
| 128 | #define LTQ_MUX_P0_0 { 0, 0, 1, 0 } |
| 129 | #define LTQ_MUX_P0_0_IN { 1, 0, 1, 0 } |
| 130 | |
| 131 | |
| 132 | #define LTQ_MUX_P1_19_PCM3_TC1 { 0, 0, 0, 0 } |
| 133 | #define LTQ_MUX_P1_19_EXINT15 { 1, 0, 1, 0 } |
| 134 | #define LTQ_MUX_P1_19 { 0, 0, 1, 0 } |
| 135 | |
| 136 | #define LTQ_MUX_P1_18_PCM3_FSC { 0, 0, 0, 0 } |
| 137 | #define LTQ_MUX_P1_18_EXINT11 { 1, 0, 1, 0 } |
| 138 | #define LTQ_MUX_P1_18 { 0, 0, 1, 0 } |
| 139 | |
| 140 | #define LTQ_MUX_P1_17_PCM3_PCL { 0, 0, 0, 0 } |
| 141 | #define LTQ_MUX_P1_17_EXINT12 { 1, 0, 1, 0 } |
| 142 | #define LTQ_MUX_P1_17 { 0, 0, 1, 0 } |
| 143 | |
| 144 | #define LTQ_MUX_P1_16_PCM3_TX { 0, 0, 0, 0 } |
| 145 | #define LTQ_MUX_P1_16_EXINT13 { 1, 0, 1, 0 } |
| 146 | #define LTQ_MUX_P1_16 { 0, 0, 1, 0 } |
| 147 | |
| 148 | #define LTQ_MUX_P1_15_PCM3_RX { 0, 0, 0, 0 } |
| 149 | #define LTQ_MUX_P1_15_EXINT14 { 1, 0, 1, 0 } |
| 150 | #define LTQ_MUX_P1_15 { 0, 0, 1, 0 } |
| 151 | |
| 152 | #define LTQ_MUX_P1_14_PCM2_TC1 { 0, 0, 0, 0 } |
| 153 | #define LTQ_MUX_P1_14 { 0, 0, 1, 0 } |
| 154 | #define LTQ_MUX_P1_14_IN { 1, 0, 1, 0 } |
| 155 | |
| 156 | #define LTQ_MUX_P1_13_PCM2_FSC { 0, 0, 0, 0 } |
| 157 | #define LTQ_MUX_P1_13 { 0, 0, 1, 0 } |
| 158 | #define LTQ_MUX_P1_13_IN { 1, 0, 1, 0 } |
| 159 | |
| 160 | #define LTQ_MUX_P1_12_PCM2_PCL { 0, 0, 0, 0 } |
| 161 | #define LTQ_MUX_P1_12 { 0, 0, 1, 0 } |
| 162 | #define LTQ_MUX_P1_12_IN { 1, 0, 1, 0 } |
| 163 | |
| 164 | #define LTQ_MUX_P1_11_PCM2_TX { 0, 0, 0, 0 } |
| 165 | #define LTQ_MUX_P1_11 { 0, 0, 1, 0 } |
| 166 | #define LTQ_MUX_P1_11_IN { 1, 0, 1, 0 } |
| 167 | |
| 168 | #define LTQ_MUX_P1_10_PCM2_RX { 0, 0, 0, 0 } |
| 169 | #define LTQ_MUX_P1_10 { 0, 0, 1, 0 } |
| 170 | #define LTQ_MUX_P1_10_IN { 1, 0, 1, 0 } |
| 171 | |
| 172 | #define LTQ_MUX_P1_9_PCM1_TC1 { 0, 0, 0, 0 } |
| 173 | #define LTQ_MUX_P1_9 { 0, 0, 1, 0 } |
| 174 | #define LTQ_MUX_P1_9_IN { 0, 0, 1, 0 } |
| 175 | |
| 176 | #define LTQ_MUX_P1_8_PCM1_FSC { 0, 0, 0, 0 } |
| 177 | #define LTQ_MUX_P1_8 { 0, 0, 1, 0 } |
| 178 | #define LTQ_MUX_P1_8_IN { 1, 0, 1, 0 } |
| 179 | |
| 180 | #define LTQ_MUX_P1_7_PCM1_PCL { 0, 0, 0, 0 } |
| 181 | #define LTQ_MUX_P1_7 { 0, 0, 1, 0 } |
| 182 | #define LTQ_MUX_P1_7_IN { 1, 0, 1, 0 } |
| 183 | |
| 184 | #define LTQ_MUX_P1_6_PCM1_TX { 0, 0, 0, 0 } |
| 185 | #define LTQ_MUX_P1_6 { 0, 0, 1, 0 } |
| 186 | #define LTQ_MUX_P1_6_IN { 1, 0, 1, 0 } |
| 187 | |
| 188 | #define LTQ_MUX_P1_5_PCM1_RX { 0, 0, 0, 0 } |
| 189 | #define LTQ_MUX_P1_5 { 0, 0, 1, 0 } |
| 190 | #define LTQ_MUX_P1_5_IN { 1, 0, 1, 0 } |
| 191 | |
| 192 | #define LTQ_MUX_P1_4_PCM0_TC1 { 0, 0, 0, 0 } |
| 193 | #define LTQ_MUX_P1_4 { 0, 0, 1, 0 } |
| 194 | #define LTQ_MUX_P1_4_IN { 1, 0, 1, 0 } |
| 195 | |
| 196 | #define LTQ_MUX_P1_3_PCM0_FSC { 0, 0, 0, 0 } |
| 197 | #define LTQ_MUX_P1_3 { 0, 0, 1, 0 } |
| 198 | #define LTQ_MUX_P1_3_IN { 1, 0, 1, 0 } |
| 199 | |
| 200 | #define LTQ_MUX_P1_2_PCM0_PCL { 0, 0, 0, 0 } |
| 201 | #define LTQ_MUX_P1_2 { 0, 0, 1, 0 } |
| 202 | #define LTQ_MUX_P1_2_IN { 1, 0, 1, 0 } |
| 203 | |
| 204 | #define LTQ_MUX_P1_1_PCM0_TX { 0, 0, 0, 0 } |
| 205 | #define LTQ_MUX_P1_1 { 0, 0, 1, 0 } |
| 206 | #define LTQ_MUX_P1_1_IN { 1, 0, 1, 0 } |
| 207 | |
| 208 | #define LTQ_MUX_P1_0_PCM0_RX { 0, 0, 0, 0 } |
| 209 | #define LTQ_MUX_P1_0 { 0, 0, 1, 0 } |
| 210 | #define LTQ_MUX_P1_0_IN { 1, 0, 1, 0 } |
| 211 | |
| 212 | |
| 213 | #define LTQ_MUX_P2_18_EBU_BC1 { 0, 0, 0, 0 } |
| 214 | #define LTQ_MUX_P2_18 { 0, 0, 1, 0 } |
| 215 | #define LTQ_MUX_P2_18_IN { 1, 0, 1, 0 } |
| 216 | |
| 217 | #define LTQ_MUX_P2_17_EBU_BC0 { 0, 0, 0, 0 } |
| 218 | #define LTQ_MUX_P2_17 { 0, 0, 1, 0 } |
| 219 | #define LTQ_MUX_P2_17_IN { 1, 0, 1, 0 } |
| 220 | |
| 221 | #define LTQ_MUX_P2_16_EBU_RDBY { 1, 0, 0, 0 } |
| 222 | #define LTQ_MUX_P2_16 { 0, 0, 1, 0 } |
| 223 | #define LTQ_MUX_P2_16_IN { 1, 0, 1, 0 } |
| 224 | |
| 225 | #define LTQ_MUX_P2_15_EBU_WAIT { 1, 0, 0, 0 } |
| 226 | #define LTQ_MUX_P2_15 { 0, 0, 1, 0 } |
| 227 | #define LTQ_MUX_P2_15_IN { 1, 0, 1, 0 } |
| 228 | |
| 229 | #define LTQ_MUX_P2_14_EBU_ALE { 0, 0, 0, 0 } |
| 230 | #define LTQ_MUX_P2_14 { 0, 0, 1, 0 } |
| 231 | #define LTQ_MUX_P2_14_IN { 1, 0, 1, 0 } |
| 232 | |
| 233 | #define LTQ_MUX_P2_13_EBU_WR { 0, 0, 0, 0 } |
| 234 | #define LTQ_MUX_P2_13 { 0, 0, 1, 0 } |
| 235 | #define LTQ_MUX_P2_13_IN { 1, 0, 1, 0 } |
| 236 | |
| 237 | #define LTQ_MUX_P2_12_EBU_RD { 0, 0, 0, 0 } |
| 238 | #define LTQ_MUX_P2_12 { 0, 0, 1, 0 } |
| 239 | #define LTQ_MUX_P2_12_IN { 1, 0, 1, 0 } |
| 240 | |
| 241 | #define LTQ_MUX_P2_11_EBU_A11 { 0, 0, 0, 0 } |
| 242 | #define LTQ_MUX_P2_11 { 0, 0, 1, 0 } |
| 243 | #define LTQ_MUX_P2_11_IN { 1, 0, 1, 0 } |
| 244 | |
| 245 | #define LTQ_MUX_P2_10_EBU_A10 { 0, 0, 0, 0 } |
| 246 | #define LTQ_MUX_P2_10 { 0, 0, 1, 0 } |
| 247 | #define LTQ_MUX_P2_10_IN { 1, 0, 1, 0 } |
| 248 | |
| 249 | #define LTQ_MUX_P2_9_EBU_A9 { 0, 0, 0, 0 } |
| 250 | #define LTQ_MUX_P2_9 { 0, 0, 1, 0 } |
| 251 | #define LTQ_MUX_P2_9_IN { 1, 0, 1, 0 } |
| 252 | |
| 253 | #define LTQ_MUX_P2_8_EBU_A8 { 0, 0, 0, 0 } |
| 254 | #define LTQ_MUX_P2_8 { 0, 0, 1, 0 } |
| 255 | #define LTQ_MUX_P2_8_IN { 1, 0, 1, 0 } |
| 256 | |
| 257 | #define LTQ_MUX_P2_7_EBU_A7 { 0, 0, 0, 0 } |
| 258 | #define LTQ_MUX_P2_7 { 0, 0, 1, 0 } |
| 259 | #define LTQ_MUX_P2_7_IN { 1, 0, 1, 0 } |
| 260 | |
| 261 | #define LTQ_MUX_P2_6_EBU_A6 { 0, 0, 0, 0 } |
| 262 | #define LTQ_MUX_P2_6 { 0, 0, 1, 0 } |
| 263 | #define LTQ_MUX_P2_6_IN { 1, 0, 1, 0 } |
| 264 | |
| 265 | #define LTQ_MUX_P2_5_EBU_A5 { 0, 0, 0, 0 } |
| 266 | #define LTQ_MUX_P2_5 { 0, 0, 1, 0 } |
| 267 | #define LTQ_MUX_P2_5_IN { 1, 0, 1, 0 } |
| 268 | |
| 269 | #define LTQ_MUX_P2_4_EBU_A4 { 0, 0, 0, 0 } |
| 270 | #define LTQ_MUX_P2_4 { 0, 0, 1, 0 } |
| 271 | #define LTQ_MUX_P2_4_IN { 1, 0, 1, 0 } |
| 272 | |
| 273 | #define LTQ_MUX_P2_3_EBU_A3 { 0, 0, 0, 0 } |
| 274 | #define LTQ_MUX_P2_3 { 0, 0, 1, 0 } |
| 275 | #define LTQ_MUX_P2_3_IN { 1, 0, 1, 0 } |
| 276 | |
| 277 | #define LTQ_MUX_P2_2_EBU_A2 { 0, 0, 0, 0 } |
| 278 | #define LTQ_MUX_P2_2 { 0, 0, 1, 0 } |
| 279 | #define LTQ_MUX_P2_2_IN { 1, 0, 1, 0 } |
| 280 | |
| 281 | #define LTQ_MUX_P2_1_EBU_A1 { 0, 0, 0, 0 } |
| 282 | #define LTQ_MUX_P2_1 { 0, 0, 1, 0 } |
| 283 | #define LTQ_MUX_P2_1_IN { 1, 0, 1, 0 } |
| 284 | |
| 285 | #define LTQ_MUX_P2_0_EBU_A0 { 0, 0, 0, 0 } |
| 286 | #define LTQ_MUX_P2_0 { 0, 0, 1, 0 } |
| 287 | #define LTQ_MUX_P2_0_IN { 1, 0, 1, 0 } |
| 288 | |
| 289 | |
| 290 | #define LTQ_MUX_P3_19_EBU_CS3 { 0, 0, 0, 0 } |
| 291 | #define LTQ_MUX_P3_19 { 0, 0, 1, 0 } |
| 292 | #define LTQ_MUX_P3_19_IN { 1, 0, 1, 0 } |
| 293 | |
| 294 | #define LTQ_MUX_P3_18_EBU_CS2 { 0, 0, 0, 0 } |
| 295 | #define LTQ_MUX_P3_18 { 0, 0, 1, 0 } |
| 296 | #define LTQ_MUX_P3_18_IN { 1, 0, 1, 0 } |
| 297 | |
| 298 | #define LTQ_MUX_P3_17_EBU_CS1 { 0, 0, 0, 0 } |
| 299 | #define LTQ_MUX_P3_17 { 0, 0, 1, 0 } |
| 300 | #define LTQ_MUX_P3_17_IN { 1, 0, 1, 0 } |
| 301 | |
| 302 | #define LTQ_MUX_P3_16_EBU_CS0 { 0, 0, 0, 0 } |
| 303 | #define LTQ_MUX_P3_16 { 0, 0, 1, 0 } |
| 304 | #define LTQ_MUX_P3_16_IN { 1, 0, 1, 0 } |
| 305 | |
| 306 | #define LTQ_MUX_P3_15_EBU_AD15 { 1, 0, 0, 0 } |
| 307 | #define LTQ_MUX_P3_15 { 0, 0, 1, 0 } |
| 308 | #define LTQ_MUX_P3_15_IN { 1, 0, 1, 0 } |
| 309 | |
| 310 | #define LTQ_MUX_P3_14_EBU_AD14 { 1, 0, 0, 0 } |
| 311 | #define LTQ_MUX_P3_14 { 0, 0, 1, 0 } |
| 312 | #define LTQ_MUX_P3_14_IN { 1, 0, 1, 0 } |
| 313 | |
| 314 | #define LTQ_MUX_P3_13_EBU_AD13 { 1, 0, 0, 0 } |
| 315 | #define LTQ_MUX_P3_13 { 0, 0, 1, 0 } |
| 316 | #define LTQ_MUX_P3_13_IN { 1, 0, 1, 0 } |
| 317 | |
| 318 | #define LTQ_MUX_P3_12_EBU_AD12 { 1, 0, 0, 0 } |
| 319 | #define LTQ_MUX_P3_12 { 0, 0, 1, 0 } |
| 320 | #define LTQ_MUX_P3_12_IN { 1, 0, 1, 0 } |
| 321 | |
| 322 | #define LTQ_MUX_P3_11_EBU_AD11 { 1, 0, 0, 0 } |
| 323 | #define LTQ_MUX_P3_11 { 0, 0, 1, 0 } |
| 324 | #define LTQ_MUX_P3_11_IN { 1, 0, 1, 0 } |
| 325 | |
| 326 | #define LTQ_MUX_P3_10_EBU_AD10 { 1, 0, 0, 0 } |
| 327 | #define LTQ_MUX_P3_10 { 0, 0, 1, 0 } |
| 328 | #define LTQ_MUX_P3_10_IN { 1, 0, 1, 0 } |
| 329 | |
| 330 | #define LTQ_MUX_P3_9_EBU_AD9 { 1, 0, 0, 0 } |
| 331 | #define LTQ_MUX_P3_9 { 0, 0, 1, 0 } |
| 332 | #define LTQ_MUX_P3_9_IN { 1, 0, 1, 0 } |
| 333 | |
| 334 | #define LTQ_MUX_P3_8_EBU_AD8 { 1, 0, 0, 0 } |
| 335 | #define LTQ_MUX_P3_8 { 0, 0, 1, 0 } |
| 336 | #define LTQ_MUX_P3_8_IN { 1, 0, 1, 0 } |
| 337 | |
| 338 | #define LTQ_MUX_P3_7_EBU_AD7 { 1, 0, 0, 0 } |
| 339 | #define LTQ_MUX_P3_7 { 0, 0, 1, 0 } |
| 340 | #define LTQ_MUX_P3_7_IN { 1, 0, 1, 0 } |
| 341 | |
| 342 | #define LTQ_MUX_P3_6_EBU_AD6 { 1, 0, 0, 0 } |
| 343 | #define LTQ_MUX_P3_6 { 0, 0, 1, 0 } |
| 344 | #define LTQ_MUX_P3_6_IN { 1, 0, 1, 0 } |
| 345 | |
| 346 | #define LTQ_MUX_P3_5_EBU_AD5 { 1, 0, 0, 0 } |
| 347 | #define LTQ_MUX_P3_5 { 0, 0, 1, 0 } |
| 348 | #define LTQ_MUX_P3_5_IN { 1, 0, 1, 0 } |
| 349 | |
| 350 | #define LTQ_MUX_P3_4_EBU_AD4 { 1, 0, 0, 0 } |
| 351 | #define LTQ_MUX_P3_4 { 0, 0, 1, 0 } |
| 352 | #define LTQ_MUX_P3_4_IN { 1, 0, 1, 0 } |
| 353 | |
| 354 | #define LTQ_MUX_P3_3_EBU_AD3 { 1, 0, 0, 0 } |
| 355 | #define LTQ_MUX_P3_3 { 0, 0, 1, 0 } |
| 356 | #define LTQ_MUX_P3_3_IN { 1, 0, 1, 0 } |
| 357 | |
| 358 | #define LTQ_MUX_P3_2_EBU_AD2 { 1, 0, 0, 0 } |
| 359 | #define LTQ_MUX_P3_2 { 0, 0, 1, 0 } |
| 360 | #define LTQ_MUX_P3_2_IN { 1, 0, 1, 0 } |
| 361 | |
| 362 | #define LTQ_MUX_P3_1_EBU_AD1 { 1, 0, 0, 0 } |
| 363 | #define LTQ_MUX_P3_1 { 0, 0, 1, 0 } |
| 364 | #define LTQ_MUX_P3_1_IN { 1, 0, 1, 0 } |
| 365 | |
| 366 | #define LTQ_MUX_P3_0_EBU_AD0 { 1, 0, 0, 0 } |
| 367 | #define LTQ_MUX_P3_0 { 0, 0, 1, 0 } |
| 368 | #define LTQ_MUX_P3_0_IN { 1, 0, 1, 0 } |
| 369 | |
| 370 | |
| 371 | #define LTQ_MUX_P4_23_SSLIC7_CLK { 0, 0, 0, 0 } |
| 372 | #define LTQ_MUX_P4_23 { 0, 0, 1, 0 } |
| 373 | #define LTQ_MUX_P4_23_IN { 1, 0, 1, 0 } |
| 374 | |
| 375 | #define LTQ_MUX_P4_22_SSLIC7_RX { 0, 0, 0, 0 } |
| 376 | #define LTQ_MUX_P4_22 { 0, 0, 1, 0 } |
| 377 | #define LTQ_MUX_P4_22_IN { 1, 0, 1, 0 } |
| 378 | |
| 379 | #define LTQ_MUX_P4_21_SSLIC7_TX { 0, 0, 0, 0 } |
| 380 | #define LTQ_MUX_P4_21 { 0, 0, 1, 0 } |
| 381 | #define LTQ_MUX_P4_21_IN { 1, 0, 1, 0 } |
| 382 | |
| 383 | #define LTQ_MUX_P4_20_SSLIC6_CLK { 0, 0, 0, 0 } |
| 384 | #define LTQ_MUX_P4_20 { 0, 0, 1, 0 } |
| 385 | #define LTQ_MUX_P4_20_IN { 1, 0, 1, 0 } |
| 386 | |
| 387 | #define LTQ_MUX_P4_19_SSLIC6_RX { 0, 0, 0, 0 } |
| 388 | #define LTQ_MUX_P4_19 { 0, 0, 1, 0 } |
| 389 | #define LTQ_MUX_P4_19_IN { 1, 0, 1, 0 } |
| 390 | |
| 391 | #define LTQ_MUX_P4_18_SSLIC6_TX { 0, 0, 0, 0 } |
| 392 | #define LTQ_MUX_P4_18 { 0, 0, 1, 0 } |
| 393 | #define LTQ_MUX_P4_18_IN { 1, 0, 1, 0 } |
| 394 | |
| 395 | #define LTQ_MUX_P4_17_SSLIC5_CLK { 0, 0, 0, 0 } |
| 396 | #define LTQ_MUX_P4_17 { 0, 0, 1, 0 } |
| 397 | #define LTQ_MUX_P4_17_IN { 1, 0, 1, 0 } |
| 398 | |
| 399 | #define LTQ_MUX_P4_16_SSLIC5_RX { 0, 0, 0, 0 } |
| 400 | #define LTQ_MUX_P4_16 { 0, 0, 1, 0 } |
| 401 | #define LTQ_MUX_P4_16_IN { 1, 0, 1, 0 } |
| 402 | |
| 403 | #define LTQ_MUX_P4_15_SSLIC5_TX { 0, 0, 0, 0 } |
| 404 | #define LTQ_MUX_P4_15 { 0, 0, 1, 0 } |
| 405 | #define LTQ_MUX_P4_15_IN { 1, 0, 1, 0 } |
| 406 | |
| 407 | #define LTQ_MUX_P4_14_SSLIC4_CLK { 0, 0, 0, 0 } |
| 408 | #define LTQ_MUX_P4_14 { 0, 0, 1, 0 } |
| 409 | #define LTQ_MUX_P4_14_IN { 1, 0, 1, 0 } |
| 410 | |
| 411 | #define LTQ_MUX_P4_13_SSLIC4_RX { 0, 0, 0, 0 } |
| 412 | #define LTQ_MUX_P4_13 { 0, 0, 1, 0 } |
| 413 | #define LTQ_MUX_P4_13_IN { 1, 0, 1, 0 } |
| 414 | |
| 415 | #define LTQ_MUX_P4_12_SSLIC4_TX { 0, 0, 0, 0 } |
| 416 | #define LTQ_MUX_P4_12 { 0, 0, 1, 0 } |
| 417 | #define LTQ_MUX_P4_12_IN { 1, 0, 1, 0 } |
| 418 | |
| 419 | #define LTQ_MUX_P4_11_SSLIC3_CLK { 0, 0, 0, 0 } |
| 420 | #define LTQ_MUX_P4_11 { 0, 0, 1, 0 } |
| 421 | #define LTQ_MUX_P4_11_IN { 1, 0, 1, 0 } |
| 422 | |
| 423 | #define LTQ_MUX_P4_10_SSLIC3_RX { 0, 0, 0, 0 } |
| 424 | #define LTQ_MUX_P4_10 { 0, 0, 1, 0 } |
| 425 | #define LTQ_MUX_P4_10_IN { 1, 0, 1, 0 } |
| 426 | |
| 427 | #define LTQ_MUX_P4_9_SSLIC3_TX { 0, 0, 0, 0 } |
| 428 | #define LTQ_MUX_P4_9 { 0, 0, 1, 0 } |
| 429 | #define LTQ_MUX_P4_9_IN { 1, 0, 1, 0 } |
| 430 | |
| 431 | #define LTQ_MUX_P4_8_SSLIC2_CLK { 0, 0, 0, 0 } |
| 432 | #define LTQ_MUX_P4_8 { 0, 0, 1, 0 } |
| 433 | #define LTQ_MUX_P4_8_IN { 1, 0, 1, 0 } |
| 434 | |
| 435 | #define LTQ_MUX_P4_7_SSLIC2_RX { 0, 0, 0, 0 } |
| 436 | #define LTQ_MUX_P4_7 { 0, 0, 1, 0 } |
| 437 | #define LTQ_MUX_P4_7_IN { 1, 0, 1, 0 } |
| 438 | |
| 439 | #define LTQ_MUX_P4_6_SSLIC2_TX { 0, 0, 0, 0 } |
| 440 | #define LTQ_MUX_P4_6 { 0, 0, 1, 0 } |
| 441 | #define LTQ_MUX_P4_6_IN { 1, 0, 1, 0 } |
| 442 | |
| 443 | #define LTQ_MUX_P4_5_SSLIC1_CLK { 0, 0, 0, 0 } |
| 444 | #define LTQ_MUX_P4_5 { 0, 0, 1, 0 } |
| 445 | #define LTQ_MUX_P4_5_IN { 1, 0, 1, 0 } |
| 446 | |
| 447 | #define LTQ_MUX_P4_4_SSLIC1_RX { 0, 0, 0, 0 } |
| 448 | #define LTQ_MUX_P4_4 { 0, 0, 1, 0 } |
| 449 | #define LTQ_MUX_P4_4_IN { 1, 0, 1, 0 } |
| 450 | |
| 451 | #define LTQ_MUX_P4_3_SSLIC1_TX { 0, 0, 0, 0 } |
| 452 | #define LTQ_MUX_P4_3 { 0, 0, 1, 0 } |
| 453 | #define LTQ_MUX_P4_3_IN { 1, 0, 1, 0 } |
| 454 | |
| 455 | #define LTQ_MUX_P4_2_SSLIC0_CLK { 0, 0, 0, 0 } |
| 456 | #define LTQ_MUX_P4_2 { 0, 0, 1, 0 } |
| 457 | #define LTQ_MUX_P4_2_IN { 1, 0, 1, 0 } |
| 458 | |
| 459 | #define LTQ_MUX_P4_1_SSLIC0_RX { 0, 0, 0, 0 } |
| 460 | #define LTQ_MUX_P4_1 { 0, 0, 1, 0 } |
| 461 | #define LTQ_MUX_P4_1_IN { 1, 0, 1, 0 } |
| 462 | |
| 463 | #define LTQ_MUX_P4_0_SSLIC0_TX { 0, 0, 0, 0 } |
| 464 | #define LTQ_MUX_P4_0 { 0, 0, 1, 0 } |
| 465 | #define LTQ_MUX_P4_0_IN { 1, 0, 1, 0 } |
| 466 | |
| 467 | #endif |
| 468 | |