Root/target/linux/sibyte/patches-3.3/101-rhone_physmap.patch

1--- a/arch/mips/sibyte/swarm/platform.c
2+++ b/arch/mips/sibyte/swarm/platform.c
3@@ -5,6 +5,7 @@
4 #include <linux/platform_device.h>
5 #include <linux/ata_platform.h>
6 
7+#include <asm/addrspace.h>
8 #include <asm/sibyte/board.h>
9 #include <asm/sibyte/sb1250_genbus.h>
10 #include <asm/sibyte/sb1250_regs.h>
11@@ -137,3 +138,71 @@ static int __init sb1250_device_init(voi
12     return ret;
13 }
14 device_initcall(sb1250_device_init);
15+
16+#ifdef CONFIG_SIBYTE_RHONE
17+
18+#include <linux/mtd/partitions.h>
19+#include <linux/mtd/physmap.h>
20+
21+/* The board has 16MB flash but CFE sets up only 2MB */
22+#define PHYS_TO_K1(a) CKSEG1ADDR(a)
23+#define BOOTROM_SIZE 0x100
24+
25+static void fixup_cs0_size(void)
26+{
27+ SBWRITECSR(((A_IO_EXT_CS_BASE(0)) + R_IO_EXT_MULT_SIZE), BOOTROM_SIZE);
28+}
29+
30+static struct mtd_partition flash_parts[] = {
31+ {
32+ .name = "cfe",
33+ .offset = 0x00000000,
34+ .size = 0x00200000,
35+ .mask_flags = MTD_WRITEABLE,
36+ },
37+ {
38+ .name = "os",
39+ .offset = 0x00200000,
40+ .size = 0x00d00000,
41+ },
42+ {
43+ .name = "environment",
44+ .offset = 0x00f00000,
45+ .size = 0x00100000,
46+ .mask_flags = MTD_WRITEABLE,
47+ },
48+};
49+
50+static struct physmap_flash_data flash_data = {
51+ .width = 1,
52+ .nr_parts = ARRAY_SIZE(flash_parts),
53+ .parts = flash_parts,
54+};
55+
56+static struct resource flash_resource = {
57+ .start = 0x1fc00000,
58+ .end = 0x20bfffff,
59+ .flags = IORESOURCE_MEM,
60+};
61+
62+static struct platform_device flash_device = {
63+ .name = "physmap-flash",
64+ .id = 0,
65+ .resource = &flash_resource,
66+ .num_resources = 1,
67+ .dev = {
68+ .platform_data = &flash_data,
69+ },
70+};
71+
72+static int __init flash_setup(void)
73+{
74+ fixup_cs0_size();
75+ platform_device_register(&flash_device);
76+
77+ return 0;
78+};
79+
80+device_initcall(flash_setup);
81+
82+#endif /* CONFIG_SIBYTE_RHONE */
83

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