1 | --- a/ath_hal/ah_os.c |
2 | +++ b/ath_hal/ah_os.c |
3 | @@ -343,6 +343,46 @@ EXPORT_SYMBOL(ath_hal_func); |
4 | * NB: see the comments in ah_osdep.h about byte-swapping register |
5 | * reads and writes to understand what's going on below. |
6 | */ |
7 | + |
8 | +#ifdef CONFIG_IFXMIPS |
9 | +extern int ifxmips_has_brn_block(void); |
10 | +static int ifxmips_emulate = 0; |
11 | +#define EEPROM_EMULATION 1 |
12 | +#endif |
13 | + |
14 | +#ifdef EEPROM_EMULATION |
15 | +static int ath_hal_eeprom(struct ath_hal *ah, unsigned long addr, int val, int write) |
16 | +{ |
17 | + static int addrsel = 0; |
18 | + static int rc = 0; |
19 | + |
20 | + if (write) { |
21 | + if(addr == 0x6000) { |
22 | + addrsel = val * 2; |
23 | + rc = 0; |
24 | + } |
25 | + } else { |
26 | + switch(addr) |
27 | + { |
28 | + case 0x600c: |
29 | + if(rc++ < 2) |
30 | + val = 0x00000000; |
31 | + else |
32 | + val = 0x00000002; |
33 | + break; |
34 | + case 0x6004: |
35 | + val = cpu_to_le16(__raw_readw((u16 *) KSEG1ADDR(0xb07f0400 + addrsel))); |
36 | + /* this forces the regdomain to 0x00 (worldwide), as the original setting |
37 | + * causes issues with the HAL */ |
38 | + if (addrsel == 0x17e) |
39 | + val = 0; |
40 | + break; |
41 | + } |
42 | + } |
43 | + return val; |
44 | +} |
45 | +#endif |
46 | + |
47 | void __ahdecl |
48 | ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val) |
49 | { |
50 | @@ -351,20 +391,33 @@ ath_hal_reg_write(struct ath_hal *ah, u_ |
51 | ath_hal_printf(ah, "%s: WRITE 0x%x <= 0x%x\n", |
52 | (ath_hal_func ?: "unknown"), reg, val); |
53 | #endif |
54 | - _OS_REG_WRITE(ah, reg, val); |
55 | +#ifdef EEPROM_EMULATION |
56 | + if((reg >= 0x6000) && (reg <= 0x6010) && ifxmips_emulate) |
57 | + { |
58 | + val = ath_hal_eeprom(ah, reg, val, 1); |
59 | + } else |
60 | +#endif |
61 | + _OS_REG_WRITE(ah, reg, val); |
62 | } |
63 | EXPORT_SYMBOL(ath_hal_reg_write); |
64 | |
65 | + |
66 | /* This should only be called while holding the lock, sc->sc_hal_lock. */ |
67 | u_int32_t __ahdecl |
68 | ath_hal_reg_read(struct ath_hal *ah, u_int reg) |
69 | { |
70 | - u_int32_t val; |
71 | + u_int32_t val; |
72 | +#ifdef EEPROM_EMULATION |
73 | + if((reg >= 0x6000) && (reg <= 0x6010) && ifxmips_emulate) |
74 | + { |
75 | + val = ath_hal_eeprom(ah, reg, 0, 0); |
76 | + } else |
77 | +#endif |
78 | + val = _OS_REG_READ(ah, reg); |
79 | |
80 | - val = _OS_REG_READ(ah, reg); |
81 | #ifdef AH_DEBUG |
82 | if (ath_hal_debug > 1) |
83 | - ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n", |
84 | + ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n", |
85 | (ath_hal_func ?: "unknown"), reg, val); |
86 | #endif |
87 | return val; |
88 | @@ -581,7 +634,9 @@ init_ath_hal(void) |
89 | { |
90 | const char *sep; |
91 | int i; |
92 | - |
93 | +#ifdef CONFIG_IFXMIPS |
94 | + ifxmips_emulate = ifxmips_has_brn_block(); |
95 | +#endif |
96 | printk(KERN_INFO "%s: %s (", dev_info, ath_hal_version); |
97 | sep = ""; |
98 | for (i = 0; ath_hal_buildopts[i] != NULL; i++) { |
99 | |