| Age | Message |
|---|---|
| 10 years 1 month | Update qi_lb60 defconfig to v3.9 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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Commit bd4eca9347384585058d53059c7a687d86493456,
by Lars C.
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| 10 years 1 month | media/radio/radio-rda5807.c: Wait for seek complete before return All applications expects that the radio drivers make a synchronous seek when trying to find radio stations. So this feature is implemented here. The rationale: The hardware seek operation needs 35 msecs per frequency. We will wait until the hardware finds a radio station, waiting 35 msecs for each frequency (default spacing is 100 kHz). When the flag STC (Seek/Tune Complete) is set, it means that the hardware found a valid radio station, so we can return to the application. If we don't find a radio station, we will return -ETIMEDOUT to the application. Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Maarten ter Huurne: Reworded comments, expressed timeout count using constants rather than resulting value, return immediately when tuned instead of breaking out of the loop first. |
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Commit f180eb2fa8eb97fff8e5d36dcf0eeee92ef58165,
by Lars C.
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| 10 years 8 months | media/radio/radio-rda5807: Use module_i2c_driver instead of
module_{init|exit} With this change, we can remove some lines without any functional change. This makes the code of the driver more simple. Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> |
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Commit 396052adc2acd662edcf725e0be206fb16060333,
by Marcos Paulo de Souza
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| 10 years 8 months | media/radio/radio-rda5807.c: Use devm_* when allocating memory With this change, we can get ride of some kfrees and have less code. Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> |
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Commit 88f823c1e7bde2f9daa50104419f03f7048a5c1e,
by Marcos Paulo de Souza
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| 12 years 8 months | Add defconfig for the Dingoo A320 This is the config from the jz-3.5 branch brought up to date for 3.6. |
| 12 years 7 months | Add defconfig for the Ben NanoNote This is the config from the jz-3.5 branch brought up to date for 3.6. |
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Commit 8ead5545ca0359d15dd97c7d0c5acb399c84ad65,
by Lars C.
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| 11 years 11 months | OpenDingux: Add initrd The initrd contents are specified using initrd/tree.txt. The gen_init_cpio tool will parse that text file and generate a cpio archive. splashkill is a simple program that is meant to be launched directly by the kernel, before mininit. It forks itself and sleeps until the ENTER key is pressed; when it occurs, it enables the framebuffer console by writting to a file in /sys. This permits to 'kill' the kernel splash screen, in order to display the boot log. The source for the mininit and splashkill binaries can be found here: https://github.com/Ayla-/mininit |
| 11 years 4 months | OpenDingux: Add logo We have a full-screen logo that is used as a splash screen. |
| 12 years 2 months | MIPS: A320: Add Dingoo A320 board support This is a squashed version of the development done in the jz-3.5 branch. |
| 11 years 9 months | MIPS: A320: Add SoC sound support for Dingoo A320 |
| 10 years 11 months | MIPS: JZ4740: Work around fbcon logo crash with SLCD The logo data is in the init section. However, when using the SLCD driver, the fbcon code will try to fetch the logo data after the init section has already been freed, potentially crashing the kernel. This is a workaround because we have to release a stable kernel now. The root cause should be found and fixed later. |
| 11 years 11 months | MIPS: JZ4740: SLCD framebufer driver This driver sends the frame buffer to a smart LCD controller, that is a controller with its own video memory. It is a squashed version of development done in the jz-3.5 branch. |
| 11 years 11 months | MMC: JZ4740: Added support for CPU frequency changing The MSC device clock is stopped before the frequency change. After the change a new divider is computed and the clock is restarted. Also the frequency change is postponed if an I/O operation is in progress. |
| 12 years 2 months | MIPS: JZ4740: Add cpufreq support This is a squashed version of Uli's driver that was further developed in the qi-kernel repository. |
| 10 years 1 month | ili |
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Commit fdabbe683446c5f480965cfdf9b43a336c4c86b5,
by Lars C.
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| 12 years 8 months | MIPS: JZ4740: Added setting of PLL rate and main dividers This functionality makes a cpufreq driver possible. Squashed version of the development done in the jz-2.6.39 branch. |
| 12 years 7 months | qi_lb60: Don't use 3-wire spi mode for the display for now The spi_gpio driver does not support 3-wire mode. |
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Commit b09359614fa37bb751cd00c9338b29ee844f4168,
by Lars C.
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| 12 years 9 months | Add ili8960 lcd driver Includes the following changes from the jz-3.5 branch: - Use module_spi_driver - Use devm_kzalloc - Use kstrtoul Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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Commit 4cd81eef1d0039e57778850c25f0ff68f2761d94,
by Lars C.
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| 13 years 1 month | Add jz4740 udc driver History: - driver by Ingenic - patch by Lars-Peter Clausen - updated to 3.1 by Maarten ter Huurne |
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Commit 7a667fb62041135bd64dc2a951094e906701d272,
by Lars C.
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| 11 years 22 days | MIPS: Removed declaration of obsolete arch_init_clk_ops() |
| 10 years 7 months | MIPS: JZ4740: Use round robin DMA channel priority mode Round robin is performed over two priority groups of 3 channels each, so an argument was added to jz4740_dma_request() to select priority group. TODO: Verify if the hardware actually has the channels grouped [0..2] and [3..5] or whether it uses [0..3] and [4..5]. |
| 10 years 7 months | MIPS: JZ4740: Acquire and enable DMA controller clock Previously, it was assumed that the DMA controller clock is not gated when the kernel starts running. While that is the power-on state, it is safer to not rely on that. |
| 11 years 22 days | MIPS: JZ4740: Correct clock gate bit for DMA controller |
| 11 years 26 days | MIPS: JZ4740: LCD: Fixed LCD_CMD consts and completed LCD_STATE
consts None of these constants are used so far. |
| 10 years 8 months | RTC: JZ4740: Init the "regulator" register on startup. This register controls the accuracy of the RTC. uC/OS-II use the RTC as a 100Hz clock, and writes a completely wrong value on that register, that we have to overwrite if we want a working real-time clock. Signed-off-by: Paul Cercueil <paul@crapouillou.net> |
Branches:
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ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
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jz-3.15
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jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
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master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9
