Kernel Git Change Log
|12 years 4 months||FIXED hideous bug in the special function pin configuration that pretty much broke it completely.|
Commit 57230db9994d9f15249d87f410b07c806a48a98c, by Ignacio Garcia Perez
|12 years 6 months||stash|
|12 years 6 months||MIPS: JZ4740: Fix pwm|
|12 years 6 months||MMC: JZ4740: Drop clock_id field from platform data
Now that we use clkdev to perform the clock lookup it is no longer necessary.
|12 years 6 months||MIPS: JZ4750: xz0032: Fix gpio-charger platform data|
|12 years 6 months||MIPS: JZ4760: lepus: Register more peripherals|
|12 years 6 months||MIPS: JZ4760: Fix NR_IRQS|
|12 years 6 months||MIPS: JZ4740: Fix NR_IRQS|
|12 years 6 months||MIPS: JZ4760: Add more platform device defintions|
|12 years 6 months||MMC: Make the JZ4740 driver availabe on JZ4760|
|12 years 6 months||FBDEV: JZ4740: Add basic jz4760 support|
|12 years 6 months||MIPS: JZ47XX: Further generalize clock support
Share common clock management functions and structs between the sub-archs.
Also use clkdev for clock lookup, which allows us to assign a clock to a device
which is usful if we have multiple device instances of the same driver. (Like
for the MMC driver).
|12 years 6 months||JZ47XX: Add PWM support for JZ4760|
|12 years 6 months||JZ47XX: Add GPIO ports for JZ4760 and some JZ4760 pin defintions|
|12 years 6 months||JZ47XX: Fix JZ4760 access to vmalloc'ed memory
Without this magic value written to that magic register access to vmalloc'ed
memory hardlocks the CPU.
|12 years 6 months||RTC: Add support for the JZ4760 SoC to the rtc-jz4740 driver
The JZ4760 requires a magic value to be written to WRITE_ENABLE register before
other registers can be modified.
Signed-off-by: Lars-Peter Clausen <email@example.com>
|12 years 6 months||MIPS: JZ47XX: PWM: Fix pwm_disable
With certain configurations the current pwm_disable implementation can cause
problems such that when re-enabling the PWM the output is always high instead of
the desired PWM signal.
By changing the order of the different steps in pwm_disable these problems no
|12 years 6 months||USB: Make JZ4740 OHCI driver available for all JZ47XX platforms|
|12 years 6 months||MMC: JZ4740: Read status register before clearing irq flags
The JZ4750 and JZ4760 have additional bits in the irq register for the different
error conditions. If the bit in the irq register is cleared the matching bit in
the status register is cleared as well, so the status register has to be read
before those bits are cleared, otherwise error conditions are undetected.
|12 years 6 months||JZ47XX: GPIO: Add support for FUNC4
On the JZ4760 a pin can have upto 4 alternate functions.
This patch adds support for setting the 4th alternate function.
|12 years 6 months||JZ47XX: GPIO: Reuse sysdev 'id' field
Reuse the sysdev 'id' field instead of adding an 'id' field to the jz_gpio_chip
|12 years 6 months||Add JZ4760 specific base addresses|
|12 years 6 months||JZ47XX: PWM: Set output direction on PWM pins.|
Commit f11d35a830a9e4307809225e44b782e5de8e8c5c, by Peter Zotov
|12 years 6 months||Add LCD reset gpio functionlality to jz4740-fb.|
Commit 78c33cf0089060a048bac18430c314faa8fae46b, by Peter Zotov
|12 years 6 months||XZ0032: Fix backlight PWM frequency.|
Commit a0cdc62b12557c0fd0f10582e28d029038e76a87, by Peter Zotov