Kernel Git Change Log
|8 years 9 months||Merge remote branch 'remotes/whitequark/xz0032-wip' into jz47xx|
|8 years 9 months||Add LCD support to JZ4750.|
|8 years 9 months||Update JZ4740 framebuffer driver to support new header layout.|
|8 years 9 months||Added MTD configuration for XZ0032 board.|
|8 years 9 months||Add JZ4750 NAND driver.|
|8 years 9 months||MIPS: JZ4750: Add support for UDC controller.|
|8 years 9 months||Update JZ4740 UDC driver to use new JZ47xx clock system.|
|8 years 9 months||MIPS: JZ47xx: Generalize clock framework.|
|8 years 9 months||Use UART1 as the low level debug port on the JZ4760|
|8 years 9 months||MIPS: JZ47xx: Set up jz_gpio_chips in jz47xx_gpio_init.
This was causing segfaults on bulk GPIO requests.
|8 years 9 months||Add RTC platform device support for JZ4750.|
|8 years 9 months||Add IRQ workaround for JZ4750 errata.|
|8 years 9 months||Add OST support
Add support for the OST found on the JZ4750 and later.
Use it instead of the timer clocksource and clockevent for JZ4750 and JZ4760.
|8 years 9 months||Use common base address file for all sub-archs
The base addresses of the different IP-cores seem to be the same across SoCs, so
use a common header file for all of the SoCs.
|8 years 9 months||MIPS: JZ4750: Add workarounds for CP0 STATUS.
The JZ4750 has (probable) errata which leads to hangs on certain
access to ERL and EXL bits in CP0 STATUS. This workaround is ported
from official Ingenic (chip manufacturer) kernel, but author knows
no documents on this errata.
Commit 2308d11889e7f9a9409ce55079e40c44b4d476b1, by Peter Zotov
|8 years 9 months||MIPS: Add basic JZ4750 support.|
Commit b9dc8f843011152bb754d54c4a53800b22d64e6c, by Peter Zotov
|8 years 9 months||Add very basic jz4760 support|
|8 years 9 months||Add support for more then one irq bank and move initialization into sub-archs.|
|8 years 9 months||GPIO: Replace leftover JZ47XX_IRQ_GPIO(0) with jz_gpio_irq_base|
|8 years 9 months||Don't make any assumptions about which timers are used as sytem timers|
|8 years 9 months||Move 2nd level IRQ defintions to sub-arch specific files.|
|8 years 9 months||Generalize gpio support
Make GPIO-chip IRQ and GPIO IRQ base configurable and move GPIO-chip
initialization to the sub-archs.
|8 years 9 months||Split time.c into timer-cevt.c and timer-csrc.c
Make clocksource/clockevent timer channels and irq configurable and move
initalization to the sub-archs.
|8 years 9 months||MIPS: JZ47xx: Moved jz4740 headers to a subdirectory of mach-jz47xx/.|
Commit ac7a6e48373a3c56e727b4224a33afd24fd05cea, by Peter Zotov
|8 years 9 months||MIPS: JZ47xx: Fix a few naming issues.|
Commit fad288aff22be8618aeb6baa5c980f721226a5e1, by Peter Zotov