Date:2011-03-18 16:22:17 (11 years 6 months ago)
Author:Lars C.
Commit:2f1f65ef1e971c69b4901d8bc2eca196ffe84dc5
Message:FBDEV: JZ4740: Add basic jz4760 support

Files: arch/mips/include/asm/mach-jz47xx/jz4740_fb.h (1 diff)
drivers/video/Kconfig (1 diff)
drivers/video/jz4740_fb.c (6 diffs)

Change Details

arch/mips/include/asm/mach-jz47xx/jz4740_fb.h
2020enum jz4740_fb_lcd_type {
2121    JZ_LCD_TYPE_GENERIC_16_BIT = 0,
2222    JZ_LCD_TYPE_GENERIC_18_BIT = 0 | (1 << 4),
23    JZ_LCD_TYPE_GENERIC_24_BIT = 0 | (2 << 4),
2324    JZ_LCD_TYPE_SPECIAL_TFT_1 = 1,
2425    JZ_LCD_TYPE_SPECIAL_TFT_2 = 2,
2526    JZ_LCD_TYPE_SPECIAL_TFT_3 = 3,
drivers/video/Kconfig
23582358
23592359config FB_JZ4740
23602360    tristate "JZ4740 LCD framebuffer support"
2361    depends on FB && (MACH_JZ4740 || MACH_JZ4750L)
2361    depends on FB && (MACH_JZ4740 || MACH_JZ4750L || MACH_JZ4760)
23622362    select FB_SYS_FILLRECT
23632363    select FB_SYS_COPYAREA
23642364    select FB_SYS_IMAGEBLIT
drivers/video/jz4740_fb.c
6969#define JZ_LCD_CFG_DE_ACTIVE_LOW BIT(9)
7070#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW BIT(8)
7171#define JZ_LCD_CFG_18_BIT BIT(7)
72#define JZ_LCD_CFG_24_BIT BIT(6)
7273#define JZ_LCD_CFG_PDW (BIT(5) | BIT(4))
7374#define JZ_LCD_CFG_MODE_MASK 0xf
7475
...... 
146147    .accel = FB_ACCEL_NONE,
147148};
148149
150#ifdef CONFIG_MACH_JZ4760
151static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
152    { JZ_GPIO_PORTC(8), "LCD_PCLK", JZ4760_GPIO_C08_FUNC_LCD_PCLK },
153    { JZ_GPIO_PORTC(18), "LCD_HSYNC", JZ4760_GPIO_C18_FUNC_LCD_HSYNC },
154    { JZ_GPIO_PORTC(19), "LCD_VSYNC", JZ4760_GPIO_C19_FUNC_LCD_VSYNC },
155    { JZ_GPIO_PORTC(9), "LCD_DE", JZ4760_GPIO_C09_FUNC_LCD_DE },
156    { JZ_GPIO_PORTC(1), "LCD_PS", JZ4760_GPIO_C01_FUNC_LCD_PS },
157    { JZ_GPIO_PORTC(0), "LCD_REV", JZ4760_GPIO_C00_FUNC_LCD_REV },
158    { JZ_GPIO_PORTC(20), "LCD_CLS", JZ4760_GPIO_C20_FUNC_LCD_CLS },
159    { JZ_GPIO_PORTC(10), "LCD_SPL", JZ4760_GPIO_C10_FUNC_LCD_SPL },
160};
161#else
149162static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
150163    JZ_GPIO_BULK_PIN(LCD_PCLK),
151164    JZ_GPIO_BULK_PIN(LCD_HSYNC),
...... 
156169    JZ_GPIO_BULK_PIN(LCD_CLS),
157170    JZ_GPIO_BULK_PIN(LCD_SPL),
158171};
172#endif
159173
174#ifdef CONFIG_MACH_JZ4760
175static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
176    { JZ_GPIO_PORTC(0), "LCD_B0", JZ4760_GPIO_C00_FUNC_LCD_B0 },
177    { JZ_GPIO_PORTC(1), "LCD_B1", JZ4760_GPIO_C01_FUNC_LCD_B1 },
178    { JZ_GPIO_PORTC(2), "LCD_B2", JZ4760_GPIO_C02_FUNC_LCD_B2 },
179    { JZ_GPIO_PORTC(3), "LCD_B3", JZ4760_GPIO_C03_FUNC_LCD_B3 },
180    { JZ_GPIO_PORTC(4), "LCD_B4", JZ4760_GPIO_C04_FUNC_LCD_B4 },
181    { JZ_GPIO_PORTC(10), "LCD_G0", JZ4760_GPIO_C10_FUNC_LCD_G0 },
182    { JZ_GPIO_PORTC(11), "LCD_G1", JZ4760_GPIO_C11_FUNC_LCD_G1 },
183    { JZ_GPIO_PORTC(12), "LCD_G2", JZ4760_GPIO_C12_FUNC_LCD_G2 },
184    { JZ_GPIO_PORTC(13), "LCD_G3", JZ4760_GPIO_C13_FUNC_LCD_G3 },
185    { JZ_GPIO_PORTC(14), "LCD_G4", JZ4760_GPIO_C14_FUNC_LCD_G4 },
186    { JZ_GPIO_PORTC(15), "LCD_G5", JZ4760_GPIO_C15_FUNC_LCD_G5 },
187    { JZ_GPIO_PORTC(20), "LCD_R0", JZ4760_GPIO_C20_FUNC_LCD_R0 },
188    { JZ_GPIO_PORTC(21), "LCD_R1", JZ4760_GPIO_C21_FUNC_LCD_R1 },
189    { JZ_GPIO_PORTC(22), "LCD_R2", JZ4760_GPIO_C22_FUNC_LCD_R2 },
190    { JZ_GPIO_PORTC(23), "LCD_R3", JZ4760_GPIO_C23_FUNC_LCD_R3 },
191    { JZ_GPIO_PORTC(24), "LCD_R4", JZ4760_GPIO_C24_FUNC_LCD_R4 },
192
193    { JZ_GPIO_PORTC(5), "LCD_B5", JZ4760_GPIO_C05_FUNC_LCD_B5 },
194    { JZ_GPIO_PORTC(25), "LCD_R5", JZ4760_GPIO_C25_FUNC_LCD_R5 },
195
196    { JZ_GPIO_PORTC(6), "LCD_B6", JZ4760_GPIO_C06_FUNC_LCD_B6 },
197    { JZ_GPIO_PORTC(7), "LCD_B7", JZ4760_GPIO_C07_FUNC_LCD_B7 },
198    { JZ_GPIO_PORTC(16), "LCD_G6", JZ4760_GPIO_C16_FUNC_LCD_G6 },
199    { JZ_GPIO_PORTC(17), "LCD_G7", JZ4760_GPIO_C17_FUNC_LCD_G7 },
200    { JZ_GPIO_PORTC(26), "LCD_R6", JZ4760_GPIO_C26_FUNC_LCD_R6 },
201    { JZ_GPIO_PORTC(27), "LCD_R7", JZ4760_GPIO_C27_FUNC_LCD_R7 },
202};
203#else
160204static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
161205    JZ_GPIO_BULK_PIN(LCD_DATA0),
162206    JZ_GPIO_BULK_PIN(LCD_DATA1),
...... 
177221    JZ_GPIO_BULK_PIN(LCD_DATA16),
178222    JZ_GPIO_BULK_PIN(LCD_DATA17),
179223};
224#endif
180225
181226static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb)
182227{
...... 
214259        break;
215260    case JZ_LCD_TYPE_GENERIC_18_BIT:
216261        num = 18;
262    break;
263    case JZ_LCD_TYPE_GENERIC_24_BIT:
264        num = 24;
217265        break;
218266    case JZ_LCD_TYPE_8BIT_SERIAL:
219267        num = 8;
...... 
422470
423471    if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
424472        cfg |= JZ_LCD_CFG_18_BIT;
473    else if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_24_BIT)
474        cfg |= JZ_LCD_CFG_24_BIT;
425475
426476    if (mode->pixclock) {
427477        rate = PICOS2KHZ(mode->pixclock) * 1000;

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