Date:2010-07-15 22:45:16 (13 years 5 months ago)
Author:Lars C.
Commit:629b230c9b2ead5c9dc2dfb1c9ddf446259ea59b
Message:MMC: jz4740: Avoid reloading the fifo address before each read/write

This improves performance a bit
Files: drivers/mmc/host/jz4740_mmc.c (16 diffs)

Change Details

drivers/mmc/host/jz4740_mmc.c
195195
196196    mmc_request_done(host->mmc, req);
197197}
198
198199static unsigned int jz4740_mmc_poll_irq(struct jz4740_mmc_host *host,
199200    unsigned int irq)
200201{
201    unsigned int timeout = 1000;
202    unsigned int timeout = 0x800;
202203    uint16_t status;
203204
204205    do {
...... 
236237    struct mmc_data *data)
237238{
238239    struct sg_mapping_iter *miter = &host->miter;
240    void __iomem *fifo_addr = host->base + JZ_REG_MMC_TXFIFO;
239241    uint32_t *buf;
240242    bool timeout;
241243    size_t i, j;
...... 
250252            if (unlikely(timeout))
251253                goto poll_timeout;
252254
253            writel(buf[0], host->base + JZ_REG_MMC_TXFIFO);
254            writel(buf[1], host->base + JZ_REG_MMC_TXFIFO);
255            writel(buf[2], host->base + JZ_REG_MMC_TXFIFO);
256            writel(buf[3], host->base + JZ_REG_MMC_TXFIFO);
257            writel(buf[4], host->base + JZ_REG_MMC_TXFIFO);
258            writel(buf[5], host->base + JZ_REG_MMC_TXFIFO);
259            writel(buf[6], host->base + JZ_REG_MMC_TXFIFO);
260            writel(buf[7], host->base + JZ_REG_MMC_TXFIFO);
255            writel(buf[0], fifo_addr);
256            writel(buf[1], fifo_addr);
257            writel(buf[2], fifo_addr);
258            writel(buf[3], fifo_addr);
259            writel(buf[4], fifo_addr);
260            writel(buf[5], fifo_addr);
261            writel(buf[6], fifo_addr);
262            writel(buf[7], fifo_addr);
261263            buf += 8;
262264            --j;
263265        }
...... 
267269                goto poll_timeout;
268270
269271            while (i) {
270                writel(*buf, host->base + JZ_REG_MMC_TXFIFO);
272                writel(*buf, fifo_addr);
271273                ++buf;
272274                --i;
273275            }
...... 
290292                struct mmc_data *data)
291293{
292294    struct sg_mapping_iter *miter = &host->miter;
295    void __iomem *fifo_addr = host->base + JZ_REG_MMC_RXFIFO;
293296    uint32_t *buf;
294297    uint32_t d;
295298    uint16_t status;
...... 
306309            if (unlikely(timeout))
307310                goto poll_timeout;
308311
309            buf[0] = readl(host->base + JZ_REG_MMC_RXFIFO);
310            buf[1] = readl(host->base + JZ_REG_MMC_RXFIFO);
311            buf[2] = readl(host->base + JZ_REG_MMC_RXFIFO);
312            buf[3] = readl(host->base + JZ_REG_MMC_RXFIFO);
313            buf[4] = readl(host->base + JZ_REG_MMC_RXFIFO);
314            buf[5] = readl(host->base + JZ_REG_MMC_RXFIFO);
315            buf[6] = readl(host->base + JZ_REG_MMC_RXFIFO);
316            buf[7] = readl(host->base + JZ_REG_MMC_RXFIFO);
312            buf[0] = readl(fifo_addr);
313            buf[1] = readl(fifo_addr);
314            buf[2] = readl(fifo_addr);
315            buf[3] = readl(fifo_addr);
316            buf[4] = readl(fifo_addr);
317            buf[5] = readl(fifo_addr);
318            buf[6] = readl(fifo_addr);
319            buf[7] = readl(fifo_addr);
317320
318321            buf += 8;
319322            --j;
...... 
325328                goto poll_timeout;
326329
327330            while (i >= 4) {
328                *buf++ = readl(host->base + JZ_REG_MMC_RXFIFO);
331                *buf++ = readl(fifo_addr);
329332                i -= 4;
330333            }
331334            if (unlikely(i > 0)) {
332                d = readl(host->base + JZ_REG_MMC_RXFIFO);
335                d = readl(fifo_addr);
333336                memcpy(buf, &d, i);
334337            }
335338        }
...... 
346349    timeout = 1000;
347350    status = readl(host->base + JZ_REG_MMC_STATUS);
348351    while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) {
349        d = readl(host->base + JZ_REG_MMC_RXFIFO);
352        d = readl(fifo_addr);
350353        status = readl(host->base + JZ_REG_MMC_STATUS);
351354    }
352355
...... 
378381{
379382    int i;
380383    uint16_t tmp;
384    void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO;
381385
382386    if (cmd->flags & MMC_RSP_136) {
383        tmp = readw(host->base + JZ_REG_MMC_RESP_FIFO);
387        tmp = readw(fifo_addr);
384388        for (i = 0; i < 4; ++i) {
385389            cmd->resp[i] = tmp << 24;
386            tmp = readw(host->base + JZ_REG_MMC_RESP_FIFO);
390            tmp = readw(fifo_addr);
387391            cmd->resp[i] |= tmp << 8;
388            tmp = readw(host->base + JZ_REG_MMC_RESP_FIFO);
392            tmp = readw(fifo_addr);
389393            cmd->resp[i] |= tmp >> 8;
390394        }
391395    } else {
392        cmd->resp[0] = readw(host->base + JZ_REG_MMC_RESP_FIFO) << 24;
393        cmd->resp[0] |= readw(host->base + JZ_REG_MMC_RESP_FIFO) << 8;
394        cmd->resp[0] |= readw(host->base + JZ_REG_MMC_RESP_FIFO) & 0xff;
396        cmd->resp[0] = readw(fifo_addr) << 24;
397        cmd->resp[0] |= readw(fifo_addr) << 8;
398        cmd->resp[0] |= readw(fifo_addr) & 0xff;
395399    }
396400}
397401
...... 
447451    struct mmc_data *data = cmd->data;
448452    int direction;
449453
450    if (cmd->data->flags & MMC_DATA_READ)
454    if (data->flags & MMC_DATA_READ)
451455        direction = SG_MITER_TO_SG;
452456    else
453457        direction = SG_MITER_FROM_SG;
...... 
461465    struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)devid;
462466    struct mmc_command *cmd = host->req->cmd;
463467    struct mmc_request *req = host->req;
464    bool timedout = false;
468    bool timeout = false;
465469
466470    if (cmd->error)
467471        host->state = JZ4740_MMC_STATE_DONE;
...... 
478482
479483    case JZ4740_MMC_STATE_TRANSFER_DATA:
480484        if (cmd->data->flags & MMC_DATA_READ)
481            timedout = jz4740_mmc_read_data(host, cmd->data);
485            timeout = jz4740_mmc_read_data(host, cmd->data);
482486        else
483            timedout = jz4740_mmc_write_data(host, cmd->data);
487            timeout = jz4740_mmc_write_data(host, cmd->data);
484488
485        if (unlikely(timedout)) {
489        if (unlikely(timeout)) {
486490            host->state = JZ4740_MMC_STATE_TRANSFER_DATA;
487491            break;
488492        }
489493
490494        jz4740_mmc_transfer_check_state(host, cmd->data);
491495
492        timedout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE);
493        if (unlikely(timedout)) {
496        timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE);
497        if (unlikely(timeout)) {
494498            host->state = JZ4740_MMC_STATE_SEND_STOP;
495499            break;
496500        }
...... 
502506
503507        jz4740_mmc_send_command(host, req->stop);
504508
505        timedout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_PRG_DONE);
506        if (timedout) {
509        timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_PRG_DONE);
510        if (timeout) {
507511            host->state = JZ4740_MMC_STATE_DONE;
508512            break;
509513        }
...... 
511515        break;
512516    }
513517
514    if (!timedout)
518    if (!timeout)
515519        jz4740_mmc_request_done(host);
516520
517521    return IRQ_HANDLED;
...... 
520524static irqreturn_t jz_mmc_irq(int irq, void *devid)
521525{
522526    struct jz4740_mmc_host *host = devid;
527    struct mmc_command *cmd = host->cmd;
523528    uint16_t irq_reg, status, tmp;
524529
525530    irq_reg = readw(host->base + JZ_REG_MMC_IREG);
...... 
539544        irq_reg &= ~JZ_MMC_IRQ_SDIO;
540545    }
541546
542    if (host->req && host->cmd && irq_reg) {
547    if (host->req && cmd && irq_reg) {
543548        if (test_and_clear_bit(0, &host->waiting)) {
544549            del_timer(&host->timeout_timer);
545550
546551            status = readl(host->base + JZ_REG_MMC_STATUS);
547552
548553            if (status & JZ_MMC_STATUS_TIMEOUT_RES) {
549                host->cmd->error = -ETIMEDOUT;
554                    cmd->error = -ETIMEDOUT;
550555            } else if (status & JZ_MMC_STATUS_CRC_RES_ERR) {
551                host->cmd->error = -EIO;
556                    cmd->error = -EIO;
552557            } else if (status & (JZ_MMC_STATUS_CRC_READ_ERROR |
553558                    JZ_MMC_STATUS_CRC_WRITE_ERROR)) {
554                host->cmd->data->error = -EIO;
559                    if (cmd->data)
560                            cmd->data->error = -EIO;
561                    cmd->error = -EIO;
555562            } else if (status & (JZ_MMC_STATUS_CRC_READ_ERROR |
556563                    JZ_MMC_STATUS_CRC_WRITE_ERROR)) {
557                host->cmd->data->error = -EIO;
564                    if (cmd->data)
565                            cmd->data->error = -EIO;
566                    cmd->error = -EIO;
558567            }
559568
560569            jz4740_mmc_set_irq_enabled(host, irq_reg, false);

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