Date:2012-04-12 18:37:33 (8 years 7 months ago)
Author:Maarten ter Huurne
Commit:6c19f27c831d470cbed52ab7214fb2dfae8563f9
Message:MIPS: JZ4740: Use round robin DMA channel priority mode.

Round robin is performed over two priority groups of 3 channels each,
so an argument was added to jz4740_dma_request() to select priority group.
Files: arch/mips/include/asm/mach-jz4740/dma.h (1 diff)
arch/mips/jz4740/dma.c (3 diffs)
sound/soc/jz4740/jz4740-pcm.c (1 diff)

Change Details

arch/mips/include/asm/mach-jz4740/dma.h
6868
6969typedef void (*jz4740_dma_complete_callback_t)(struct jz4740_dma_chan *, int, void *);
7070
71struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name);
71/*
72 * The 'prio' argument selects priority group: 0 (high) or 1 (low).
73 * There are 3 DMA channels available per group.
74 */
75struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name, int prio);
7276void jz4740_dma_free(struct jz4740_dma_chan *dma);
7377
7478void jz4740_dma_configure(struct jz4740_dma_chan *dma,
arch/mips/jz4740/dma.c
6363#define JZ_DMA_CMD_TRANSFER_SIZE_OFFSET 8
6464#define JZ_DMA_CMD_MODE_OFFSET 7
6565
66#define JZ_DMA_CTRL_PRIORITY_MASK (0x3 << 8)
67#define JZ_DMA_CTRL_HALT BIT(3)
68#define JZ_DMA_CTRL_ADDRESS_ERROR BIT(2)
69#define JZ_DMA_CTRL_ENABLE BIT(0)
66#define JZ_DMA_CTRL_PRIORITY_012345 (0x0 << 8)
67#define JZ_DMA_CTRL_PRIORITY_023145 (0x1 << 8)
68#define JZ_DMA_CTRL_PRIORITY_201345 (0x2 << 8)
69#define JZ_DMA_CTRL_PRIORITY_ROUND_ROBIN (0x3 << 8)
70#define JZ_DMA_CTRL_PRIORITY_MASK (0x3 << 8)
71#define JZ_DMA_CTRL_HALT BIT(3)
72#define JZ_DMA_CTRL_ADDRESS_ERROR BIT(2)
73#define JZ_DMA_CTRL_ENABLE BIT(0)
7074
7175
7276static void __iomem *jz4740_dma_base;
...... 
115119    JZ4740_DMA_CHANNEL(5),
116120};
117121
118struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name)
122struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name,
123                       int prio)
119124{
120125    unsigned int i;
121126    struct jz4740_dma_chan *dma = NULL;
122127
128    if (prio < 0 || prio > 1)
129        return NULL;
130
123131    spin_lock(&jz4740_dma_lock);
124132
125    for (i = 0; i < ARRAY_SIZE(jz4740_dma_channels); ++i) {
133    for (i = prio * 3; i < prio * 3 + 3; ++i) {
126134        if (!jz4740_dma_channels[i].used) {
127135            dma = &jz4740_dma_channels[i];
128136            dma->used = 1;
...... 
271279    unsigned int ret;
272280
273281    jz4740_dma_base = ioremap(JZ4740_DMAC_BASE_ADDR, 0x400);
274
275282    if (!jz4740_dma_base)
276283        return -EBUSY;
277284
278285    spin_lock_init(&jz4740_dma_lock);
279286
280287    ret = request_irq(JZ4740_IRQ_DMAC, jz4740_dma_irq, 0, "DMA", NULL);
281
282    if (ret)
288    if (ret) {
283289        printk(KERN_ERR "JZ4740 DMA: Failed to request irq: %d\n", ret);
290        goto err_iounmap;
291    }
292
293    jz4740_dma_write_mask(JZ_REG_DMA_CTRL,
294                  JZ_DMA_CTRL_PRIORITY_ROUND_ROBIN,
295                  JZ_DMA_CTRL_PRIORITY_MASK);
296
297    return 0;
284298
299err_iounmap:
300    iounmap(jz4740_dma_base);
285301    return ret;
286302}
287303arch_initcall(jz4740_dma_init);
sound/soc/jz4740/jz4740-pcm.c
109109
110110    if (!prtd->dma) {
111111        if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
112            prtd->dma = jz4740_dma_request(substream, "PCM Capture");
112            prtd->dma = jz4740_dma_request(substream,
113                               "PCM Capture", 0);
113114        else
114            prtd->dma = jz4740_dma_request(substream, "PCM Playback");
115            prtd->dma = jz4740_dma_request(substream,
116                               "PCM Playback", 0);
115117    }
116118
117119    if (!prtd->dma)

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