Kernel Commit Details
|Date:||2011-06-19 10:49:19 (1 year 11 months ago)|
|Author:||Maarten ter Huurne|
|Message:||MIPS: JZ4740: cpufreq: Set CE bit after PLL freq change.
This fixes I/O errors when reading from SD card.
I guess this is a hardware quirk: I even tried writing the current value
with the same routine and that had no effect, so it is not some side effect
that avoids the I/O errors, it is actually the CE bit that matters.
arch/mips/jz4740/clock.c (1 diff)
|367||367||: "r" (jz_clock_base + JZ_REG_CLOCK_PLL), "r" (plcr1));|
|369||/* MtH: For some reason the MSC will have problems if this flag is not|
|370||restored, even though the MSC is supposedly the only divider|
|371||that is not affected by this flag. */|