Date:2012-03-30 15:47:30 (8 years 6 months ago)
Author:Maarten ter Huurne
Commit:b386be689295730688885552666ea40b2e639b14
Message:Revert "MIPS: JZ4740: reset: Initialize hibernate wakeup counters."

This reverts commit 9fe93785649cf0a8db58da462d6cfaca8aa50278.

The patch will be improved to get it accepted upstream.
Files: arch/mips/jz4740/reset.c (2 diffs)

Change Details

arch/mips/jz4740/reset.c
2121#include <asm/mach-jz4740/base.h>
2222#include <asm/mach-jz4740/timer.h>
2323
24#include "reset.h"
25#include "clock.h"
26
2724static void jz4740_halt(void)
2825{
2926    while (1) {
...... 
5653    jz4740_halt();
5754}
5855
59#define JZ_REG_RTC_CTRL 0x00
60#define JZ_REG_RTC_HIBERNATE 0x20
61#define JZ_REG_RTC_WAKEUP_FILTER 0x24
62#define JZ_REG_RTC_RESET_COUNTER 0x28
56#define JZ_REG_RTC_CTRL 0x00
57#define JZ_REG_RTC_HIBERNATE 0x20
6358
64#define JZ_RTC_CTRL_WRDY BIT(7)
65#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0
66#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0
59#define JZ_RTC_CTRL_WRDY BIT(7)
6760
68static inline void jz4740_rtc_wait_ready(void __iomem *rtc_base)
61static void jz4740_power_off(void)
6962{
63    void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x24);
7064    uint32_t ctrl;
65
7166    do {
7267        ctrl = readl(rtc_base + JZ_REG_RTC_CTRL);
7368    } while (!(ctrl & JZ_RTC_CTRL_WRDY));
74}
7569
76static void jz4740_power_off(void)
77{
78    void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);
79    unsigned long long wakeup_filter_ticks;
80    unsigned long long reset_counter_ticks;
81
82    /* Set minimum wakeup pin assertion time: 100 ms.
83       Range is 0 to 2 sec if RTC is clocked at 32 kHz. */
84    wakeup_filter_ticks = (100 * jz4740_clock_bdata.rtc_rate) / 1000;
85    if (wakeup_filter_ticks < JZ_RTC_WAKEUP_FILTER_MASK)
86        wakeup_filter_ticks &= JZ_RTC_WAKEUP_FILTER_MASK;
87    else
88        wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
89    jz4740_rtc_wait_ready(rtc_base);
90    writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER);
91
92    /* Set reset pin low-level assertion time after wakeup: 60 ms.
93       Range is 0 to 125 ms if RTC is clocked at 32 kHz. */
94    reset_counter_ticks = (60 * jz4740_clock_bdata.rtc_rate) / 1000;
95    if (reset_counter_ticks < JZ_RTC_RESET_COUNTER_MASK)
96        reset_counter_ticks &= JZ_RTC_RESET_COUNTER_MASK;
97    else
98        reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK;
99    jz4740_rtc_wait_ready(rtc_base);
100    writel(reset_counter_ticks, rtc_base + JZ_REG_RTC_RESET_COUNTER);
101
102    jz4740_rtc_wait_ready(rtc_base);
10370    writel(1, rtc_base + JZ_REG_RTC_HIBERNATE);
104
10571    jz4740_halt();
10672}
10773

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