Date:2012-09-15 18:34:30 (7 years 8 months ago)
Author:Lars C.
Commit:d8b0b5ca4e22bc58adf579946c0a06adaeed122b
Message:ASoC: jz4740: Use regmap

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Files: sound/soc/codecs/Kconfig (1 diff)
sound/soc/codecs/jz4740.c (12 diffs)

Change Details

sound/soc/codecs/Kconfig
211211    tristate
212212
213213config SND_SOC_JZ4740_CODEC
214    select REGMAP_MMIO
214215    tristate
215216
216217config SND_SOC_L3
sound/soc/codecs/jz4740.c
1616#include <linux/platform_device.h>
1717#include <linux/slab.h>
1818#include <linux/io.h>
19#include <linux/regmap.h>
1920
2021#include <linux/delay.h>
2122
...... 
2728#include <sound/tlv.h>
2829
2930#define JZ4740_REG_CODEC_1 0x0
30#define JZ4740_REG_CODEC_2 0x1
31#define JZ4740_REG_CODEC_2 0x4
3132
3233#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
3334#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
...... 
6869#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
6970#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
7071
71static const uint32_t jz4740_codec_regs[] = {
72    0x021b2302, 0x00170803,
72static const struct reg_default jz4740_codec_reg_defaults[] = {
73    { JZ4740_REG_CODEC_1, 0x021b2302 },
74    { JZ4740_REG_CODEC_2, 0x00170803 },
7375};
7476
7577struct jz4740_codec {
76    void __iomem *base;
78    struct regmap *regmap;
7779};
7880
79static unsigned int jz4740_codec_read(struct snd_soc_codec *codec,
80    unsigned int reg)
81{
82    struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
83    return readl(jz4740_codec->base + (reg << 2));
84}
85
86static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
87    unsigned int val)
88{
89    struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
90    u32 *cache = codec->reg_cache;
91
92    cache[reg] = val;
93    writel(val, jz4740_codec->base + (reg << 2));
94
95    return 0;
96}
97
9881static const unsigned int jz4740_mic_tlv[] = {
9982    TLV_DB_RANGE_HEAD(2),
10083    0, 2, TLV_DB_SCALE_ITEM(0, 600, 0),
...... 
172155static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
173156    struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
174157{
158    struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(dai->codec);
175159    uint32_t val;
176    struct snd_soc_codec *codec = dai->codec;
177160
178161    switch (params_rate(params)) {
179162    case 8000:
...... 
209192
210193    val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
211194
212    snd_soc_update_bits(codec, JZ4740_REG_CODEC_2,
195    regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_2,
213196                JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
214197
215198    return 0;
...... 
239222    .symmetric_rates = 1,
240223};
241224
242static void jz4740_codec_wakeup(struct snd_soc_codec *codec)
225static void jz4740_codec_wakeup(struct regmap *regmap)
243226{
244    int i;
245    uint32_t *cache = codec->reg_cache;
246
247    snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
227    regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
248228        JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
249229    udelay(2);
250230
251    snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
231    regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
252232        JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
253233
254    for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i)
255        jz4740_codec_write(codec, i, cache[i]);
234    regcache_sync(regmap);
256235}
257236
258237static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
259238    enum snd_soc_bias_level level)
260239{
240    struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
241    struct regmap *regmap = jz4740_codec->regmap;
261242    unsigned int mask;
262243    unsigned int value;
263244
...... 
267248    case SND_SOC_BIAS_PREPARE:
268249        mask = JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
269250        value = 0;
270        snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
251        regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
271252
272253        msleep(500);
273254        mask = JZ4740_CODEC_1_VREF_DISABLE |
274255                        JZ4740_CODEC_1_VREF_AMP_DISABLE;
275        snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, 0);
256        regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, 0);
276257        break;
277258    case SND_SOC_BIAS_STANDBY:
278259        /* The only way to clear the suspend flag is to reset the codec */
279260        if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
280            jz4740_codec_wakeup(codec);
261            jz4740_codec_wakeup(regmap);
281262
282263        mask = JZ4740_CODEC_1_VREF_DISABLE |
283264            JZ4740_CODEC_1_VREF_AMP_DISABLE |
...... 
286267            JZ4740_CODEC_1_VREF_AMP_DISABLE |
287268            JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
288269
289        snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
270        regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
290271        break;
291272    case SND_SOC_BIAS_OFF:
292273        mask = JZ4740_CODEC_1_SUSPEND;
293274        value = JZ4740_CODEC_1_SUSPEND;
294275
295        snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
276        regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
277        regcache_mark_dirty(regmap);
296278        break;
297279    default:
298280        break;
...... 
305287
306288static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
307289{
308    snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
290    struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
291
292    regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_1,
309293            JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
310294
311295    jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
...... 
342326    .remove = jz4740_codec_dev_remove,
343327    .suspend = jz4740_codec_suspend,
344328    .resume = jz4740_codec_resume,
345    .read = jz4740_codec_read,
346    .write = jz4740_codec_write,
347329    .set_bias_level = jz4740_codec_set_bias_level,
348    .reg_cache_default = jz4740_codec_regs,
349    .reg_word_size = sizeof(u32),
350    .reg_cache_size = 2,
351330
352331    .controls = jz4740_codec_controls,
353332    .num_controls = ARRAY_SIZE(jz4740_codec_controls),
...... 
357336    .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
358337};
359338
339static const struct regmap_config jz4740_codec_regmap_config = {
340    .reg_bits = 32,
341    .reg_stride = 4,
342    .val_bits = 32,
343    .max_register = JZ4740_REG_CODEC_2,
344
345    .reg_defaults = jz4740_codec_reg_defaults,
346    .num_reg_defaults = ARRAY_SIZE(jz4740_codec_reg_defaults),
347    .cache_type = REGCACHE_RBTREE,
348};
349
360350static int __devinit jz4740_codec_probe(struct platform_device *pdev)
361351{
362352    int ret;
363353    struct jz4740_codec *jz4740_codec;
364354    struct resource *mem;
355    void __iomem *base;
365356
366357    jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec),
367358                    GFP_KERNEL);
...... 
369360        return -ENOMEM;
370361
371362    mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
372    jz4740_codec->base = devm_request_and_ioremap(&pdev->dev, mem);
373    if (!jz4740_codec->base)
363    base = devm_request_and_ioremap(&pdev->dev, mem);
364    if (!base)
374365        return -EBUSY;
375366
367    jz4740_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
368                        &jz4740_codec_regmap_config);
369    if (IS_ERR(jz4740_codec->regmap))
370        return PTR_ERR(jz4740_codec->regmap);
371
376372    platform_set_drvdata(pdev, jz4740_codec);
377373
378374    ret = snd_soc_register_codec(&pdev->dev,

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