Date:2011-03-18 16:23:47 (11 years 6 months ago)
Author:Lars C.
Commit:f7ff3ac29e1ea89205a589c6e77199f3621ee518
Message:MIPS: JZ4760: Add more platform device defintions

Files: arch/mips/include/asm/mach-jz47xx/jz4760/platform.h (1 diff)
arch/mips/jz47xx/jz4760/platform.c (3 diffs)

Change Details

arch/mips/include/asm/mach-jz47xx/jz4760/platform.h
1919
2020#include <linux/platform_device.h>
2121
22extern struct platform_device jz4760_rtc_device;
23extern struct platform_device jz4760_nand_device;
24extern struct platform_device jz4760_usb_ohci_device;
25extern struct platform_device jz4760_mmc0_device;
26extern struct platform_device jz4760_mmc1_device;
27extern struct platform_device jz4760_mmc2_device;
28extern struct platform_device jz4760_framebuffer_device;
29extern struct platform_device jz4760_adc_device;
2230void jz4760_serial_device_register(void);
2331
2432#endif
arch/mips/jz47xx/jz4760/platform.c
2424#include <jz4760/platform.h>
2525#include <jz4760/irq.h>
2626
27#include <asm/mach-jz47xx/base.h>
27#include <asm/mach-jz47xx/jz4760/base.h>
2828
2929#include <linux/serial_core.h>
3030#include <linux/serial_8250.h>
...... 
3232#include "../serial.h"
3333#include "../clock.h"
3434
35/* NAND controller */
36static struct resource jz4760_nand_resources[] = {
37    {
38        .name = "mmio",
39        .start = JZ47XX_EMC_BASE_ADDR,
40        .end = JZ47XX_EMC_BASE_ADDR + 0x1000 - 1,
41        .flags = IORESOURCE_MEM,
42    },
43    {
44        .name = "bch",
45        .start = JZ4760_BCH_BASE_ADDR,
46        .end = JZ4760_BCH_BASE_ADDR + 0x10000 - 1,
47        .flags = IORESOURCE_MEM,
48    },
49    {
50        .name = "bank",
51        .start = 0x1A000000,
52        .end = 0x1A0C0000 - 1,
53        .flags = IORESOURCE_MEM,
54    },
55};
56
57struct platform_device jz4760_nand_device = {
58    .name = "jz4750-nand",
59    .num_resources = ARRAY_SIZE(jz4760_nand_resources),
60    .resource = jz4760_nand_resources,
61};
62
63/* RTC controller */
64static struct resource jz4760_rtc_resources[] = {
65    {
66        .start = JZ47XX_RTC_BASE_ADDR,
67        .end = JZ47XX_RTC_BASE_ADDR + 0x38 - 1,
68        .flags = IORESOURCE_MEM,
69    },
70    {
71        .start = JZ4760_IRQ_RTC,
72        .end = JZ4760_IRQ_RTC,
73        .flags = IORESOURCE_IRQ,
74    },
75};
76
77struct platform_device jz4760_rtc_device = {
78    .name = "jz4740-rtc",
79    .id = -1,
80    .num_resources = ARRAY_SIZE(jz4760_rtc_resources),
81    .resource = jz4760_rtc_resources,
82};
83
84/* OHCI controller */
85static struct resource jz4760_usb_ohci_resources[] = {
86    {
87        .start = JZ4760_UHC_BASE_ADDR,
88        .end = JZ4760_UHC_BASE_ADDR + 0x1000 - 1,
89        .flags = IORESOURCE_MEM,
90    },
91    {
92        .start = JZ4760_IRQ_UHC,
93        .end = JZ4760_IRQ_UHC,
94        .flags = IORESOURCE_IRQ,
95    },
96};
97
98struct platform_device jz4760_usb_ohci_device = {
99    .name = "jz4740-ohci",
100    .id = -1,
101    .dev = {
102        .dma_mask = &jz4760_usb_ohci_device.dev.coherent_dma_mask,
103        .coherent_dma_mask = DMA_BIT_MASK(32),
104    },
105    .num_resources = ARRAY_SIZE(jz4760_usb_ohci_resources),
106    .resource = jz4760_usb_ohci_resources,
107};
108
109/* MMC/SD controller */
110static struct resource jz4760_mmc0_resources[] = {
111    {
112        .start = JZ47XX_MSC0_BASE_ADDR,
113        .end = JZ47XX_MSC0_BASE_ADDR + 0x1000 - 1,
114        .flags = IORESOURCE_MEM,
115    },
116    {
117        .start = JZ4760_IRQ_MSC0,
118        .end = JZ4760_IRQ_MSC0,
119        .flags = IORESOURCE_IRQ,
120    }
121};
122
123struct platform_device jz4760_mmc0_device = {
124    .name = "jz4740-mmc",
125    .id = 0,
126    .dev = {
127        .dma_mask = &jz4760_mmc0_device.dev.coherent_dma_mask,
128        .coherent_dma_mask = DMA_BIT_MASK(32),
129    },
130    .num_resources = ARRAY_SIZE(jz4760_mmc0_resources),
131    .resource = jz4760_mmc0_resources,
132};
133
134static struct resource jz4760_mmc1_resources[] = {
135    {
136        .start = JZ47XX_MSC1_BASE_ADDR,
137        .end = JZ47XX_MSC1_BASE_ADDR + 0x1000 - 1,
138        .flags = IORESOURCE_MEM,
139    },
140    {
141        .start = JZ4760_IRQ_MSC1,
142        .end = JZ4760_IRQ_MSC1,
143        .flags = IORESOURCE_IRQ,
144    }
145};
146
147struct platform_device jz4760_mmc1_device = {
148    .name = "jz4740-mmc",
149    .id = 1,
150    .dev = {
151        .dma_mask = &jz4760_mmc1_device.dev.coherent_dma_mask,
152        .coherent_dma_mask = DMA_BIT_MASK(32),
153    },
154    .num_resources = ARRAY_SIZE(jz4760_mmc1_resources),
155    .resource = jz4760_mmc1_resources,
156};
157
158static struct resource jz4760_mmc2_resources[] = {
159    {
160        .start = JZ47XX_MSC2_BASE_ADDR,
161        .end = JZ47XX_MSC2_BASE_ADDR + 0x1000 - 1,
162        .flags = IORESOURCE_MEM,
163    },
164    {
165        .start = JZ4760_IRQ_MSC2,
166        .end = JZ4760_IRQ_MSC2,
167        .flags = IORESOURCE_IRQ,
168    }
169};
170
171
172struct platform_device jz4760_mmc2_device = {
173    .name = "jz4740-mmc",
174    .id = 2,
175    .dev = {
176        .dma_mask = &jz4760_mmc2_device.dev.coherent_dma_mask,
177        .coherent_dma_mask = DMA_BIT_MASK(32),
178    },
179    .num_resources = ARRAY_SIZE(jz4760_mmc2_resources),
180    .resource = jz4760_mmc2_resources,
181};
182
183/* LCD controller */
184static struct resource jz4760_framebuffer_resources[] = {
185    {
186        .start = JZ47XX_LCD_BASE_ADDR,
187        .end = JZ47XX_LCD_BASE_ADDR + 0x1000 - 1,
188        .flags = IORESOURCE_MEM,
189    },
190};
191
192struct platform_device jz4760_framebuffer_device = {
193    .name = "jz4740-fb",
194    .id = -1,
195    .num_resources = ARRAY_SIZE(jz4760_framebuffer_resources),
196    .resource = jz4760_framebuffer_resources,
197    .dev = {
198        .dma_mask = &jz4760_framebuffer_device.dev.coherent_dma_mask,
199        .coherent_dma_mask = DMA_BIT_MASK(32),
200    },
201};
202
203/* ADC controller */
204static struct resource jz4760_adc_resources[] = {
205    {
206        .start = JZ47XX_SADC_BASE_ADDR,
207        .end = JZ47XX_SADC_BASE_ADDR + 0x30,
208        .flags = IORESOURCE_MEM,
209    },
210    {
211        .start = JZ4760_IRQ_SADC,
212        .end = JZ4760_IRQ_SADC,
213        .flags = IORESOURCE_IRQ,
214    },
215    {
216        .start = JZ4760_IRQ_ADC_BASE,
217        .end = JZ4760_IRQ_ADC_BASE,
218        .flags = IORESOURCE_IRQ,
219    },
220};
221
222struct platform_device jz4760_adc_device = {
223    .name = "jz4740-adc",
224    .id = -1,
225    .num_resources = ARRAY_SIZE(jz4760_adc_resources),
226    .resource = jz4760_adc_resources,
227};
228
35229/* Serial */
36230#define JZ4760_UART_DATA(_id) \
37231    { \
...... 
63257    struct plat_serial8250_port *p;
64258
65259    for (p = jz4760_uart_data; p->flags != 0; ++p)
66        p->uartclk = jz4740_clock_bdata.ext_rate;
260        p->uartclk = jz47xx_clock_bdata.ext_rate;
67261
68262    platform_device_register(&jz4760_uart_device);
69263}

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