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Source at commit 3bccc7fe4ff139bbc44bfff64752936e823cd95f created 12 years 9 months ago. By Maarten ter Huurne, MIPS: JZ4740: SLCD framebufer driver | |
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1 | /* |
2 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
3 | * JZ4740 SoC LCD framebuffer driver |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2 of the License, or (at your |
8 | * option) any later version. |
9 | * |
10 | * You should have received a copy of the GNU General Public License along |
11 | * with this program; if not, write to the Free Software Foundation, Inc., |
12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
13 | * |
14 | */ |
15 | |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> |
18 | #include <linux/mutex.h> |
19 | #include <linux/platform_device.h> |
20 | |
21 | #include <linux/clk.h> |
22 | #include <linux/delay.h> |
23 | |
24 | #include <linux/console.h> |
25 | #include <linux/fb.h> |
26 | |
27 | #include <linux/dma-mapping.h> |
28 | |
29 | #include <asm/mach-jz4740/jz4740_fb.h> |
30 | #include <asm/mach-jz4740/gpio.h> |
31 | |
32 | #include "jz4740_lcd.h" |
33 | |
34 | struct jzfb_framedesc { |
35 | uint32_t next; |
36 | uint32_t addr; |
37 | uint32_t id; |
38 | uint32_t cmd; |
39 | } __packed; |
40 | |
41 | struct jzfb { |
42 | struct fb_info *fb; |
43 | struct platform_device *pdev; |
44 | void __iomem *base; |
45 | struct resource *mem; |
46 | struct jz4740_fb_platform_data *pdata; |
47 | |
48 | size_t vidmem_size; |
49 | void *vidmem; |
50 | dma_addr_t vidmem_phys; |
51 | struct jzfb_framedesc *framedesc; |
52 | dma_addr_t framedesc_phys; |
53 | |
54 | struct clk *ldclk; |
55 | struct clk *lpclk; |
56 | |
57 | unsigned is_enabled:1; |
58 | struct mutex lock; |
59 | |
60 | uint32_t pseudo_palette[16]; |
61 | }; |
62 | |
63 | static const struct fb_fix_screeninfo jzfb_fix = { |
64 | .id = "JZ4740 FB", |
65 | .type = FB_TYPE_PACKED_PIXELS, |
66 | .visual = FB_VISUAL_TRUECOLOR, |
67 | .xpanstep = 0, |
68 | .ypanstep = 0, |
69 | .ywrapstep = 0, |
70 | .accel = FB_ACCEL_NONE, |
71 | }; |
72 | |
73 | static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = { |
74 | JZ_GPIO_BULK_PIN(LCD_PCLK), |
75 | JZ_GPIO_BULK_PIN(LCD_HSYNC), |
76 | JZ_GPIO_BULK_PIN(LCD_VSYNC), |
77 | JZ_GPIO_BULK_PIN(LCD_DE), |
78 | JZ_GPIO_BULK_PIN(LCD_PS), |
79 | JZ_GPIO_BULK_PIN(LCD_REV), |
80 | JZ_GPIO_BULK_PIN(LCD_CLS), |
81 | JZ_GPIO_BULK_PIN(LCD_SPL), |
82 | }; |
83 | |
84 | static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = { |
85 | JZ_GPIO_BULK_PIN(LCD_DATA0), |
86 | JZ_GPIO_BULK_PIN(LCD_DATA1), |
87 | JZ_GPIO_BULK_PIN(LCD_DATA2), |
88 | JZ_GPIO_BULK_PIN(LCD_DATA3), |
89 | JZ_GPIO_BULK_PIN(LCD_DATA4), |
90 | JZ_GPIO_BULK_PIN(LCD_DATA5), |
91 | JZ_GPIO_BULK_PIN(LCD_DATA6), |
92 | JZ_GPIO_BULK_PIN(LCD_DATA7), |
93 | JZ_GPIO_BULK_PIN(LCD_DATA8), |
94 | JZ_GPIO_BULK_PIN(LCD_DATA9), |
95 | JZ_GPIO_BULK_PIN(LCD_DATA10), |
96 | JZ_GPIO_BULK_PIN(LCD_DATA11), |
97 | JZ_GPIO_BULK_PIN(LCD_DATA12), |
98 | JZ_GPIO_BULK_PIN(LCD_DATA13), |
99 | JZ_GPIO_BULK_PIN(LCD_DATA14), |
100 | JZ_GPIO_BULK_PIN(LCD_DATA15), |
101 | JZ_GPIO_BULK_PIN(LCD_DATA16), |
102 | JZ_GPIO_BULK_PIN(LCD_DATA17), |
103 | }; |
104 | |
105 | static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb) |
106 | { |
107 | unsigned int num; |
108 | |
109 | switch (jzfb->pdata->lcd_type) { |
110 | case JZ_LCD_TYPE_GENERIC_16_BIT: |
111 | num = 4; |
112 | break; |
113 | case JZ_LCD_TYPE_GENERIC_18_BIT: |
114 | num = 4; |
115 | break; |
116 | case JZ_LCD_TYPE_8BIT_SERIAL: |
117 | num = 3; |
118 | break; |
119 | case JZ_LCD_TYPE_SPECIAL_TFT_1: |
120 | case JZ_LCD_TYPE_SPECIAL_TFT_2: |
121 | case JZ_LCD_TYPE_SPECIAL_TFT_3: |
122 | num = 8; |
123 | break; |
124 | default: |
125 | num = 0; |
126 | break; |
127 | } |
128 | return num; |
129 | } |
130 | |
131 | static unsigned int jzfb_num_data_pins(struct jzfb *jzfb) |
132 | { |
133 | unsigned int num; |
134 | |
135 | switch (jzfb->pdata->lcd_type) { |
136 | case JZ_LCD_TYPE_GENERIC_16_BIT: |
137 | num = 16; |
138 | break; |
139 | case JZ_LCD_TYPE_GENERIC_18_BIT: |
140 | num = 18; |
141 | break; |
142 | case JZ_LCD_TYPE_8BIT_SERIAL: |
143 | num = 8; |
144 | break; |
145 | case JZ_LCD_TYPE_SPECIAL_TFT_1: |
146 | case JZ_LCD_TYPE_SPECIAL_TFT_2: |
147 | case JZ_LCD_TYPE_SPECIAL_TFT_3: |
148 | if (jzfb->pdata->bpp == 18) |
149 | num = 18; |
150 | else |
151 | num = 16; |
152 | break; |
153 | default: |
154 | num = 0; |
155 | break; |
156 | } |
157 | return num; |
158 | } |
159 | |
160 | /* Based on CNVT_TOHW macro from skeletonfb.c */ |
161 | static inline uint32_t jzfb_convert_color_to_hw(unsigned val, |
162 | struct fb_bitfield *bf) |
163 | { |
164 | return (((val << bf->length) + 0x7FFF - val) >> 16) << bf->offset; |
165 | } |
166 | |
167 | static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green, |
168 | unsigned blue, unsigned transp, struct fb_info *fb) |
169 | { |
170 | uint32_t color; |
171 | |
172 | if (regno >= 16) |
173 | return -EINVAL; |
174 | |
175 | color = jzfb_convert_color_to_hw(red, &fb->var.red); |
176 | color |= jzfb_convert_color_to_hw(green, &fb->var.green); |
177 | color |= jzfb_convert_color_to_hw(blue, &fb->var.blue); |
178 | color |= jzfb_convert_color_to_hw(transp, &fb->var.transp); |
179 | |
180 | ((uint32_t *)(fb->pseudo_palette))[regno] = color; |
181 | |
182 | return 0; |
183 | } |
184 | |
185 | static int jzfb_get_controller_bpp(struct jzfb *jzfb) |
186 | { |
187 | switch (jzfb->pdata->bpp) { |
188 | case 18: |
189 | case 24: |
190 | return 32; |
191 | case 15: |
192 | return 16; |
193 | default: |
194 | return jzfb->pdata->bpp; |
195 | } |
196 | } |
197 | |
198 | static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb, |
199 | struct fb_var_screeninfo *var) |
200 | { |
201 | size_t i; |
202 | struct fb_videomode *mode = jzfb->pdata->modes; |
203 | |
204 | for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) { |
205 | if (mode->xres == var->xres && mode->yres == var->yres) |
206 | return mode; |
207 | } |
208 | |
209 | return NULL; |
210 | } |
211 | |
212 | static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb) |
213 | { |
214 | struct jzfb *jzfb = fb->par; |
215 | struct fb_videomode *mode; |
216 | |
217 | if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) && |
218 | var->bits_per_pixel != jzfb->pdata->bpp) |
219 | return -EINVAL; |
220 | |
221 | mode = jzfb_get_mode(jzfb, var); |
222 | if (mode == NULL) |
223 | return -EINVAL; |
224 | |
225 | fb_videomode_to_var(var, mode); |
226 | |
227 | switch (jzfb->pdata->bpp) { |
228 | case 8: |
229 | break; |
230 | case 15: |
231 | var->red.offset = 10; |
232 | var->red.length = 5; |
233 | var->green.offset = 6; |
234 | var->green.length = 5; |
235 | var->blue.offset = 0; |
236 | var->blue.length = 5; |
237 | break; |
238 | case 16: |
239 | var->red.offset = 11; |
240 | var->red.length = 5; |
241 | var->green.offset = 5; |
242 | var->green.length = 6; |
243 | var->blue.offset = 0; |
244 | var->blue.length = 5; |
245 | break; |
246 | case 18: |
247 | var->red.offset = 16; |
248 | var->red.length = 6; |
249 | var->green.offset = 8; |
250 | var->green.length = 6; |
251 | var->blue.offset = 0; |
252 | var->blue.length = 6; |
253 | var->bits_per_pixel = 32; |
254 | break; |
255 | case 32: |
256 | case 24: |
257 | var->transp.offset = 24; |
258 | var->transp.length = 8; |
259 | var->red.offset = 16; |
260 | var->red.length = 8; |
261 | var->green.offset = 8; |
262 | var->green.length = 8; |
263 | var->blue.offset = 0; |
264 | var->blue.length = 8; |
265 | var->bits_per_pixel = 32; |
266 | break; |
267 | default: |
268 | break; |
269 | } |
270 | |
271 | return 0; |
272 | } |
273 | |
274 | static int jzfb_set_par(struct fb_info *info) |
275 | { |
276 | struct jzfb *jzfb = info->par; |
277 | struct jz4740_fb_platform_data *pdata = jzfb->pdata; |
278 | struct fb_var_screeninfo *var = &info->var; |
279 | struct fb_videomode *mode; |
280 | uint16_t hds, vds; |
281 | uint16_t hde, vde; |
282 | uint16_t ht, vt; |
283 | uint32_t ctrl; |
284 | uint32_t cfg; |
285 | unsigned long rate; |
286 | |
287 | mode = jzfb_get_mode(jzfb, var); |
288 | if (mode == NULL) |
289 | return -EINVAL; |
290 | |
291 | if (mode == info->mode) |
292 | return 0; |
293 | |
294 | info->mode = mode; |
295 | |
296 | hds = mode->hsync_len + mode->left_margin; |
297 | hde = hds + mode->xres; |
298 | ht = hde + mode->right_margin; |
299 | |
300 | vds = mode->vsync_len + mode->upper_margin; |
301 | vde = vds + mode->yres; |
302 | vt = vde + mode->lower_margin; |
303 | |
304 | ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16; |
305 | |
306 | switch (pdata->bpp) { |
307 | case 1: |
308 | ctrl |= JZ_LCD_CTRL_BPP_1; |
309 | break; |
310 | case 2: |
311 | ctrl |= JZ_LCD_CTRL_BPP_2; |
312 | break; |
313 | case 4: |
314 | ctrl |= JZ_LCD_CTRL_BPP_4; |
315 | break; |
316 | case 8: |
317 | ctrl |= JZ_LCD_CTRL_BPP_8; |
318 | break; |
319 | case 15: |
320 | ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */ |
321 | case 16: |
322 | ctrl |= JZ_LCD_CTRL_BPP_15_16; |
323 | break; |
324 | case 18: |
325 | case 24: |
326 | case 32: |
327 | ctrl |= JZ_LCD_CTRL_BPP_18_24; |
328 | break; |
329 | default: |
330 | break; |
331 | } |
332 | |
333 | cfg = pdata->lcd_type & 0xf; |
334 | |
335 | if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT)) |
336 | cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW; |
337 | |
338 | if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT)) |
339 | cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW; |
340 | |
341 | if (pdata->pixclk_falling_edge) |
342 | cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE; |
343 | |
344 | if (pdata->date_enable_active_low) |
345 | cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW; |
346 | |
347 | if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT) |
348 | cfg |= JZ_LCD_CFG_18_BIT; |
349 | |
350 | if (mode->pixclock) { |
351 | rate = PICOS2KHZ(mode->pixclock) * 1000; |
352 | mode->refresh = rate / vt / ht; |
353 | } else { |
354 | if (pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL) |
355 | rate = mode->refresh * (vt + 2 * mode->xres) * ht; |
356 | else |
357 | rate = mode->refresh * vt * ht; |
358 | |
359 | mode->pixclock = KHZ2PICOS(rate / 1000); |
360 | } |
361 | |
362 | mutex_lock(&jzfb->lock); |
363 | if (!jzfb->is_enabled) |
364 | clk_enable(jzfb->ldclk); |
365 | else |
366 | ctrl |= JZ_LCD_CTRL_ENABLE; |
367 | |
368 | switch (pdata->lcd_type) { |
369 | case JZ_LCD_TYPE_SPECIAL_TFT_1: |
370 | case JZ_LCD_TYPE_SPECIAL_TFT_2: |
371 | case JZ_LCD_TYPE_SPECIAL_TFT_3: |
372 | writel(pdata->special_tft_config.spl, jzfb->base + JZ_REG_LCD_SPL); |
373 | writel(pdata->special_tft_config.cls, jzfb->base + JZ_REG_LCD_CLS); |
374 | writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_PS); |
375 | writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_REV); |
376 | break; |
377 | default: |
378 | cfg |= JZ_LCD_CFG_PS_DISABLE; |
379 | cfg |= JZ_LCD_CFG_CLS_DISABLE; |
380 | cfg |= JZ_LCD_CFG_SPL_DISABLE; |
381 | cfg |= JZ_LCD_CFG_REV_DISABLE; |
382 | break; |
383 | } |
384 | |
385 | writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC); |
386 | writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC); |
387 | |
388 | writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT); |
389 | |
390 | writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH); |
391 | writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV); |
392 | |
393 | writel(cfg, jzfb->base + JZ_REG_LCD_CFG); |
394 | |
395 | writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); |
396 | |
397 | if (!jzfb->is_enabled) |
398 | clk_disable_unprepare(jzfb->ldclk); |
399 | |
400 | mutex_unlock(&jzfb->lock); |
401 | |
402 | clk_set_rate(jzfb->lpclk, rate); |
403 | clk_set_rate(jzfb->ldclk, rate * 3); |
404 | |
405 | return 0; |
406 | } |
407 | |
408 | static void jzfb_enable(struct jzfb *jzfb) |
409 | { |
410 | uint32_t ctrl; |
411 | |
412 | clk_prepare_enable(jzfb->ldclk); |
413 | |
414 | jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); |
415 | jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); |
416 | |
417 | writel(0, jzfb->base + JZ_REG_LCD_STATE); |
418 | |
419 | writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0); |
420 | |
421 | ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL); |
422 | ctrl |= JZ_LCD_CTRL_ENABLE; |
423 | ctrl &= ~JZ_LCD_CTRL_DISABLE; |
424 | writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); |
425 | } |
426 | |
427 | static void jzfb_disable(struct jzfb *jzfb) |
428 | { |
429 | uint32_t ctrl; |
430 | |
431 | ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL); |
432 | ctrl |= JZ_LCD_CTRL_DISABLE; |
433 | writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); |
434 | do { |
435 | ctrl = readl(jzfb->base + JZ_REG_LCD_STATE); |
436 | } while (!(ctrl & JZ_LCD_STATE_DISABLED)); |
437 | |
438 | jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); |
439 | jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); |
440 | |
441 | clk_disable_unprepare(jzfb->ldclk); |
442 | } |
443 | |
444 | static int jzfb_blank(int blank_mode, struct fb_info *info) |
445 | { |
446 | struct jzfb *jzfb = info->par; |
447 | |
448 | switch (blank_mode) { |
449 | case FB_BLANK_UNBLANK: |
450 | mutex_lock(&jzfb->lock); |
451 | if (jzfb->is_enabled) { |
452 | mutex_unlock(&jzfb->lock); |
453 | return 0; |
454 | } |
455 | |
456 | jzfb_enable(jzfb); |
457 | jzfb->is_enabled = 1; |
458 | |
459 | mutex_unlock(&jzfb->lock); |
460 | break; |
461 | default: |
462 | mutex_lock(&jzfb->lock); |
463 | if (!jzfb->is_enabled) { |
464 | mutex_unlock(&jzfb->lock); |
465 | return 0; |
466 | } |
467 | |
468 | jzfb_disable(jzfb); |
469 | jzfb->is_enabled = 0; |
470 | |
471 | mutex_unlock(&jzfb->lock); |
472 | break; |
473 | } |
474 | |
475 | return 0; |
476 | } |
477 | |
478 | static int jzfb_alloc_devmem(struct jzfb *jzfb) |
479 | { |
480 | int max_videosize = 0; |
481 | struct fb_videomode *mode = jzfb->pdata->modes; |
482 | void *page; |
483 | int i; |
484 | |
485 | for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) { |
486 | if (max_videosize < mode->xres * mode->yres) |
487 | max_videosize = mode->xres * mode->yres; |
488 | } |
489 | |
490 | max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3; |
491 | |
492 | jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev, |
493 | sizeof(*jzfb->framedesc), |
494 | &jzfb->framedesc_phys, GFP_KERNEL); |
495 | |
496 | if (!jzfb->framedesc) |
497 | return -ENOMEM; |
498 | |
499 | jzfb->vidmem_size = PAGE_ALIGN(max_videosize); |
500 | jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev, |
501 | jzfb->vidmem_size, |
502 | &jzfb->vidmem_phys, GFP_KERNEL); |
503 | |
504 | if (!jzfb->vidmem) |
505 | goto err_free_framedesc; |
506 | |
507 | for (page = jzfb->vidmem; |
508 | page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size); |
509 | page += PAGE_SIZE) { |
510 | SetPageReserved(virt_to_page(page)); |
511 | } |
512 | |
513 | jzfb->framedesc->next = jzfb->framedesc_phys; |
514 | jzfb->framedesc->addr = jzfb->vidmem_phys; |
515 | jzfb->framedesc->id = 0xdeafbead; |
516 | jzfb->framedesc->cmd = 0; |
517 | jzfb->framedesc->cmd |= max_videosize / 4; |
518 | |
519 | return 0; |
520 | |
521 | err_free_framedesc: |
522 | dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc), |
523 | jzfb->framedesc, jzfb->framedesc_phys); |
524 | return -ENOMEM; |
525 | } |
526 | |
527 | static void jzfb_free_devmem(struct jzfb *jzfb) |
528 | { |
529 | dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size, |
530 | jzfb->vidmem, jzfb->vidmem_phys); |
531 | dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc), |
532 | jzfb->framedesc, jzfb->framedesc_phys); |
533 | } |
534 | |
535 | static struct fb_ops jzfb_ops = { |
536 | .owner = THIS_MODULE, |
537 | .fb_check_var = jzfb_check_var, |
538 | .fb_set_par = jzfb_set_par, |
539 | .fb_blank = jzfb_blank, |
540 | .fb_fillrect = sys_fillrect, |
541 | .fb_copyarea = sys_copyarea, |
542 | .fb_imageblit = sys_imageblit, |
543 | .fb_setcolreg = jzfb_setcolreg, |
544 | }; |
545 | |
546 | static int jzfb_probe(struct platform_device *pdev) |
547 | { |
548 | int ret; |
549 | struct jzfb *jzfb; |
550 | struct fb_info *fb; |
551 | struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data; |
552 | struct resource *mem; |
553 | |
554 | if (!pdata) { |
555 | dev_err(&pdev->dev, "Missing platform data\n"); |
556 | return -ENXIO; |
557 | } |
558 | |
559 | fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev); |
560 | if (!fb) { |
561 | dev_err(&pdev->dev, "Failed to allocate framebuffer device\n"); |
562 | return -ENOMEM; |
563 | } |
564 | |
565 | fb->fbops = &jzfb_ops; |
566 | fb->flags = FBINFO_DEFAULT; |
567 | |
568 | jzfb = fb->par; |
569 | jzfb->pdev = pdev; |
570 | jzfb->pdata = pdata; |
571 | |
572 | jzfb->ldclk = devm_clk_get(&pdev->dev, "lcd"); |
573 | if (IS_ERR(jzfb->ldclk)) { |
574 | ret = PTR_ERR(jzfb->ldclk); |
575 | dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret); |
576 | goto err_framebuffer_release; |
577 | } |
578 | |
579 | jzfb->lpclk = devm_clk_get(&pdev->dev, "lcd_pclk"); |
580 | if (IS_ERR(jzfb->lpclk)) { |
581 | ret = PTR_ERR(jzfb->lpclk); |
582 | dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret); |
583 | goto err_framebuffer_release; |
584 | } |
585 | |
586 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
587 | jzfb->base = devm_ioremap_resource(&pdev->dev, mem); |
588 | if (IS_ERR(jzfb->base)) { |
589 | ret = PTR_ERR(jzfb->base); |
590 | goto err_framebuffer_release; |
591 | } |
592 | |
593 | platform_set_drvdata(pdev, jzfb); |
594 | |
595 | mutex_init(&jzfb->lock); |
596 | |
597 | fb_videomode_to_modelist(pdata->modes, pdata->num_modes, |
598 | &fb->modelist); |
599 | fb_videomode_to_var(&fb->var, pdata->modes); |
600 | fb->var.bits_per_pixel = pdata->bpp; |
601 | jzfb_check_var(&fb->var, fb); |
602 | |
603 | ret = jzfb_alloc_devmem(jzfb); |
604 | if (ret) { |
605 | dev_err(&pdev->dev, "Failed to allocate video memory\n"); |
606 | goto err_framebuffer_release; |
607 | } |
608 | |
609 | fb->fix = jzfb_fix; |
610 | fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8; |
611 | fb->fix.mmio_start = mem->start; |
612 | fb->fix.mmio_len = resource_size(mem); |
613 | fb->fix.smem_start = jzfb->vidmem_phys; |
614 | fb->fix.smem_len = fb->fix.line_length * fb->var.yres; |
615 | fb->screen_base = jzfb->vidmem; |
616 | fb->pseudo_palette = jzfb->pseudo_palette; |
617 | |
618 | fb_alloc_cmap(&fb->cmap, 256, 0); |
619 | |
620 | clk_prepare_enable(jzfb->ldclk); |
621 | jzfb->is_enabled = 1; |
622 | |
623 | writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0); |
624 | |
625 | fb->mode = NULL; |
626 | jzfb_set_par(fb); |
627 | |
628 | jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); |
629 | jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); |
630 | |
631 | ret = register_framebuffer(fb); |
632 | if (ret) { |
633 | dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret); |
634 | goto err_free_devmem; |
635 | } |
636 | |
637 | jzfb->fb = fb; |
638 | |
639 | return 0; |
640 | |
641 | err_free_devmem: |
642 | jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); |
643 | jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); |
644 | |
645 | fb_dealloc_cmap(&fb->cmap); |
646 | jzfb_free_devmem(jzfb); |
647 | err_framebuffer_release: |
648 | framebuffer_release(fb); |
649 | return ret; |
650 | } |
651 | |
652 | static int jzfb_remove(struct platform_device *pdev) |
653 | { |
654 | struct jzfb *jzfb = platform_get_drvdata(pdev); |
655 | |
656 | jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb); |
657 | |
658 | jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); |
659 | jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); |
660 | |
661 | fb_dealloc_cmap(&jzfb->fb->cmap); |
662 | jzfb_free_devmem(jzfb); |
663 | |
664 | framebuffer_release(jzfb->fb); |
665 | |
666 | return 0; |
667 | } |
668 | |
669 | #ifdef CONFIG_PM |
670 | |
671 | static int jzfb_suspend(struct device *dev) |
672 | { |
673 | struct jzfb *jzfb = dev_get_drvdata(dev); |
674 | |
675 | console_lock(); |
676 | fb_set_suspend(jzfb->fb, 1); |
677 | console_unlock(); |
678 | |
679 | mutex_lock(&jzfb->lock); |
680 | if (jzfb->is_enabled) |
681 | jzfb_disable(jzfb); |
682 | mutex_unlock(&jzfb->lock); |
683 | |
684 | return 0; |
685 | } |
686 | |
687 | static int jzfb_resume(struct device *dev) |
688 | { |
689 | struct jzfb *jzfb = dev_get_drvdata(dev); |
690 | clk_prepare_enable(jzfb->ldclk); |
691 | |
692 | mutex_lock(&jzfb->lock); |
693 | if (jzfb->is_enabled) |
694 | jzfb_enable(jzfb); |
695 | mutex_unlock(&jzfb->lock); |
696 | |
697 | console_lock(); |
698 | fb_set_suspend(jzfb->fb, 0); |
699 | console_unlock(); |
700 | |
701 | return 0; |
702 | } |
703 | |
704 | static const struct dev_pm_ops jzfb_pm_ops = { |
705 | .suspend = jzfb_suspend, |
706 | .resume = jzfb_resume, |
707 | .poweroff = jzfb_suspend, |
708 | .restore = jzfb_resume, |
709 | }; |
710 | |
711 | #define JZFB_PM_OPS (&jzfb_pm_ops) |
712 | |
713 | #else |
714 | #define JZFB_PM_OPS NULL |
715 | #endif |
716 | |
717 | static struct platform_driver jzfb_driver = { |
718 | .probe = jzfb_probe, |
719 | .remove = jzfb_remove, |
720 | .driver = { |
721 | .name = "jz4740-fb", |
722 | .pm = JZFB_PM_OPS, |
723 | }, |
724 | }; |
725 | module_platform_driver(jzfb_driver); |
726 | |
727 | MODULE_LICENSE("GPL"); |
728 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); |
729 | MODULE_DESCRIPTION("JZ4740 SoC LCD framebuffer driver"); |
730 | MODULE_ALIAS("platform:jz4740-fb"); |
731 |
Branches:
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javiroman/ks7010
jz-2.6.34
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9