Root/drivers/net/wireless/wl3501.h

1#ifndef __WL3501_H__
2#define __WL3501_H__
3
4#include <linux/spinlock.h>
5#include <linux/ieee80211.h>
6
7/* define for WLA 2.0 */
8#define WL3501_BLKSZ 256
9/*
10 * ID for input Signals of DRIVER block
11 * bit[7-5] is block ID: 000
12 * bit[4-0] is signal ID
13*/
14enum wl3501_signals {
15    WL3501_SIG_ALARM,
16    WL3501_SIG_MD_CONFIRM,
17    WL3501_SIG_MD_IND,
18    WL3501_SIG_ASSOC_CONFIRM,
19    WL3501_SIG_ASSOC_IND,
20    WL3501_SIG_AUTH_CONFIRM,
21    WL3501_SIG_AUTH_IND,
22    WL3501_SIG_DEAUTH_CONFIRM,
23    WL3501_SIG_DEAUTH_IND,
24    WL3501_SIG_DISASSOC_CONFIRM,
25    WL3501_SIG_DISASSOC_IND,
26    WL3501_SIG_GET_CONFIRM,
27    WL3501_SIG_JOIN_CONFIRM,
28    WL3501_SIG_PWR_MGMT_CONFIRM,
29    WL3501_SIG_REASSOC_CONFIRM,
30    WL3501_SIG_REASSOC_IND,
31    WL3501_SIG_SCAN_CONFIRM,
32    WL3501_SIG_SET_CONFIRM,
33    WL3501_SIG_START_CONFIRM,
34    WL3501_SIG_RESYNC_CONFIRM,
35    WL3501_SIG_SITE_CONFIRM,
36    WL3501_SIG_SAVE_CONFIRM,
37    WL3501_SIG_RFTEST_CONFIRM,
38/*
39 * ID for input Signals of MLME block
40 * bit[7-5] is block ID: 010
41 * bit[4-0] is signal ID
42 */
43    WL3501_SIG_ASSOC_REQ = 0x20,
44    WL3501_SIG_AUTH_REQ,
45    WL3501_SIG_DEAUTH_REQ,
46    WL3501_SIG_DISASSOC_REQ,
47    WL3501_SIG_GET_REQ,
48    WL3501_SIG_JOIN_REQ,
49    WL3501_SIG_PWR_MGMT_REQ,
50    WL3501_SIG_REASSOC_REQ,
51    WL3501_SIG_SCAN_REQ,
52    WL3501_SIG_SET_REQ,
53    WL3501_SIG_START_REQ,
54    WL3501_SIG_MD_REQ,
55    WL3501_SIG_RESYNC_REQ,
56    WL3501_SIG_SITE_REQ,
57    WL3501_SIG_SAVE_REQ,
58    WL3501_SIG_RF_TEST_REQ,
59    WL3501_SIG_MM_CONFIRM = 0x60,
60    WL3501_SIG_MM_IND,
61};
62
63enum wl3501_mib_attribs {
64    WL3501_MIB_ATTR_STATION_ID,
65    WL3501_MIB_ATTR_AUTH_ALGORITHMS,
66    WL3501_MIB_ATTR_AUTH_TYPE,
67    WL3501_MIB_ATTR_MEDIUM_OCCUPANCY_LIMIT,
68    WL3501_MIB_ATTR_CF_POLLABLE,
69    WL3501_MIB_ATTR_CFP_PERIOD,
70    WL3501_MIB_ATTR_CFPMAX_DURATION,
71    WL3501_MIB_ATTR_AUTH_RESP_TMOUT,
72    WL3501_MIB_ATTR_RX_DTIMS,
73    WL3501_MIB_ATTR_PRIV_OPT_IMPLEMENTED,
74    WL3501_MIB_ATTR_PRIV_INVOKED,
75    WL3501_MIB_ATTR_WEP_DEFAULT_KEYS,
76    WL3501_MIB_ATTR_WEP_DEFAULT_KEY_ID,
77    WL3501_MIB_ATTR_WEP_KEY_MAPPINGS,
78    WL3501_MIB_ATTR_WEP_KEY_MAPPINGS_LEN,
79    WL3501_MIB_ATTR_EXCLUDE_UNENCRYPTED,
80    WL3501_MIB_ATTR_WEP_ICV_ERROR_COUNT,
81    WL3501_MIB_ATTR_WEP_UNDECRYPTABLE_COUNT,
82    WL3501_MIB_ATTR_WEP_EXCLUDED_COUNT,
83    WL3501_MIB_ATTR_MAC_ADDR,
84    WL3501_MIB_ATTR_GROUP_ADDRS,
85    WL3501_MIB_ATTR_RTS_THRESHOLD,
86    WL3501_MIB_ATTR_SHORT_RETRY_LIMIT,
87    WL3501_MIB_ATTR_LONG_RETRY_LIMIT,
88    WL3501_MIB_ATTR_FRAG_THRESHOLD,
89    WL3501_MIB_ATTR_MAX_TX_MSDU_LIFETIME,
90    WL3501_MIB_ATTR_MAX_RX_LIFETIME,
91    WL3501_MIB_ATTR_MANUFACTURER_ID,
92    WL3501_MIB_ATTR_PRODUCT_ID,
93    WL3501_MIB_ATTR_TX_FRAG_COUNT,
94    WL3501_MIB_ATTR_MULTICAST_TX_FRAME_COUNT,
95    WL3501_MIB_ATTR_FAILED_COUNT,
96    WL3501_MIB_ATTR_RX_FRAG_COUNT,
97    WL3501_MIB_ATTR_MULTICAST_RX_COUNT,
98    WL3501_MIB_ATTR_FCS_ERROR_COUNT,
99    WL3501_MIB_ATTR_RETRY_COUNT,
100    WL3501_MIB_ATTR_MULTIPLE_RETRY_COUNT,
101    WL3501_MIB_ATTR_RTS_SUCCESS_COUNT,
102    WL3501_MIB_ATTR_RTS_FAILURE_COUNT,
103    WL3501_MIB_ATTR_ACK_FAILURE_COUNT,
104    WL3501_MIB_ATTR_FRAME_DUPLICATE_COUNT,
105    WL3501_MIB_ATTR_PHY_TYPE,
106    WL3501_MIB_ATTR_REG_DOMAINS_SUPPORT,
107    WL3501_MIB_ATTR_CURRENT_REG_DOMAIN,
108    WL3501_MIB_ATTR_SLOT_TIME,
109    WL3501_MIB_ATTR_CCA_TIME,
110    WL3501_MIB_ATTR_RX_TX_TURNAROUND_TIME,
111    WL3501_MIB_ATTR_TX_PLCP_DELAY,
112    WL3501_MIB_ATTR_RX_TX_SWITCH_TIME,
113    WL3501_MIB_ATTR_TX_RAMP_ON_TIME,
114    WL3501_MIB_ATTR_TX_RF_DELAY,
115    WL3501_MIB_ATTR_SIFS_TIME,
116    WL3501_MIB_ATTR_RX_RF_DELAY,
117    WL3501_MIB_ATTR_RX_PLCP_DELAY,
118    WL3501_MIB_ATTR_MAC_PROCESSING_DELAY,
119    WL3501_MIB_ATTR_TX_RAMP_OFF_TIME,
120    WL3501_MIB_ATTR_PREAMBLE_LEN,
121    WL3501_MIB_ATTR_PLCP_HEADER_LEN,
122    WL3501_MIB_ATTR_MPDU_DURATION_FACTOR,
123    WL3501_MIB_ATTR_AIR_PROPAGATION_TIME,
124    WL3501_MIB_ATTR_TEMP_TYPE,
125    WL3501_MIB_ATTR_CW_MIN,
126    WL3501_MIB_ATTR_CW_MAX,
127    WL3501_MIB_ATTR_SUPPORT_DATA_RATES_TX,
128    WL3501_MIB_ATTR_SUPPORT_DATA_RATES_RX,
129    WL3501_MIB_ATTR_MPDU_MAX_LEN,
130    WL3501_MIB_ATTR_SUPPORT_TX_ANTENNAS,
131    WL3501_MIB_ATTR_CURRENT_TX_ANTENNA,
132    WL3501_MIB_ATTR_SUPPORT_RX_ANTENNAS,
133    WL3501_MIB_ATTR_DIVERSITY_SUPPORT,
134    WL3501_MIB_ATTR_DIVERSITY_SELECTION_RS,
135    WL3501_MIB_ATTR_NR_SUPPORTED_PWR_LEVELS,
136    WL3501_MIB_ATTR_TX_PWR_LEVEL1,
137    WL3501_MIB_ATTR_TX_PWR_LEVEL2,
138    WL3501_MIB_ATTR_TX_PWR_LEVEL3,
139    WL3501_MIB_ATTR_TX_PWR_LEVEL4,
140    WL3501_MIB_ATTR_TX_PWR_LEVEL5,
141    WL3501_MIB_ATTR_TX_PWR_LEVEL6,
142    WL3501_MIB_ATTR_TX_PWR_LEVEL7,
143    WL3501_MIB_ATTR_TX_PWR_LEVEL8,
144    WL3501_MIB_ATTR_CURRENT_TX_PWR_LEVEL,
145    WL3501_MIB_ATTR_CURRENT_CHAN,
146    WL3501_MIB_ATTR_CCA_MODE_SUPPORTED,
147    WL3501_MIB_ATTR_CURRENT_CCA_MODE,
148    WL3501_MIB_ATTR_ED_THRESHOLD,
149    WL3501_MIB_ATTR_SINTHESIZER_LOCKED,
150    WL3501_MIB_ATTR_CURRENT_PWR_STATE,
151    WL3501_MIB_ATTR_DOZE_TURNON_TIME,
152    WL3501_MIB_ATTR_RCR33,
153    WL3501_MIB_ATTR_DEFAULT_CHAN,
154    WL3501_MIB_ATTR_SSID,
155    WL3501_MIB_ATTR_PWR_MGMT_ENABLE,
156    WL3501_MIB_ATTR_NET_CAPABILITY,
157    WL3501_MIB_ATTR_ROUTING,
158};
159
160enum wl3501_net_type {
161    WL3501_NET_TYPE_INFRA,
162    WL3501_NET_TYPE_ADHOC,
163    WL3501_NET_TYPE_ANY_BSS,
164};
165
166enum wl3501_scan_type {
167    WL3501_SCAN_TYPE_ACTIVE,
168    WL3501_SCAN_TYPE_PASSIVE,
169};
170
171enum wl3501_tx_result {
172    WL3501_TX_RESULT_SUCCESS,
173    WL3501_TX_RESULT_NO_BSS,
174    WL3501_TX_RESULT_RETRY_LIMIT,
175};
176
177enum wl3501_sys_type {
178    WL3501_SYS_TYPE_OPEN,
179    WL3501_SYS_TYPE_SHARE_KEY,
180};
181
182enum wl3501_status {
183    WL3501_STATUS_SUCCESS,
184    WL3501_STATUS_INVALID,
185    WL3501_STATUS_TIMEOUT,
186    WL3501_STATUS_REFUSED,
187    WL3501_STATUS_MANY_REQ,
188    WL3501_STATUS_ALREADY_BSS,
189};
190
191#define WL3501_MGMT_CAPABILITY_ESS 0x0001 /* see 802.11 p.58 */
192#define WL3501_MGMT_CAPABILITY_IBSS 0x0002 /* - " - */
193#define WL3501_MGMT_CAPABILITY_CF_POLLABLE 0x0004 /* - " - */
194#define WL3501_MGMT_CAPABILITY_CF_POLL_REQUEST 0x0008 /* - " - */
195#define WL3501_MGMT_CAPABILITY_PRIVACY 0x0010 /* - " - */
196
197#define IW_REG_DOMAIN_FCC 0x10 /* Channel 1 to 11 USA */
198#define IW_REG_DOMAIN_DOC 0x20 /* Channel 1 to 11 Canada */
199#define IW_REG_DOMAIN_ETSI 0x30 /* Channel 1 to 13 Europe */
200#define IW_REG_DOMAIN_SPAIN 0x31 /* Channel 10 to 11 Spain */
201#define IW_REG_DOMAIN_FRANCE 0x32 /* Channel 10 to 13 France */
202#define IW_REG_DOMAIN_MKK 0x40 /* Channel 14 Japan */
203#define IW_REG_DOMAIN_MKK1 0x41 /* Channel 1-14 Japan */
204#define IW_REG_DOMAIN_ISRAEL 0x50 /* Channel 3 - 9 Israel */
205
206#define IW_MGMT_RATE_LABEL_MANDATORY 128 /* MSB */
207
208enum iw_mgmt_rate_labels {
209    IW_MGMT_RATE_LABEL_1MBIT = 2,
210    IW_MGMT_RATE_LABEL_2MBIT = 4,
211    IW_MGMT_RATE_LABEL_5_5MBIT = 11,
212    IW_MGMT_RATE_LABEL_11MBIT = 22,
213};
214
215enum iw_mgmt_info_element_ids {
216    IW_MGMT_INFO_ELEMENT_SSID, /* Service Set Identity */
217    IW_MGMT_INFO_ELEMENT_SUPPORTED_RATES,
218    IW_MGMT_INFO_ELEMENT_FH_PARAMETER_SET,
219    IW_MGMT_INFO_ELEMENT_DS_PARAMETER_SET,
220    IW_MGMT_INFO_ELEMENT_CS_PARAMETER_SET,
221    IW_MGMT_INFO_ELEMENT_CS_TIM, /* Traffic Information Map */
222    IW_MGMT_INFO_ELEMENT_IBSS_PARAMETER_SET,
223    /* 7-15: Reserved, unused */
224    IW_MGMT_INFO_ELEMENT_CHALLENGE_TEXT = 16,
225    /* 17-31 Reserved for challenge text extension */
226    /* 32-255 Reserved, unused */
227};
228
229struct iw_mgmt_info_element {
230    u8 id; /* one of enum iw_mgmt_info_element_ids,
231          but sizeof(enum) > sizeof(u8) :-( */
232    u8 len;
233    u8 data[0];
234} __attribute__ ((packed));
235
236struct iw_mgmt_essid_pset {
237    struct iw_mgmt_info_element el;
238    u8 essid[IW_ESSID_MAX_SIZE];
239} __attribute__ ((packed));
240
241/*
242 * According to 802.11 Wireless Netowors, the definitive guide - O'Reilly
243 * Pg 75
244 */
245#define IW_DATA_RATE_MAX_LABELS 8
246
247struct iw_mgmt_data_rset {
248    struct iw_mgmt_info_element el;
249    u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS];
250} __attribute__ ((packed));
251
252struct iw_mgmt_ds_pset {
253    struct iw_mgmt_info_element el;
254    u8 chan;
255} __attribute__ ((packed));
256
257struct iw_mgmt_cf_pset {
258    struct iw_mgmt_info_element el;
259    u8 cfp_count;
260    u8 cfp_period;
261    u16 cfp_max_duration;
262    u16 cfp_dur_remaining;
263} __attribute__ ((packed));
264
265struct iw_mgmt_ibss_pset {
266    struct iw_mgmt_info_element el;
267    u16 atim_window;
268} __attribute__ ((packed));
269
270struct wl3501_tx_hdr {
271    u16 tx_cnt;
272    u8 sync[16];
273    u16 sfd;
274    u8 signal;
275    u8 service;
276    u16 len;
277    u16 crc16;
278    u16 frame_ctrl;
279    u16 duration_id;
280    u8 addr1[ETH_ALEN];
281    u8 addr2[ETH_ALEN];
282    u8 addr3[ETH_ALEN];
283    u16 seq_ctrl;
284    u8 addr4[ETH_ALEN];
285};
286
287struct wl3501_rx_hdr {
288    u16 rx_next_blk;
289    u16 rc_next_frame_blk;
290    u8 rx_blk_ctrl;
291    u8 rx_next_frame;
292    u8 rx_next_frame1;
293    u8 rssi;
294    char time[8];
295    u8 signal;
296    u8 service;
297    u16 len;
298    u16 crc16;
299    u16 frame_ctrl;
300    u16 duration;
301    u8 addr1[ETH_ALEN];
302    u8 addr2[ETH_ALEN];
303    u8 addr3[ETH_ALEN];
304    u16 seq;
305    u8 addr4[ETH_ALEN];
306};
307
308struct wl3501_start_req {
309    u16 next_blk;
310    u8 sig_id;
311    u8 bss_type;
312    u16 beacon_period;
313    u16 dtim_period;
314    u16 probe_delay;
315    u16 cap_info;
316    struct iw_mgmt_essid_pset ssid;
317    struct iw_mgmt_data_rset bss_basic_rset;
318    struct iw_mgmt_data_rset operational_rset;
319    struct iw_mgmt_cf_pset cf_pset;
320    struct iw_mgmt_ds_pset ds_pset;
321    struct iw_mgmt_ibss_pset ibss_pset;
322};
323
324struct wl3501_assoc_req {
325    u16 next_blk;
326    u8 sig_id;
327    u8 reserved;
328    u16 timeout;
329    u16 cap_info;
330    u16 listen_interval;
331    u8 mac_addr[ETH_ALEN];
332};
333
334struct wl3501_assoc_confirm {
335    u16 next_blk;
336    u8 sig_id;
337    u8 reserved;
338    u16 status;
339};
340
341struct wl3501_assoc_ind {
342    u16 next_blk;
343    u8 sig_id;
344    u8 mac_addr[ETH_ALEN];
345};
346
347struct wl3501_auth_req {
348    u16 next_blk;
349    u8 sig_id;
350    u8 reserved;
351    u16 type;
352    u16 timeout;
353    u8 mac_addr[ETH_ALEN];
354};
355
356struct wl3501_auth_confirm {
357    u16 next_blk;
358    u8 sig_id;
359    u8 reserved;
360    u16 type;
361    u16 status;
362    u8 mac_addr[ETH_ALEN];
363};
364
365struct wl3501_get_req {
366    u16 next_blk;
367    u8 sig_id;
368    u8 reserved;
369    u16 mib_attrib;
370};
371
372struct wl3501_get_confirm {
373    u16 next_blk;
374    u8 sig_id;
375    u8 reserved;
376    u16 mib_status;
377    u16 mib_attrib;
378    u8 mib_value[100];
379};
380
381struct wl3501_join_req {
382    u16 next_blk;
383    u8 sig_id;
384    u8 reserved;
385    struct iw_mgmt_data_rset operational_rset;
386    u16 reserved2;
387    u16 timeout;
388    u16 probe_delay;
389    u8 timestamp[8];
390    u8 local_time[8];
391    u16 beacon_period;
392    u16 dtim_period;
393    u16 cap_info;
394    u8 bss_type;
395    u8 bssid[ETH_ALEN];
396    struct iw_mgmt_essid_pset ssid;
397    struct iw_mgmt_ds_pset ds_pset;
398    struct iw_mgmt_cf_pset cf_pset;
399    struct iw_mgmt_ibss_pset ibss_pset;
400    struct iw_mgmt_data_rset bss_basic_rset;
401};
402
403struct wl3501_join_confirm {
404    u16 next_blk;
405    u8 sig_id;
406    u8 reserved;
407    u16 status;
408};
409
410struct wl3501_pwr_mgmt_req {
411    u16 next_blk;
412    u8 sig_id;
413    u8 pwr_save;
414    u8 wake_up;
415    u8 receive_dtims;
416};
417
418struct wl3501_pwr_mgmt_confirm {
419    u16 next_blk;
420    u8 sig_id;
421    u8 reserved;
422    u16 status;
423};
424
425struct wl3501_scan_req {
426    u16 next_blk;
427    u8 sig_id;
428    u8 bss_type;
429    u16 probe_delay;
430    u16 min_chan_time;
431    u16 max_chan_time;
432    u8 chan_list[14];
433    u8 bssid[ETH_ALEN];
434    struct iw_mgmt_essid_pset ssid;
435    enum wl3501_scan_type scan_type;
436};
437
438struct wl3501_scan_confirm {
439    u16 next_blk;
440    u8 sig_id;
441    u8 reserved;
442    u16 status;
443    char timestamp[8];
444    char localtime[8];
445    u16 beacon_period;
446    u16 dtim_period;
447    u16 cap_info;
448    u8 bss_type;
449    u8 bssid[ETH_ALEN];
450    struct iw_mgmt_essid_pset ssid;
451    struct iw_mgmt_ds_pset ds_pset;
452    struct iw_mgmt_cf_pset cf_pset;
453    struct iw_mgmt_ibss_pset ibss_pset;
454    struct iw_mgmt_data_rset bss_basic_rset;
455    u8 rssi;
456};
457
458struct wl3501_start_confirm {
459    u16 next_blk;
460    u8 sig_id;
461    u8 reserved;
462    u16 status;
463};
464
465struct wl3501_md_req {
466    u16 next_blk;
467    u8 sig_id;
468    u8 routing;
469    u16 data;
470    u16 size;
471    u8 pri;
472    u8 service_class;
473    u8 daddr[ETH_ALEN];
474    u8 saddr[ETH_ALEN];
475};
476
477struct wl3501_md_ind {
478    u16 next_blk;
479    u8 sig_id;
480    u8 routing;
481    u16 data;
482    u16 size;
483    u8 reception;
484    u8 pri;
485    u8 service_class;
486    u8 daddr[ETH_ALEN];
487    u8 saddr[ETH_ALEN];
488};
489
490struct wl3501_md_confirm {
491    u16 next_blk;
492    u8 sig_id;
493    u8 reserved;
494    u16 data;
495    u8 status;
496    u8 pri;
497    u8 service_class;
498};
499
500struct wl3501_resync_req {
501    u16 next_blk;
502    u8 sig_id;
503};
504
505/* Definitions for supporting clone adapters. */
506/* System Interface Registers (SIR space) */
507#define WL3501_NIC_GCR ((u8)0x00) /* SIR0 - General Conf Register */
508#define WL3501_NIC_BSS ((u8)0x01) /* SIR1 - Bank Switching Select Reg */
509#define WL3501_NIC_LMAL ((u8)0x02) /* SIR2 - Local Mem addr Reg [7:0] */
510#define WL3501_NIC_LMAH ((u8)0x03) /* SIR3 - Local Mem addr Reg [14:8] */
511#define WL3501_NIC_IODPA ((u8)0x04) /* SIR4 - I/O Data Port A */
512#define WL3501_NIC_IODPB ((u8)0x05) /* SIR5 - I/O Data Port B */
513#define WL3501_NIC_IODPC ((u8)0x06) /* SIR6 - I/O Data Port C */
514#define WL3501_NIC_IODPD ((u8)0x07) /* SIR7 - I/O Data Port D */
515
516/* Bits in GCR */
517#define WL3501_GCR_SWRESET ((u8)0x80)
518#define WL3501_GCR_CORESET ((u8)0x40)
519#define WL3501_GCR_DISPWDN ((u8)0x20)
520#define WL3501_GCR_ECWAIT ((u8)0x10)
521#define WL3501_GCR_ECINT ((u8)0x08)
522#define WL3501_GCR_INT2EC ((u8)0x04)
523#define WL3501_GCR_ENECINT ((u8)0x02)
524#define WL3501_GCR_DAM ((u8)0x01)
525
526/* Bits in BSS (Bank Switching Select Register) */
527#define WL3501_BSS_FPAGE0 ((u8)0x20) /* Flash memory page0 */
528#define WL3501_BSS_FPAGE1 ((u8)0x28)
529#define WL3501_BSS_FPAGE2 ((u8)0x30)
530#define WL3501_BSS_FPAGE3 ((u8)0x38)
531#define WL3501_BSS_SPAGE0 ((u8)0x00) /* SRAM page0 */
532#define WL3501_BSS_SPAGE1 ((u8)0x08)
533#define WL3501_BSS_SPAGE2 ((u8)0x10)
534#define WL3501_BSS_SPAGE3 ((u8)0x18)
535
536/* Define Driver Interface */
537/* Refer IEEE 802.11 */
538/* Tx packet header, include PLCP and MPDU */
539/* Tx PLCP Header */
540struct wl3501_80211_tx_plcp_hdr {
541    u8 sync[16];
542    u16 sfd;
543    u8 signal;
544    u8 service;
545    u16 len;
546    u16 crc16;
547} __attribute__ ((packed));
548
549struct wl3501_80211_tx_hdr {
550    struct wl3501_80211_tx_plcp_hdr pclp_hdr;
551    struct ieee80211_hdr mac_hdr;
552} __attribute__ ((packed));
553
554/*
555   Reserve the beginning Tx space for descriptor use.
556
557   TxBlockOffset --> *----*----*----*----* \
558    (TxFreeDesc) | 0 | 1 | 2 | 3 | \
559            | 4 | 5 | 6 | 7 | |
560            | 8 | 9 | 10 | 11 | TX_DESC * 20
561            | 12 | 13 | 14 | 15 | |
562            | 16 | 17 | 18 | 19 | /
563   TxBufferBegin --> *----*----*----*----* /
564   (TxBufferHead) | |
565   (TxBufferTail) | |
566            | Send Buffer |
567            | |
568            | |
569            *-------------------*
570   TxBufferEnd -------------------------/
571
572*/
573
574struct wl3501_card {
575    int base_addr;
576    u8 mac_addr[ETH_ALEN];
577    spinlock_t lock;
578    wait_queue_head_t wait;
579    struct wl3501_get_confirm sig_get_confirm;
580    struct wl3501_pwr_mgmt_confirm sig_pwr_mgmt_confirm;
581    u16 tx_buffer_size;
582    u16 tx_buffer_head;
583    u16 tx_buffer_tail;
584    u16 tx_buffer_cnt;
585    u16 esbq_req_start;
586    u16 esbq_req_end;
587    u16 esbq_req_head;
588    u16 esbq_req_tail;
589    u16 esbq_confirm_start;
590    u16 esbq_confirm_end;
591    u16 esbq_confirm;
592    struct iw_mgmt_essid_pset essid;
593    struct iw_mgmt_essid_pset keep_essid;
594    u8 bssid[ETH_ALEN];
595    int net_type;
596    char nick[32];
597    char card_name[32];
598    char firmware_date[32];
599    u8 chan;
600    u8 cap_info;
601    u16 start_seg;
602    u16 bss_cnt;
603    u16 join_sta_bss;
604    u8 rssi;
605    u8 adhoc_times;
606    u8 reg_domain;
607    u8 version[2];
608    struct wl3501_scan_confirm bss_set[20];
609
610    struct iw_statistics wstats;
611    struct iw_spy_data spy_data;
612    struct iw_public_data wireless_data;
613    struct dev_node_t node;
614    struct pcmcia_device *p_dev;
615};
616#endif
617

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