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Source at commit 6871d07cdbe9e01571c671687ac0a6189264901b created 13 years 24 days ago. By Lars-Peter Clausen, Use common base address file for all sub-archs | |
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1 | /* |
2 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
3 | * JZ4740 platform IRQ support |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2 of the License, or (at your |
8 | * option) any later version. |
9 | * |
10 | * You should have received a copy of the GNU General Public License along |
11 | * with this program; if not, write to the Free Software Foundation, Inc., |
12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
13 | * |
14 | */ |
15 | |
16 | #include <linux/errno.h> |
17 | #include <linux/init.h> |
18 | #include <linux/types.h> |
19 | #include <linux/interrupt.h> |
20 | #include <linux/ioport.h> |
21 | #include <linux/timex.h> |
22 | #include <linux/slab.h> |
23 | #include <linux/delay.h> |
24 | |
25 | #include <linux/debugfs.h> |
26 | #include <linux/seq_file.h> |
27 | |
28 | #include <asm/io.h> |
29 | #include <asm/mipsregs.h> |
30 | #include <asm/irq_cpu.h> |
31 | |
32 | #include <asm/mach-jz47xx/base.h> |
33 | |
34 | static unsigned int jz_intc_num_banks; |
35 | static void __iomem *jz_intc_base; |
36 | static uint32_t jz_intc_wakeup[2]; |
37 | static uint32_t jz_intc_saved[2]; |
38 | |
39 | #define JZ_REG_INTC_STATUS 0x00 |
40 | #define JZ_REG_INTC_MASK 0x04 |
41 | #define JZ_REG_INTC_SET_MASK 0x08 |
42 | #define JZ_REG_INTC_CLEAR_MASK 0x0c |
43 | #define JZ_REG_INTC_PENDING 0x10 |
44 | |
45 | #define IRQ_BIT(x) BIT(((x) - JZ47XX_IRQ_BASE) & 0x1f) |
46 | |
47 | static inline unsigned int intc_irq_bit(struct irq_data *data) |
48 | { |
49 | return (unsigned int)irq_data_get_irq_chip_data(data); |
50 | } |
51 | |
52 | static void intc_irq_unmask(struct irq_data *data) |
53 | { |
54 | unsigned int offset = (data->irq - JZ47XX_IRQ_BASE) & ~0x1f; |
55 | |
56 | writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK + offset); |
57 | } |
58 | |
59 | static void intc_irq_mask(struct irq_data *data) |
60 | { |
61 | unsigned int offset = (data->irq - JZ47XX_IRQ_BASE) & ~0x1f; |
62 | writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK + offset); |
63 | } |
64 | |
65 | static int intc_irq_set_wake(struct irq_data *data, unsigned int on) |
66 | { |
67 | unsigned int bank = (data->irq - JZ47XX_IRQ_BASE) >> 5; |
68 | if (on) |
69 | jz_intc_wakeup[bank] |= intc_irq_bit(data); |
70 | else |
71 | jz_intc_wakeup[bank] &= ~intc_irq_bit(data); |
72 | |
73 | return 0; |
74 | } |
75 | |
76 | static struct irq_chip intc_irq_type = { |
77 | .name = "INTC", |
78 | .irq_mask = intc_irq_mask, |
79 | .irq_mask_ack = intc_irq_mask, |
80 | .irq_unmask = intc_irq_unmask, |
81 | .irq_set_wake = intc_irq_set_wake, |
82 | }; |
83 | |
84 | static irqreturn_t jz4740_cascade(int irq, void *data) |
85 | { |
86 | uint32_t irq_reg; |
87 | unsigned int i; |
88 | |
89 | for (i = 0; i < jz_intc_num_banks; ++i) { |
90 | irq_reg = readl(jz_intc_base + i * 0x20 + JZ_REG_INTC_PENDING); |
91 | |
92 | if (irq_reg) { |
93 | generic_handle_irq(__fls(irq_reg) + JZ47XX_IRQ_BASE + i * 0x20); |
94 | break; |
95 | } |
96 | } |
97 | |
98 | return IRQ_HANDLED; |
99 | } |
100 | |
101 | static struct irqaction jz4740_cascade_action = { |
102 | .handler = jz4740_cascade, |
103 | .name = "JZ4740 cascade interrupt", |
104 | }; |
105 | |
106 | void __init jz47xx_intc_init(unsigned int num_banks) |
107 | { |
108 | int i; |
109 | mips_cpu_irq_init(); |
110 | |
111 | jz_intc_base = ioremap(JZ47XX_INTC_BASE_ADDR, 0x20 * num_banks); |
112 | jz_intc_num_banks = num_banks; |
113 | |
114 | /* Mask all irqs */ |
115 | for (i = 0; i < num_banks; ++i) { |
116 | writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK + i * 0x20); |
117 | } |
118 | |
119 | for (i = JZ47XX_IRQ_BASE; i < JZ47XX_IRQ_BASE + 32 * num_banks; i++) { |
120 | set_irq_chip_data(i, (void *)IRQ_BIT(i)); |
121 | set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); |
122 | } |
123 | |
124 | setup_irq(2, &jz4740_cascade_action); |
125 | } |
126 | |
127 | asmlinkage void plat_irq_dispatch(void) |
128 | { |
129 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
130 | if (pending & STATUSF_IP2) |
131 | do_IRQ(2); |
132 | else if (pending & STATUSF_IP3) |
133 | do_IRQ(3); |
134 | else |
135 | spurious_interrupt(); |
136 | } |
137 | |
138 | void jz4740_intc_suspend(void) |
139 | { |
140 | unsigned int offset; |
141 | unsigned int i; |
142 | |
143 | for (i = 0; i < jz_intc_num_banks; ++i) { |
144 | offset = i * 0x20; |
145 | |
146 | jz_intc_saved[i] = readl(jz_intc_base + JZ_REG_INTC_MASK + offset); |
147 | writel(~jz_intc_wakeup[i], jz_intc_base + JZ_REG_INTC_SET_MASK + offset); |
148 | writel(jz_intc_wakeup[i], jz_intc_base + JZ_REG_INTC_CLEAR_MASK + offset); |
149 | } |
150 | } |
151 | |
152 | void jz4740_intc_resume(void) |
153 | { |
154 | unsigned int offset; |
155 | unsigned int i; |
156 | |
157 | for (i = 0; i < jz_intc_num_banks; ++i) { |
158 | offset = i * 0x20; |
159 | |
160 | writel(~jz_intc_saved[i], jz_intc_base + JZ_REG_INTC_CLEAR_MASK + offset); |
161 | writel(jz_intc_saved[i], jz_intc_base + JZ_REG_INTC_SET_MASK + offset); |
162 | } |
163 | } |
164 | |
165 | #ifdef CONFIG_DEBUG_FS |
166 | |
167 | static inline void intc_seq_reg(struct seq_file *s, const char *name, |
168 | unsigned int reg) |
169 | { |
170 | seq_printf(s, "%s:\t\t%08x\n", name, readl(jz_intc_base + reg)); |
171 | } |
172 | |
173 | static int intc_regs_show(struct seq_file *s, void *unused) |
174 | { |
175 | intc_seq_reg(s, "Status", JZ_REG_INTC_STATUS); |
176 | intc_seq_reg(s, "Mask", JZ_REG_INTC_MASK); |
177 | intc_seq_reg(s, "Pending", JZ_REG_INTC_PENDING); |
178 | |
179 | return 0; |
180 | } |
181 | |
182 | static int intc_regs_open(struct inode *inode, struct file *file) |
183 | { |
184 | return single_open(file, intc_regs_show, NULL); |
185 | } |
186 | |
187 | static const struct file_operations intc_regs_operations = { |
188 | .open = intc_regs_open, |
189 | .read = seq_read, |
190 | .llseek = seq_lseek, |
191 | .release = single_release, |
192 | }; |
193 | |
194 | static int __init intc_debugfs_init(void) |
195 | { |
196 | (void) debugfs_create_file("jz_regs_intc", S_IFREG | S_IRUGO, |
197 | NULL, NULL, &intc_regs_operations); |
198 | return 0; |
199 | } |
200 | subsys_initcall(intc_debugfs_init); |
201 | |
202 | #endif |
203 |
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Tags:
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