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| Source at commit 694c7fbe86b8a9c91392e505afcb9fcfc91deccc created 12 years 8 months ago. By Maarten ter Huurne, MIPS: JZ4740: Add cpufreq support | |
|---|---|
| 1 | /* |
| 2 | * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org), |
| 3 | * derived from r4xx0.c by David S. Miller (davem@davemloft.net). |
| 4 | */ |
| 5 | #include <linux/init.h> |
| 6 | #include <linux/kernel.h> |
| 7 | #include <linux/sched.h> |
| 8 | #include <linux/mm.h> |
| 9 | |
| 10 | #include <asm/mipsregs.h> |
| 11 | #include <asm/bcache.h> |
| 12 | #include <asm/cacheops.h> |
| 13 | #include <asm/page.h> |
| 14 | #include <asm/pgtable.h> |
| 15 | #include <asm/mmu_context.h> |
| 16 | #include <asm/r4kcache.h> |
| 17 | |
| 18 | /* Secondary cache size in bytes, if present. */ |
| 19 | static unsigned long scache_size; |
| 20 | |
| 21 | #define SC_LINE 32 |
| 22 | #define SC_PAGE (128*SC_LINE) |
| 23 | |
| 24 | static inline void blast_r5000_scache(void) |
| 25 | { |
| 26 | unsigned long start = INDEX_BASE; |
| 27 | unsigned long end = start + scache_size; |
| 28 | |
| 29 | while(start < end) { |
| 30 | cache_op(R5K_Page_Invalidate_S, start); |
| 31 | start += SC_PAGE; |
| 32 | } |
| 33 | } |
| 34 | |
| 35 | static void r5k_dma_cache_inv_sc(unsigned long addr, unsigned long size) |
| 36 | { |
| 37 | unsigned long end, a; |
| 38 | |
| 39 | /* Catch bad driver code */ |
| 40 | BUG_ON(size == 0); |
| 41 | |
| 42 | if (size >= scache_size) { |
| 43 | blast_r5000_scache(); |
| 44 | return; |
| 45 | } |
| 46 | |
| 47 | /* On the R5000 secondary cache we cannot |
| 48 | * invalidate less than a page at a time. |
| 49 | * The secondary cache is physically indexed, write-through. |
| 50 | */ |
| 51 | a = addr & ~(SC_PAGE - 1); |
| 52 | end = (addr + size - 1) & ~(SC_PAGE - 1); |
| 53 | while (a <= end) { |
| 54 | cache_op(R5K_Page_Invalidate_S, a); |
| 55 | a += SC_PAGE; |
| 56 | } |
| 57 | } |
| 58 | |
| 59 | static void r5k_sc_enable(void) |
| 60 | { |
| 61 | unsigned long flags; |
| 62 | |
| 63 | local_irq_save(flags); |
| 64 | set_c0_config(R5K_CONF_SE); |
| 65 | blast_r5000_scache(); |
| 66 | local_irq_restore(flags); |
| 67 | } |
| 68 | |
| 69 | static void r5k_sc_disable(void) |
| 70 | { |
| 71 | unsigned long flags; |
| 72 | |
| 73 | local_irq_save(flags); |
| 74 | blast_r5000_scache(); |
| 75 | clear_c0_config(R5K_CONF_SE); |
| 76 | local_irq_restore(flags); |
| 77 | } |
| 78 | |
| 79 | static inline int __init r5k_sc_probe(void) |
| 80 | { |
| 81 | unsigned long config = read_c0_config(); |
| 82 | |
| 83 | if (config & CONF_SC) |
| 84 | return(0); |
| 85 | |
| 86 | scache_size = (512 * 1024) << ((config & R5K_CONF_SS) >> 20); |
| 87 | |
| 88 | printk("R5000 SCACHE size %ldkB, linesize 32 bytes.\n", |
| 89 | scache_size >> 10); |
| 90 | |
| 91 | return 1; |
| 92 | } |
| 93 | |
| 94 | static struct bcache_ops r5k_sc_ops = { |
| 95 | .bc_enable = r5k_sc_enable, |
| 96 | .bc_disable = r5k_sc_disable, |
| 97 | .bc_wback_inv = r5k_dma_cache_inv_sc, |
| 98 | .bc_inv = r5k_dma_cache_inv_sc |
| 99 | }; |
| 100 | |
| 101 | void r5k_sc_init(void) |
| 102 | { |
| 103 | if (r5k_sc_probe()) { |
| 104 | r5k_sc_enable(); |
| 105 | bcops = &r5k_sc_ops; |
| 106 | } |
| 107 | } |
| 108 | |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9
