Root/arch/mips/boot/compressed/head.S

Source at commit 7c47ff2ec1fa049d2c64710a6ee4488dca6250e7 created 12 years 8 months ago.
By Xiangfu Liu, From 4939c63a61175f87d93ac0164c7adb40e8410a47 Mon Sep 17 00:00:00 2001 Subject: [PATCH] ix upload zImage
1/*
2 * linux/arch/mips/boot/compressed/head.S
3 *
4 * Copyright (C) 2005-2008 Ingenic Semiconductor Inc.
5 */
6
7#include <asm/asm.h>
8#include <asm/cachectl.h>
9#include <asm/regdef.h>
10
11#define IndexInvalidate_I 0x00
12#define IndexWriteBack_D 0x01
13
14    .set noreorder
15    LEAF(startup)
16startup:
17    move s0, a0 /* Save the boot loader transfered args */
18    move s1, a1
19    move s2, a2
20    move s3, a3
21
22    la a0, _edata
23    la a1, _end
241: sw zero, 0(a0) /* Clear BSS section */
25    bne a1, a0, 1b
26    addu a0, 4
27
28    la sp, (.stack + 8192)
29
30    la a0, __image_begin
31    la a1, IMAGESIZE
32    la a2, LOADADDR
33    la ra, 1f
34    la k0, decompress_kernel
35    jr k0
36    nop
371:
38
39    move a0, s0
40    move a1, s1
41    move a2, s2
42    move a3, s3
43    li k0, KERNEL_ENTRY
44    jr k0
45    nop
462:
47    b 32
48    END(startup)
49
50
51    LEAF(flushcaches)
52    la t0, 1f
53    la t1, 0xa0000000
54    or t0, t0, t1
55    jr t0
56    nop
571:
58    li k0, 0x80000000 # start address
59    li k1, 0x80004000 # end address (16KB I-Cache)
60    subu k1, 128
61
622:
63    .set mips3
64    cache IndexWriteBack_D, 0(k0)
65    cache IndexWriteBack_D, 32(k0)
66    cache IndexWriteBack_D, 64(k0)
67    cache IndexWriteBack_D, 96(k0)
68    cache IndexInvalidate_I, 0(k0)
69    cache IndexInvalidate_I, 32(k0)
70    cache IndexInvalidate_I, 64(k0)
71    cache IndexInvalidate_I, 96(k0)
72    .set mips0
73
74    bne k0, k1, 2b
75    addu k0, k0, 128
76    la t0, 3f
77    jr t0
78    nop
793:
80    jr ra
81    nop
82    END(flushcaches)
83
84    .comm .stack,4096*2,4
85

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